Chin. J. Semicond. > 2005, Volume 26 > Issue 2 > 238-242

PDF

Abstract: Design and fabrication of Schottky barrier diodes (SBD) with a commercial standard 0.35μm CMOS process are described.In order to reduce the series resistor of Schottky contact,interdigitating the fingers of schottky diode layout is adopted.The I-V,C-V,and S parameter are measured.The parameters of realized SBD such as the saturation current,breakdown voltage,and the Schottky barrier height are given.The SPICE simulation model of the realized SBDs is given.

  • Search

    Advanced Search >>

    Article Metrics

    Article views: 2830 Times PDF downloads: 2610 Times Cited by: 0 Times

    History

    Received: 19 August 2015 Revised: Online: Published: 01 February 2005

    Catalog

      Email This Article

      User name:
      Email:*请输入正确邮箱
      Code:*验证码错误
      Design and Fabrication of Schottky Diode with Standard CMOS Process[J]. Journal of Semiconductors, 2005, In Press. Design and Fabrication of Schottky Diode with Standard CMOS Process[J]. Chin. J. Semicond., 2005, 26(2): 238.Export: BibTex EndNote
      Citation:
      Design and Fabrication of Schottky Diode with Standard CMOS Process[J]. Journal of Semiconductors, 2005, In Press.

      Design and Fabrication of Schottky Diode with Standard CMOS Process[J]. Chin. J. Semicond., 2005, 26(2): 238.
      Export: BibTex EndNote

      Design and Fabrication of Schottky Diode with Standard CMOS Process

      • Received Date: 2015-08-19

      Catalog

        /

        DownLoad:  Full-Size Img  PowerPoint
        Return
        Return