Fig. 1.
Schematic of the conventional PLDMOS driving circuit
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Yajun Li, Xinquan Lai, Qiang Ye, Bing Yuan. Driving circuit with high accuracy and large driving capability for high voltage buck regulators[J]. Journal of Semiconductors, 2014, 35(12): 125009. doi: 10.1088/1674-4926/35/12/125009
Y J Li, X Q Lai, Q Ye, B Yuan. Driving circuit with high accuracy and large driving capability for high voltage buck regulators[J]. J. Semicond., 2014, 35(12): 125009. doi: 10.1088/1674-4926/35/12/125009.
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Driving circuit with high accuracy and large driving capability for high voltage buck regulators
doi: 10.1088/1674-4926/35/12/125009
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Abstract
This paper presents a novel driving circuit for the high-side switch of high voltage buck regulators. A 40 V P-channel lateral double-diffused metal-oxide-semiconductor device whose drain-source and drain-gate can resist high voltage, but whose source-gate must be less than 5 V, is used as the high-side switch. The proposed driving circuit provides a stable and accurate 5 V driving voltage for protecting the high-side switch from breakdown and achieving low on-resistance and simple loop stability design. Furthermore, the driving circuit with excellent driving capability decreases the switching loss and dead time is also developed to reduce the shoot-through current loss. Therefore, power efficiency is greatly improved. An asynchronous buck regulator with the proposed technique has been successfully fabricated by a 0.35 μm CDMOS technology. From the results, compared with the accuracy of 16.38% of the driving voltage in conventional design, a high accuracy of 1.38% is achieved in this work. Moreover, power efficiency is up to 95% at 12 V input and 5 V output.-
Keywords:
- high voltage,
- buck regulator,
- PLDMOS,
- driving circuit,
- dead time
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References
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