Fig. 1.
Block diagram of the proposed regulator
DownLoad:
| Citation: |
Han Wang, Lin Tan. A transient-enhanced NMOS low dropout voltage regulator with parallel feedback compensation[J]. Journal of Semiconductors, 2016, 37(2): 025005. doi: 10.1088/1674-4926/37/2/025005
H Wang, L Tan. A transient-enhanced NMOS low dropout voltage regulator with parallel feedback compensation[J]. J. Semicond., 2016, 37(2): 025005. doi: 10.1088/1674-4926/37/2/025005.
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A transient-enhanced NMOS low dropout voltage regulator with parallel feedback compensation
doi: 10.1088/1674-4926/37/2/025005
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Abstract
This paper presents a transient-enhanced NMOS low-dropout regulator (LDO) for portable applications with parallel feedback compensation. The parallel feedback structure adds a dynamic zero to get an adequate phase margin with a load current variation from 0 to 1 A. A class-AB error amplifier and a fast charging/discharging unit are adopted to enhance the transient performance. The proposed LDO has been implemented in a 0.35 μ m BCD process. From experimental results, the regulator can operate with a minimum dropout voltage of 150 mV at a maximum 1 A load and IQ of 165 μ A. Under the full range load current step, the voltage undershoot and overshoot of the proposed LDO are reduced to 38 mV and 27 mV respectively. -
References
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