SEMICONDUCTOR DEVICES

On-wafer de-embedding techniques from 0.1 to 110 GHz

Guoping Tang1, Hongfei Yao2, Xiaohua Ma1, Zhi Jin2 and Xinyu Liu2,

+ Author Affiliations

 Corresponding author: Xinyu Liu, E-mail: xyliu@ime.ac.cn

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Abstract: On-wafer S-parameter de-embedding techniques from 0.1 to 110 GHz are researched. The solving results of thru-reflect-line (TRL) and line-reflect-match (LRM) de-embedding algorithms, when the input and output ports are asymmetric, are given. The de-embedding standards of TRL and LRM are designed on an InP substrate. The validity of the de-embedding results is demonstrated through two passive components, and the accuracy of TRL and LRM de-embedding techniques is compared from 0.1 to 110 GHz. By utilizing an LRM technique in 0.1-40 GHz and a TRL technique in 75-110 GHz, the intrinsic S-parameters of active device HBT in two frequency bands are obtained, and comparisons of the extracted small-signal current gain and the unilateral power gain before and after de-embedding are presented. The whole S-parameters of actual DUT from 0.1 to 110 GHz can be obtained by interpolation.

Key words: modelmillimeter-wavede-embedTRLLRM



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Fig. 1.  Eight-term error model.

Fig. 2.  The equivalent network topology of thru connection.

Fig. 3.  The equivalent network topology of a reflect connection.

Fig. 4.  The equivalent network topology of line connection.

Fig. 5.  The equivalent network topology of match connection.

Fig. 6.  The set of CPW standards for TRL and LRM de-embedding. (a) Thru. (b) Short. (c) Match. (d) Line of length 580 $\mu $m. (e) Line of length 1680 $\mu $m.

Fig. 7.  The measured $S$-parameters of de-embedding standards used in TRL and LRM. (a) Thru. (b) Short. (c) Load. (d) 580 $\mu $m long line. (e) 1680 $\mu $m long line.

Fig. 8.  Passive components designed to demonstrate the validity of TRL and LRM techniques. (a) Interdigital capacitor. (b) Open-stub.

Fig. 9.  Comparison of the passive components' measured data before and after de-embedding by TRL and LRM techniques with the simulated data of actual DUT when no pads are added. (a) Interdigital capacitor. (b) Open-stub.

Fig. 10.  Comparison of errors of the TRL and LRM techniques. (a) Interdigital capacitor. (b) Open-stub.

Fig. 11.  The active device InP HBT embedded in a test-structure of CPW.

Fig. 12.  The comparisons of extracted small-signal current gain $h_{21}$ and unilateral power gain $U$ of HBT at $V_{\rm c}$ of 2 V and $i_{\rm b}$ of 350 $\mu $A before and after de-embedding.

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Table 1.   The standards required for TRL and LRM.

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    Received: 06 August 2014 Revised: Online: Published: 01 May 2015

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      Guoping Tang, Hongfei Yao, Xiaohua Ma, Zhi Jin, Xinyu Liu. On-wafer de-embedding techniques from 0.1 to 110 GHz[J]. Journal of Semiconductors, 2015, 36(5): 054012. doi: 10.1088/1674-4926/36/5/054012 G P Tang, H F Yao, X H Ma, Z Jin, X Y Liu. On-wafer de-embedding techniques from 0.1 to 110 GHz[J]. J. Semicond., 2015, 36(5): 054012. doi: 10.1088/1674-4926/36/5/054012.Export: BibTex EndNote
      Citation:
      Guoping Tang, Hongfei Yao, Xiaohua Ma, Zhi Jin, Xinyu Liu. On-wafer de-embedding techniques from 0.1 to 110 GHz[J]. Journal of Semiconductors, 2015, 36(5): 054012. doi: 10.1088/1674-4926/36/5/054012

      G P Tang, H F Yao, X H Ma, Z Jin, X Y Liu. On-wafer de-embedding techniques from 0.1 to 110 GHz[J]. J. Semicond., 2015, 36(5): 054012. doi: 10.1088/1674-4926/36/5/054012.
      Export: BibTex EndNote

      On-wafer de-embedding techniques from 0.1 to 110 GHz

      doi: 10.1088/1674-4926/36/5/054012
      Funds:

      Project supported by the National Natural Science Foundation of China (No.61401457).

      More Information
      • Corresponding author: E-mail: xyliu@ime.ac.cn
      • Received Date: 2014-08-06
      • Accepted Date: 2014-11-17
      • Published Date: 2015-01-25

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