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A Design for Triple-Valued NAND and NOR Gates Based on Resonant Tunneling Devices

Lin Mi, Lü Weifeng and Sun Lingling

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Abstract: The unique negative differential resistance characteristics lead the RT (resonant tunnel) devices to multiple-valued applications.In this paper,an RT switching circuit model is proposed,ternary NAND and NOR circuits are designed based on the switching sequence theory using RT devices,and they have correct logic certified by the SPICE simulation using MOS net model.This method can be used in other multiple-valued circuits design.

Key words: RT device, multiple-valued logic, switching sequence, NAND, NOR

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    Received: 18 August 2015 Revised: 07 July 2007 Online: Published: 01 December 2007

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      Article Navigation >  Journal of Semiconductors  > 2007  >  28(12): 1983-1987
      Lin Mi, Lü Weifeng, Sun Lingling. A Design for Triple-Valued NAND and NOR Gates Based on Resonant Tunneling Devices[J]. Journal of Semiconductors, 2007, In Press. Lin M, Lü W, Sun L L. A Design for Triple-Valued NAND and NOR Gates Based on Resonant Tunneling Devices[J]. Chin. J. Semicond., 2007, 28(12): 1983.Export: BibTex EndNote
      Citation:
      Lin Mi, Lü Weifeng, Sun Lingling. A Design for Triple-Valued NAND and NOR Gates Based on Resonant Tunneling Devices[J]. Journal of Semiconductors, 2007, In Press.

      Lin M, Lü W, Sun L L. A Design for Triple-Valued NAND and NOR Gates Based on Resonant Tunneling Devices[J]. Chin. J. Semicond., 2007, 28(12): 1983.
      Export: BibTex EndNote
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      A Design for Triple-Valued NAND and NOR Gates Based on Resonant Tunneling Devices

      • College of Electronic and Information,Hangzhou Dianzi University,Hangzhou 310018,China

      • Department of Information Science and Electronic Engineering,Zhejiang University,Hangzhou 310027,China

      • College of Electronic and Information,Hangzhou Dianzi University,Hangzhou 310018,China

      • College of Electronic and Information,Hangzhou Dianzi University,Hangzhou 310018,China

      • Department of Information Science and Electronic Engineering,Zhejiang University,Hangzhou 310027,China

      • Received Date: 2015-08-18
      • Accepted Date: 2007-05-20
      • Revised Date: 2007-07-07
      • Published Date: 2007-11-28

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