SEMICONDUCTOR INTEGRATED CIRCUITS

Design and analysis of a three-stage voltage-controlled ring oscillator

Xuemei Lei1, 2, Zhigong Wang1, and Lianfeng Shen1

+ Author Affiliations

 Corresponding author: Wang Zhigong, zgwang@seu.edu.cn

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Abstract: This paper describes a large tuning range low phase noise voltage-controlled ring oscillator (ring VCO) based on a different cascade voltage logic delay cell with current-source load to change the current of output node. The method for optimization is presented. Furthermore, the analysis of performance of the proposed ring VCO is confirmed by the measurement results. The three-stage proposed ring VCO was fabricated in the 180-nm CMOS process of SMIC. The measurement results show that the oscillator frequency of the ring VCO is from 0.770 to 5.286 GHz and the phase noise is 97.93 dBc/Hz at an offset of 1 MHz from 5.268 GHz with a total power of 15.1 mW from a 1.8 V supply while occupying only 0.00175 mm2 of the core die area.

Key words: large tuning rangring VCOdifferent cascade voltage logiclow phase noise



[1]
Shin J, Shin H. A 1.9-3.8 GHz Δ Σ fractional-N PLL frequency synthesizer with fast auto-calibration of loop bandwidth and VCO frequency. IEEE J Solid-State Circuits, 2012, 47(3):665 doi: 10.1109/JSSC.2011.2179733
[2]
Sai A, Kobayashi Y, Saigusa S, et al. A digitally stabilized type-Ⅲ PLL using ring VCO with 1.01 psrms integrated jitter in 65 nm CMOS. IEEE International Solid-State Circuits Conference, 2012:248
[3]
Savoj J, Razavi B. A 10-Gb/s CMOS clock and data recovery circuit with a half-rate linear phase detector. IEEE J Solid-State Circuits, 2001, 36(5):761 doi: 10.1109/4.918913
[4]
Reddy K, Rao S, Inti R, et al. A 16 mW 78 dB-SNDR 10 MHz-BW CT-Δ Σ ADC using residue-cancelling VCO-based quantizer. IEEE International Solid-State Circuits Conference, 2012:152
[5]
Li G, Afshari E. A low-phase-noise wide-tuning-range quadrature oscillator in 65 nm CMOS. IEEE Custom Integrated Circuits Conference (CICC), 2012:1 https://experts.umich.edu/en/publications/a-low-phase-noise-wide-tuning-range-quadrature-oscillator-in-65nm
[6]
Fiorelli R, Peralías E J, Silveira F. LC-VCO design optimization methodology based on the gm/ID ratio for nanometer CMOS technologies. IEEE Trans Microw Theory Tech, 2011, 59(7):1822 doi: 10.1109/TMTT.2011.2132735
[7]
Abidi A A. Phase noise and jitter in CMOS ring oscillators. IEEE J Solid-State Circuits, 2006, 41(8):1803 doi: 10.1109/JSSC.2006.876206
[8]
Li Z, K K O. A low-phase-noise and low-power multiband CMOS voltage-controlled oscillator. IEEE J Solid State Circuits, 2005, 40(6):1296 doi: 10.1109/JSSC.2005.848031
[9]
Berny A D, Niknejad A M, Meyer R G. A 1.8 GHz LC VCO with 1.3 GHz tuning range and digital amplitude calibration. IEEE J Solid-State Circuits, 2005, 40(4):909 doi: 10.1109/JSSC.2004.842851
[10]
Fard A, Johnson T, Linder M, et al. A comparative study of CMOS LC VCO topologies for wide-band multi-standard transceivers. 47th Midwest Symp Circuits and Systems Conference, 2004, 3:17
[11]
Panigrahi J K, Acharya D P. Performance analysis and design of wideband CMOS voltage controlled ring oscillator. International Conference on Industrial and Information Systems (ICⅡS), 2010:234
[12]
Razavi B. A study of phase noise in CMOS oscillators. IEEE J Solid-State Circuits, 1996, 31(3):331 doi: 10.1109/4.494195
[13]
Demir A, Mehrotra A, Roychowdhury J. Phase noise in oscillators:a unifying theory and numerical methods for characterization. IEEE Trans Circuits Syst Ⅰ, 2000, 47(5):655 doi: 10.1109/81.847872
[14]
Ham D, Hajimiri A. Concepts and methods in optimization of integrated LC VCOs. IEEE J Solid-State Circuits, 2001, 36(6):896 doi: 10.1109/4.924852
[15]
Yan W S T, Luong H C. A 900-MHz CMOS low-phase-noise voltage-controlled ring oscillator. IEEE Trans Circuits Syst Ⅱ, 2001, 48(2):216 doi: 10.1109/82.917794
[16]
Choi J, Lim K, Laskar J. A ring VCO with wide and linear tuning characteristics for a cognitive radio system. IEEE Radio Frequency Integrated Circuits Symp, 2008:395
[17]
Fahs B, Ali-Ahmad W Y, Gamand P. A two-stage ring oscillator in 0.13-μm CMOS for UWB impulse radio. IEEE Trans Microw Theory Tech, 2009, 57(5):1074 doi: 10.1109/TMTT.2009.2017246
[18]
Chen Z Z, Lee T C. The design and analysis of dual-delay-path ring oscillators. IEEE Trans Circuits Syst Ⅰ, 2011, 58(3):470 doi: 10.1109/TCSI.2010.2072390
[19]
Kim J M, Kim S, Lee I Y, et al. A low-noise four-stage voltage-controlled ring oscillator in deep-sub micrometer CMOS technology. IEEE Trans Circuits Syst Ⅱ, 2013, 60(2):71 doi: 10.1109/TCSII.2012.2235734
Fig. 1.  Circuit implementation of the proposed ring VCO. (a) Delay cell. (b) Ring oscillator.

Fig. 2.  Equivalent circuit of the proposed half delay cell.

Fig. 3.  Simple circuit of the proposed half delay cell with a noise source.

Fig. 4.  Chip photograph of the proposed ring VCO.

Fig. 5.  The measured $f$-$V$ curve of the proposed ring VCO.

Fig. 6.  The measured phase noise of oscillation (a) at 5.288 GHz and (b) at 0.770 GHz.

Fig. 7.  FOM of measurement and simulation.

Table 1.   Comparison with the published result.

[1]
Shin J, Shin H. A 1.9-3.8 GHz Δ Σ fractional-N PLL frequency synthesizer with fast auto-calibration of loop bandwidth and VCO frequency. IEEE J Solid-State Circuits, 2012, 47(3):665 doi: 10.1109/JSSC.2011.2179733
[2]
Sai A, Kobayashi Y, Saigusa S, et al. A digitally stabilized type-Ⅲ PLL using ring VCO with 1.01 psrms integrated jitter in 65 nm CMOS. IEEE International Solid-State Circuits Conference, 2012:248
[3]
Savoj J, Razavi B. A 10-Gb/s CMOS clock and data recovery circuit with a half-rate linear phase detector. IEEE J Solid-State Circuits, 2001, 36(5):761 doi: 10.1109/4.918913
[4]
Reddy K, Rao S, Inti R, et al. A 16 mW 78 dB-SNDR 10 MHz-BW CT-Δ Σ ADC using residue-cancelling VCO-based quantizer. IEEE International Solid-State Circuits Conference, 2012:152
[5]
Li G, Afshari E. A low-phase-noise wide-tuning-range quadrature oscillator in 65 nm CMOS. IEEE Custom Integrated Circuits Conference (CICC), 2012:1 https://experts.umich.edu/en/publications/a-low-phase-noise-wide-tuning-range-quadrature-oscillator-in-65nm
[6]
Fiorelli R, Peralías E J, Silveira F. LC-VCO design optimization methodology based on the gm/ID ratio for nanometer CMOS technologies. IEEE Trans Microw Theory Tech, 2011, 59(7):1822 doi: 10.1109/TMTT.2011.2132735
[7]
Abidi A A. Phase noise and jitter in CMOS ring oscillators. IEEE J Solid-State Circuits, 2006, 41(8):1803 doi: 10.1109/JSSC.2006.876206
[8]
Li Z, K K O. A low-phase-noise and low-power multiband CMOS voltage-controlled oscillator. IEEE J Solid State Circuits, 2005, 40(6):1296 doi: 10.1109/JSSC.2005.848031
[9]
Berny A D, Niknejad A M, Meyer R G. A 1.8 GHz LC VCO with 1.3 GHz tuning range and digital amplitude calibration. IEEE J Solid-State Circuits, 2005, 40(4):909 doi: 10.1109/JSSC.2004.842851
[10]
Fard A, Johnson T, Linder M, et al. A comparative study of CMOS LC VCO topologies for wide-band multi-standard transceivers. 47th Midwest Symp Circuits and Systems Conference, 2004, 3:17
[11]
Panigrahi J K, Acharya D P. Performance analysis and design of wideband CMOS voltage controlled ring oscillator. International Conference on Industrial and Information Systems (ICⅡS), 2010:234
[12]
Razavi B. A study of phase noise in CMOS oscillators. IEEE J Solid-State Circuits, 1996, 31(3):331 doi: 10.1109/4.494195
[13]
Demir A, Mehrotra A, Roychowdhury J. Phase noise in oscillators:a unifying theory and numerical methods for characterization. IEEE Trans Circuits Syst Ⅰ, 2000, 47(5):655 doi: 10.1109/81.847872
[14]
Ham D, Hajimiri A. Concepts and methods in optimization of integrated LC VCOs. IEEE J Solid-State Circuits, 2001, 36(6):896 doi: 10.1109/4.924852
[15]
Yan W S T, Luong H C. A 900-MHz CMOS low-phase-noise voltage-controlled ring oscillator. IEEE Trans Circuits Syst Ⅱ, 2001, 48(2):216 doi: 10.1109/82.917794
[16]
Choi J, Lim K, Laskar J. A ring VCO with wide and linear tuning characteristics for a cognitive radio system. IEEE Radio Frequency Integrated Circuits Symp, 2008:395
[17]
Fahs B, Ali-Ahmad W Y, Gamand P. A two-stage ring oscillator in 0.13-μm CMOS for UWB impulse radio. IEEE Trans Microw Theory Tech, 2009, 57(5):1074 doi: 10.1109/TMTT.2009.2017246
[18]
Chen Z Z, Lee T C. The design and analysis of dual-delay-path ring oscillators. IEEE Trans Circuits Syst Ⅰ, 2011, 58(3):470 doi: 10.1109/TCSI.2010.2072390
[19]
Kim J M, Kim S, Lee I Y, et al. A low-noise four-stage voltage-controlled ring oscillator in deep-sub micrometer CMOS technology. IEEE Trans Circuits Syst Ⅱ, 2013, 60(2):71 doi: 10.1109/TCSII.2012.2235734
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    Received: 29 April 2013 Revised: 08 June 2013 Online: Published: 01 November 2013

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      Xuemei Lei, Zhigong Wang, Lianfeng Shen. Design and analysis of a three-stage voltage-controlled ring oscillator[J]. Journal of Semiconductors, 2013, 34(11): 115003. doi: 10.1088/1674-4926/34/11/115003 X M Lei, Z G Wang, L F Shen. Design and analysis of a three-stage voltage-controlled ring oscillator[J]. J. Semicond., 2013, 34(11): 115003. doi: 10.1088/1674-4926/34/11/115003.Export: BibTex EndNote
      Citation:
      Xuemei Lei, Zhigong Wang, Lianfeng Shen. Design and analysis of a three-stage voltage-controlled ring oscillator[J]. Journal of Semiconductors, 2013, 34(11): 115003. doi: 10.1088/1674-4926/34/11/115003

      X M Lei, Z G Wang, L F Shen. Design and analysis of a three-stage voltage-controlled ring oscillator[J]. J. Semicond., 2013, 34(11): 115003. doi: 10.1088/1674-4926/34/11/115003.
      Export: BibTex EndNote

      Design and analysis of a three-stage voltage-controlled ring oscillator

      doi: 10.1088/1674-4926/34/11/115003
      Funds:

      the Research Project of Science and Technology at Universities of Inner Mongolia Autonomous Region NJZY11016

      the Innovation Fund of Ministry of Science & Technology for Small and Medium Sized Enterprises, China 11C26213211234

      Project supported by the Research Project of Science and Technology at Universities of Inner Mongolia Autonomous Region (No. NJZY11016) and the Innovation Fund of Ministry of Science & Technology for Small and Medium Sized Enterprises, China (No. 11C26213211234)

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      • Corresponding author: Wang Zhigong, zgwang@seu.edu.cn
      • Received Date: 2013-04-29
      • Revised Date: 2013-06-08
      • Published Date: 2013-11-01

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