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A review of thermal rectification in solid-state devices

Faraz Kaiser Malik and Kristel Fobelets

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 Corresponding author: Faraz Kaiser Malik, f.malik21@imperial.ac.uk

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Abstract: Thermal rectification, or the asymmetric transport of heat along a structure, has recently been investigated as a potential solution to the thermal management issues that accompany the miniaturization of electronic devices. Applications of this concept in thermal logic circuits analogous to existing electronics-based processor logic have also been proposed. This review highlights some of the techniques that have been recently investigated for their potential to induce asymmetric thermal conductivity in solid-state structures that are composed of materials of interest to the electronics industry. These rectification approaches are compared in terms of their quantitative performance, as well as the range of practical applications that they would be best suited to. Techniques applicable to a range of length scales, from the continuum regime to quantum dots, are discussed, and where available, experimental findings that build upon numerical simulations or analytical predictions are also highlighted.

Key words: thermal rectificationjoule heatingsolid-state devices



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Fig. 1.  Energy band diagram of an interface between dissimilar metals separated by a dielectric. $ {E}_{\mathrm{w}\mathrm{s}} $ is the work function of the oxide layer, while $ {E}_{\mathrm{w}i} $ and $ {E}_{\mathrm{m}i} $ represent the work function and Fermi level respectively of metal i. Reprinted from Moon and Keeler[28], Copyright 1962, with permission from Elsevier.

Fig. 2.  (Color online) Illustration of a thermal rectification system constituted of two materials with differing temperature dependence of thermal conductivity, $ \kappa $ under (a) forward and (b) reverse thermal bias. Reprinted with permission from Arora et al.[42], Copyright 2017 by the American Physical Society.

Fig. 3.  (a) Illustration of the thickness-asymmetric graphene nanoribbon and (b) variation of the thermal conductivity of the specimen with temperature and grain orientation under forward and reverse thermal bias. Reprinted from Zhong et al.[56], with the permission of AIP Publishing.

Fig. 4.  (Color online) Illustration of a thermally rectifying pillared graphene–monolayer graphene structure. Reprinted with permission from Yousefi et al.[57], © IOP Publishing.

Fig. 5.  (Color online) (a) Illustration of the asymmetric tilt grain boundary and (b) the resulting inequality in thermal conductivity of the specimen under opposing thermal bias. Reprinted from Cao et al.[58], Copyright 2012, with permission from Elsevier.

Fig. 6.  (Color online) (a) Illustration of the asymmetric graphene/h-BN heterostructures and (b) variation of the thermal rectification efficiency with the asymmetricity parameter. Note that $ {W}_{\mathrm{L}\mathrm{R}}=1.0 $ represents the geometrically symmetric case, and hBN-G represents the case where graphene is at the narrower end of the ribbon, and vice versa. Reprinted from Sandonas et al.[13], Copyright 2017, with permission from Elsevier.

Fig. 7.  (Color online) (a) Illustration of the graphene/h-BN heterostructure, and the variation of the thermal rectification efficiency and (b) forward and reverse heat flux with the inter-layer coupling strength $ \chi $. Adapted with permission from Chen et al.[51]. Copyright 2020 American Chemical Society.

Fig. 8.  Illustration of the (a) monolayer graphene nanoribbon/silicon and (b) vertical carbon nanotube/silicon heterostructures. Reprinted from Vallabhaneni et al.[61], with the permission of AIP Publishing.

Fig. 9.  (Color online) (a) Schematic illustration of the triangular and rectangular graphene nanoribbon geometries. (b) A comparison of the heat flux under forward and reverse thermal bias Δ with $ L=3.4 $ nm, ${W}_{\mathrm{b}\mathrm{o}\mathrm{t}}=4.2$ nm, $ {W}_{\mathrm{t}\mathrm{o}\mathrm{p}}=0.42 $ nm, and $ \theta =60 $°, and (c) the resulting thermal rectification efficiency. For Δ $ > 0 $, $ {T}_{\mathrm{t}\mathrm{o}\mathrm{p}} < {T}_{\mathrm{b}\mathrm{o}\mathrm{t}} $. Reprinted from Yang et al.[69], with the permission of AIP Publishing.

Fig. 10.  (Color online) (a) Asymmetric geometrical MoS2 ribbon shapes. (b) Variation of temperature along the length of symmetric and trapezoidal nanoribbons with circles and squares representing forward and reverse thermal bias respectively. (c) Variation of the thermal rectification efficiency with geometrical asymmetricity for the three different ribbon shapes. (d) A comparison of the phonon participation ratios under opposing thermal biases for T-shaped ribbons with $ {W}_{\mathrm{L}\mathrm{R}}=3.0 $. Reproduced from Sandonas et al.[72], with permission from the Royal Society of Chemistry.

Fig. 11.  (Color online) (a) Thermal analysis of the three different geometrically asymmetric MoS2 nanoribbons in the forward bias direction and (b) comparison of the experimentally determined thermal rectification efficiency of the three structures calculated as $\eta =({J}^{+}-{J}^{-})/{J}^{+}$. Recalculated value according to Eq. (1) presented in Table 1. Adapted with permission from Yang et al.[73], Copyright 2020 American Chemical Society.

Fig. 12.  (Color online) Illustration of the asymmetrically defective single-walled carbon nanotube, and the one-dimensional model used to simulate the system. Reprinted by permission from Springer Nature: Springer Journal of Mechanical Science and Technology, Hayashi et al.[76], Copyright 2011.

Fig. 13.  (Color online) A comparison of the thermal conductivity spectra for pristine graphene and 500 nm-long defective graphene. Reprinted with permission from Arora et al.[42], Copyright 2017 by the American Physical Society.

Fig. 14.  (Color online) An illustration of the origin of thermal rectification in asymmetrically defective structures in terms of spatial asymmetry in the thermal conductivity $ \lambda $. Reprinted from Wang et al.[19].

Fig. 15.  (Color online) Influence of thermal bias on the overlap in the phonon density of states $ {D}_{\mathrm{p}} $ of graphene measured at a location before and after the defective region. Reprinted from Nobakht et al.[78], Copyright 2018, with permission from Elsevier.

Fig. 16.  (Color online) Influence of vacancy pattern modifications on the thermal rectification in micrometre-length silicon at room temperature. ‘Hierarchical’ indicates the presence of smaller pores between the larger ones, while ‘compressed’ refers to reduced interpore distances. Reprinted from Chakraborty et al.[11], with the permission of AIP Publishing.

Fig. 17.  (Color online) Illustration of the experimentally determined thermal rectification in a porous silicon membrane. Adapted from Kasprzak et al.[82].

Table 1.   Comparison of the maximum thermal rectification efficiency reported according to Eq. (1) in previous literature using different rectification mechanisms.

Referenceη (%)Rectification StructureMechanism
Giazotto & Bergeret[18]123Normal metal-superconductor nanojunctionElectronic thermal rectification
Martinez-Perez & Giazotto[30]800Josephson tunnel junction
Martinez-Perez et al.[31]13900Normal metal-insulator-superconductor junction
Scheibner et al.[34]11GaAs/(Al,Ga)As QD
Kuo & Chang[35]733Si/SiO2 QDs with vacuum layer between QD and metallic contact layers
Zhang & Su[36]400Parallel-coupled double QD system
Rogers[27]100Steel–aluminium interfaceGeometrically
symmetric interface between dissimilar materials
Hu et al.[40]45Silicon–amorphous polyethylene interface
Kobayashi et al.[41]43LaCoO3–La0.7Sr0.3CoO3 interface
Farzadian et al.[52]57Graphene–carbon nitride interface
Liu et al.[54]36Monolayer graphene–silicene interface
Cao et al.[58]74Armchair graphene–zigzag graphene interface
Ordonez-Miranda et al.[45]20PCM-based dissimilar material interface
Pallecchi et al.[46]96
Cottrill et al.[47]160
Hirata et al.[48]170
Kasali et al.[49]150
Zhong et al.[56]110Asymmetric thickness graphene nanoribbonOut-of-plane
geometrical asymmetry across interface
Yousefi et al.[57]5Pillared graphene–monolayer graphene interface
Sandonas et al.[13]79Planar asymmetric graphene/h-BN nanoribbonsGeometrical asymmetry and dissimilar material interface
Chen et al.[51]280Asymmetric thickness graphene/h-BN nanoribbons
Vallabhaneni et al.[61]26Silicon–carbon nanotube/graphene nanoribbon interface
Li et al.[62]90Double-walled graphene/h-BN nanotube
Bui et al.[66]124Double-walled carbon nanotube
Chang et al.[67]7Asymmetrically mass-loaded nanotube
Wang et al.[19]11Geometrically asymmetric graphene nanoribbonsGraded exterior geometry
Yang et al.[69]350
Hu et al.[70]120
Wang et al.[71]40
Sandonas et al.[72]30Asymmetric molybdenum disulfide nanoribbons
Yang et al.[73]233
Han et al.[74]168Weakly compressed 3D graphite nanocone
Chakraborty et al.[11]60Asymmetrically defective silicon structuresAsymmetrically
defective
single-material
structures
Kasprzak et al.[82]14
Wang et al.[19]28Asymmetrically defective graphene structures
Arora et al.[42]233
Nobakht et al.[78]355
Yousefi et al.[80]6
Zhao et al.[81]46
Miller et al.[75]155Asymmetric pyramidal inclusions
Hayashi et al.[76]60Asymmetrically defective single-walled carbon nanotubes
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Thompson S E, Parthasarathy S. Moore's law: The future of Si microelectronics. Mater Today, 2006, 9, 20 doi: 10.1016/S1369-7021(06)71539-5
[2]
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[3]
Pop E. Energy dissipation and transport in nanoscale devices. Nano Res, 2010, 3, 147 doi: 10.1007/s12274-010-1019-z
[4]
Malik F K, Talha T, Ahmed F. A parametric study of the effects of critical design parameters on the performance of nanoscale silicon devices. Nanomaterials, 2020, 10, 1987 doi: 10.3390/nano10101987
[5]
Vasileska D, Raleva K, Goodnick S M. Modeling heating effects in nanoscale devices: The present and the future. J Comput Electron, 2008, 7, 66 doi: 10.1007/s10825-008-0254-y
[6]
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[7]
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[8]
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[9]
Wong M Y, Tso C Y, Ho T C, et al. A review of state of the art thermal diodes and their potential applications. Int J Heat Mass Transf, 2021, 164, 120607 doi: 10.1016/j.ijheatmasstransfer.2020.120607
[10]
Chiu C L, Wu C H, Huang B W, et al. Detecting thermal rectification. AIP Adv, 2016, 6, 121901 doi: 10.1063/1.4968613
[11]
Chakraborty D, Brooke J, Hulse N C S, et al. Thermal rectification optimization in nanoporous Si using Monte Carlo simulations. J Appl Phys, 2019, 126, 184303 doi: 10.1063/1.5119806
[12]
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[13]
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    Received: 29 March 2022 Revised: 23 May 2022 Online: Uncorrected proof: 22 July 2022Accepted Manuscript: 22 July 2022Published: 01 October 2022

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      Faraz Kaiser Malik, Kristel Fobelets. A review of thermal rectification in solid-state devices[J]. Journal of Semiconductors, 2022, 43(10): 103101. doi: 10.1088/1674-4926/43/10/103101 F K Malik, K Fobelets. A review of thermal rectification in solid-state devices[J]. J. Semicond, 2022, 43(10): 103101. doi: 10.1088/1674-4926/43/10/103101Export: BibTex EndNote
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      Faraz Kaiser Malik, Kristel Fobelets. A review of thermal rectification in solid-state devices[J]. Journal of Semiconductors, 2022, 43(10): 103101. doi: 10.1088/1674-4926/43/10/103101

      F K Malik, K Fobelets. A review of thermal rectification in solid-state devices[J]. J. Semicond, 2022, 43(10): 103101. doi: 10.1088/1674-4926/43/10/103101
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      A review of thermal rectification in solid-state devices

      doi: 10.1088/1674-4926/43/10/103101
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      • Author Bio:

        Faraz Kaiser Malik received the M.S. degree in mechanical engineering from the National University of Sciences and Technology, Islamabad, Pakistan, in 2020. He is currently pursuing the Ph.D. degree in electrical and electronic engineering from Imperial College London as a Commonwealth PhD Scholar. His research interests include thermal energy storage, waste heat recovery, and the development of non-invasive electrochemical biosensors

        Kristel Fobelets received the Ph.D. degree in microelectronics from the VUB and IMEC, Belgium. She is currently an Associate Professor with the Electrical and Electronic Engineering Department, Imperial College London. She has contributed to more than 180 journal and conference papers covering GaAs and SiGe optical and electronic devices, silicon nanowire-based energy generation, storage and sensor devices, TCAD of self-heating and cooling in GAA FETs and the development of knitted electronic garments

      • Corresponding author: f.malik21@imperial.ac.uk
      • Received Date: 2022-03-29
      • Revised Date: 2022-05-23
      • Available Online: 2022-07-22

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