J. Semicond. > 2022, Volume 43 > Issue 12 > 122802, doi: 10.1088/1674-4926/43/12/122802
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ARTICLES

A 4H-SiC semi-super-junction shielded trench MOSFET: p-pillar is grounded to optimize the electric field characteristics

Xiaojie Wang1, Zhanwei Shen2, , Guoliang Zhang1, Yuyang Miao1, Tiange Li1, Xiaogang Zhu1, Jiafa Cai1, Rongdun Hong1, 3, Xiaping Chen1, Dingqu Lin1, Shaoxiong Wu1, Yuning Zhang1, Deyi Fu1, Zhengyun Wu1 and Feng Zhang1, 4,

+ Author Affiliations

 Corresponding author: Zhanwei Shen, zwshen@semi.ac.cn; Feng Zhang, fzhang@xmu.edu.cn

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Abstract: A 4H-SiC trench gate metal–oxide–semiconductor field-effect transistor (UMOSFET) with semi-super-junction shielded structure (SS-UMOS) is proposed and compared with conventional trench MOSFET (CT-UMOS) in this work. The advantage of the proposed structure is given by comprehensive study of the mechanism of the local semi-super-junction structure at the bottom of the trench MOSFET. In particular, the influence of the bias condition of the p-pillar at the bottom of the trench on the static and dynamic performances of the device is compared and revealed. The on-resistance of SS-UMOS with grounded (G) and ungrounded (NG) p-pillar is reduced by 52% (G) and 71% (NG) compared to CT-UMOS, respectively. Additionally, gate oxide in the GSS-UMOS is fully protected by the p-shield layer as well as semi-super-junction structure under the trench and p-base regions. Thus, a reduced electric-field of 2 MV/cm can be achieved at the corner of the p-shield layer. However, the quasi-intrinsic protective layer cannot be formed in NGSS-UMOS due to the charge storage effect in the floating p-pillar, resulting in a large electric field of 2.7 MV/cm at the gate oxide layer. Moreover, the total switching loss of GSS-UMOS is 1.95 mJ/cm2 and is reduced by 18% compared with CT-UMOS. On the contrary, the NGSS-UMOS has the slowest overall switching speed due to the weakened shielding effect of the p-pillar and the largest gate-to-drain capacitance among the three. The proposed GSS-UMOS plays an important role in high-voltage and high-frequency applications, and will provide a valuable idea for device design and circuit applications.

Key words: breakdown voltage, specific on-resistance, silicon carbide, switching energy loss, super-junction-shield (SS), trench gate MOSFET, grounded (G), ungrounded (NG)



[1]
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[2]
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[3]
Gao Y, Huang A, Krishnaswami S, et al. Comparison of static and switching characteristics of 1200V 4H-SiC BJT and 1200V Si-IGBT. Conf Rec IAS Annu Meet IEEE Ind Appl Soc, 2006, 1, 325 doi: 10.1109/IAS.2006.256541
[4]
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[6]
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Wang D B, Feng Q Y, Chen X P, et al. Failure analysis and improvement of 60 V power UMOSFET. Microelectron Reliab, 2014, 54, 2782 doi: 10.1016/j.microrel.2014.07.003
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Juang M H, Chen W T, Ou-Yang C I, et al. Fabrication of trench-gate power MOSFETs by using a dual doped body region. Solid State Electron, 2004, 48, 1079 doi: 10.1016/j.sse.2003.07.007
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Onishi Y, Hashimoto Y. Numerical analysis of specific on-resistance for trench gate superjunction MOSFETs. Jpn J Appl Phys, 2015, 54, 024101 doi: 10.7567/JJAP.54.024101
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Wang Y, Lan H, Cao F, et al. A novel power UMOSFET with a variable K dielectric layer. Chin Phys B, 2012, 21, 068503 doi: 10.1088/1674-1056/21/6/068503
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Huang Q Y, Huang A Q. Hybrid low-frequency switch for bridgeless PFC. IEEE Trans Power Electron, 2020, 35, 9982 doi: 10.1109/TPEL.2020.2978698
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Wang Y, Hu H F, Yu C H, et al. High-performance split-gate enhanced UMOSFET with p-pillar structure. IEEE Trans Electron Devices, 2013, 60, 2302 doi: 10.1109/TED.2013.2260547
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Kobayashi Y, Kyogoku S, Morimoto T, et al. High-temperature performance of 1.2 kV-class SiC super junction MOSFET. 2019 31st International Symposium on Power Semiconductor Devices and ICs, 2019, 31 doi: 10.1109/ISPSD.2019.8757609
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Fig. 1.  (Color online) Schematic cross-sections of (a) the CT-UMOS and (b) proposed SS-UMOS (G & NG) (Please refer to Table 1 for detailed parameters).

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Fig. 2.  (Color online) Process flow of the proposed SS-UMOS (G & NG) structure of SiC MOSFET.

DownLoad: Full-Size Img PowerPoint
Fig. 3.  (Color online) (a) The transfer characteristic curves (VDS = 5 V), (b) output characteristic curves and current density of (c) CT-UMOS, (d) GSS-UMOS, (e) NGSS-UMOS. (VGS = 15 V, VDS = 20 V)

DownLoad: Full-Size Img PowerPoint
Fig. 4.  (Color online) (a) Breakdown characteristic curves, (b–d) corresponding electric field distributions (VGS = 0 V, VDS = 1200 V), two-dimensional electric fields of (e) CT-UMOS and (f) GSS-UMOS (VGS = 0 V, VDS = 1200 V), and current density distribution of (g) CT-UMOS and (h) GSS-UMOS at breakdown voltage.

DownLoad: Full-Size Img PowerPoint
Fig. 5.  (Color online) (a) Feedback capacitance CGD as a function of drain voltage VDS at gate voltage VGS = 0 V and (b) voltage VGS as a function of gate charge QG and the inset is the testing circuit for QG.

DownLoad: Full-Size Img PowerPoint
Fig. 6.  (Color online) (a) Test circuit of switch characteristics, (b) voltage and current characteristic of the GSS-UMOS in the switching transients, (c) detailed comparisons of the turn-on and turn-off transients for the CT-UMOS and SS-UMOS (G & NG) at switching frequency of 33 kHz, (d) the switching frequency is 50 kHz, (e) the switching frequency is 75 kHz, (f) comparison of the switching loss at different switching frequencies.

DownLoad: Full-Size Img PowerPoint
Fig. 7.  (Color online) The relationship between the total power loss and switching frequency.

DownLoad: Full-Size Img PowerPoint

Table 1.   Device parameters for CT-UMOS and SS-UMOS (G & NG).

Device parameterCT-UMOSSS-UMOS
p-body junction depth (μm)0.50.5
p+ junction depth (μm)0.20.2
Gate trench depth (μm)1.81.8
Thickness of n-drift (μm)1212
n-pillar depth (Tt) (μm)–1.5
p-pillar depth (Tt) (μm)–1.5
n-pillar depth (Tc) (μm)–2.8
p-pillar depth (Tc) (μm)–2.8
p-pillar width (Wc) (μm)–2.2
p-pillar width (Wt) (μm)–1.6
Width of trench (μm)2.02.0
n-drift doping concentration (1015 cm−3)1.01.0
p-body doping concentration (1017 cm−3)1.01.0
p-pillar doping concentration (1016 cm−3)–3.0
n-pillar doping concentration (1016 cm−3)–2.0
DownLoad: CSV

Table 2.   Comparisons of the characteristics for the CT-UMOS and the SS-UMOS (G & NG).

ParameterCT-UMOSGSS-UMOSNGSS-UMOSr
Isat (kA/cm2)2.403.906.70
Ron,sp (mΩ·cm2) 6.203.001.80
BV (V)124017501530
Eox-max (MV/cm)3.002.202.70
Eox (MV/cm)1.501.002.70
Etotal (mJ/cm2)2.401.95–
FOM (kV2/(mΩ·cm2))0.260.901.30
QGD (nC/cm2)24580450
QG (nC/cm2)302829222980
Ciss (nF/cm2)6730 108
QGD·Ron,sp (mΩ·nC)1550240810
DownLoad: CSV
[1]
Shin G, Lee W C. High frequency switching inverter using Si and SiC. J Korean Institute Illumin Electr Instal Eng, 2017, 31, 45
[2]
Hatakeyama T, Watanabe T, Shinohe T, et al. Impact ionization coefficients of 4H silicon carbide. Appl Phys Lett, 2004, 85, 1380 doi: 10.1063/1.1784520
[3]
Gao Y, Huang A, Krishnaswami S, et al. Comparison of static and switching characteristics of 1200V 4H-SiC BJT and 1200V Si-IGBT. Conf Rec IAS Annu Meet IEEE Ind Appl Soc, 2006, 1, 325 doi: 10.1109/IAS.2006.256541
[4]
Hosseini Aghdam G. Comparison of Si and SiC power semiconductor devices in power electronics converters to be used in plug-In hybrid electric vehicles. EPE J, 2012, 22, 20 doi: 10.1080/09398368.2012.11463814
[5]
Jordan J, Esteve V, Sanchis-Kilders E, et al. A comparative performance study of a 1200 V Si and SiC MOSFET intrinsic diode on an induction heating inverter. IEEE Trans Power Electron, 2013, 29, 2550 doi: 10.1109/TPEL.2013.2282658
[6]
Nayak P, Hatua K. Parasitic inductance and capacitance-assisted active gate driving technique to minimize switching loss of SiC MOSFET. IEEE Trans Ind Electron, 2017, 64, 8288 doi: 10.1109/TIE.2017.2711512
[7]
Wang D B, Feng Q Y, Chen X P, et al. Failure analysis and improvement of 60 V power UMOSFET. Microelectron Reliab, 2014, 54, 2782 doi: 10.1016/j.microrel.2014.07.003
[8]
Juang M H, Chen W T, Ou-Yang C I, et al. Fabrication of trench-gate power MOSFETs by using a dual doped body region. Solid State Electron, 2004, 48, 1079 doi: 10.1016/j.sse.2003.07.007
[9]
Kim T, Kim K. High breakdown voltage and low on-resistance 4H-SiC UMOSFET with source-trench optimization. ECS J Solid State Sci Technol, 2019, 8, Q147 doi: 10.1149/2.0091908jss
[10]
Onishi Y, Hashimoto Y. Numerical analysis of specific on-resistance for trench gate superjunction MOSFETs. Jpn J Appl Phys, 2015, 54, 024101 doi: 10.7567/JJAP.54.024101
[11]
Wang Y, Lan H, Cao F, et al. A novel power UMOSFET with a variable K dielectric layer. Chin Phys B, 2012, 21, 068503 doi: 10.1088/1674-1056/21/6/068503
[12]
Wang Y, Ma Y C, Hao Y, et al. Simulation study of 4H-SiC UMOSFET structure with p+-polySi/SiC shielded region. IEEE Trans Electron Devices, 2017, 64, 3719 doi: 10.1109/TED.2017.2723502
[13]
Zou X, Wu Z M, Wang W P, et al. Optimized design of 4H-SiC UMOSFET for high breakdown voltage. Proc SPIE 11567, AOPC 2020: Optical Sensing and Imaging Technology, 2020, 11567, 939 doi: 10.1117/12.2580265
[14]
Jozi M, Orouji A A, Fathipour M. Control of electric field in 4H-SiC UMOSFET: Physical investigation. Phys E, 2016, 83, 107 doi: 10.1016/j.physe.2016.04.010
[15]
Roig J, Stefanov E, Morancho F. Thermal behavior of a superjunction MOSFET in a high-current conduction. IEEE Trans Electron Devices, 2006, 53, 1712 doi: 10.1109/TED.2006.876277
[16]
Chen Y, Liang Y C, Samudra G S, et al. Progressive development of superjunction power MOSFET devices. IEEE Trans Electron Devices, 2008, 55, 211 doi: 10.1109/TED.2007.911344
[17]
Xia Y, Chen W J, Sun R Z, et al. A superjunction MOSFET with ultralow reverse recovery charge and low switching losses. J Electron Mater, 2021, 50, 6297 doi: 10.1007/s11664-021-09142-w
[18]
Goh J, Kim K. Low on-resistance 4H-SiC UMOSFET with local floating superjunction. J Comput Electron, 2020, 19, 234 doi: 10.1007/s10825-019-01408-1
[19]
Saito W, Omura I, Aida S, et al. Semisuperjunction MOSFETs: New design concept for lower on-resistance and softer reverse-recovery body diode. IEEE Trans Electron Devices, 2003, 50, 1801 doi: 10.1109/TED.2003.815126
[20]
Saxena R S, Kumar M J. Polysilicon spacer gate technique to reduce gate charge of a trench power MOSFET. IEEE Trans Electron Devices, 2012, 59, 738 doi: 10.1109/TED.2011.2176946
[21]
Wang Y, Liu Y J, Yu C H, et al. A novel trench-gated power MOSFET with reduced gate charge. IEEE Electron Device Lett, 2015, 36, 165 doi: 10.1109/LED.2014.2382112
[22]
Feng H, Yang W T, Onozawa Y, et al. A new fin p-body insulated gate bipolar transistor with low miller capacitance. IEEE Electron Device Lett, 2015, 36, 591 doi: 10.1109/LED.2015.2426197
[23]
Kim S G. Fabrication of superjunction trench gate power MOSFETs using BSG-doped deep trench of p-pillar. ETRI J, 2013, 35, 632 doi: 10.4218/etrij.13.1912.0012
[24]
Huang Q Y, Huang A Q. Hybrid low-frequency switch for bridgeless PFC. IEEE Trans Power Electron, 2020, 35, 9982 doi: 10.1109/TPEL.2020.2978698
[25]
Huh Y Y, Choi J M, Kim J M, et al. A study on the optimization of deep-trench super junction metal oxide semiconductor field-effect transistor. J Nanoelectron Optoelectron, 2021, 16, 781 doi: 10.1166/jno.2021.3006
[26]
Saito W, Omura I, Aida S, et al. Over 1000V semi-superjunction MOSFET with ultra-low on-resistance below the Si-limit. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005, 27 doi: 10.1109/ISPSD.2005.1487942
[27]
Vudumula P, Kotamraju S. Design and optimization of SiC super-junction MOSFET using vertical variation doping profile. IEEE Trans Electron Devices, 2019, 66, 1402 doi: 10.1109/TED.2019.2894650
[28]
Wang Y, Hu H F, Yu C H, et al. High-performance split-gate enhanced UMOSFET with p-pillar structure. IEEE Trans Electron Devices, 2013, 60, 2302 doi: 10.1109/TED.2013.2260547
[29]
Kobayashi Y, Kyogoku S, Morimoto T, et al. High-temperature performance of 1.2 kV-class SiC super junction MOSFET. 2019 31st International Symposium on Power Semiconductor Devices and ICs, 2019, 31 doi: 10.1109/ISPSD.2019.8757609
[30]
Masuda T, Saito Y, Kumazawa T, et al. 0.63 mΩ·cm2/1170 V 4H-SiC super junction V-groove trench MOSFET. 2018 IEEE International Electron Devices Meeting, 2018 doi: 10.1109/IEDM.2018.8614610
[31]
Okada M, Kyogoku S, Kumazawa T, et al. Superior short-circuit performance of SiC superjunction MOSFET. 2020 32nd International Symposium on Power Semiconductor Devices and ICs, 2020, 70 doi: 10.1109/ISPSD46842.2020.9170126
[32]
Shen P, Wang Y, Li X J, et al. Improved 4H-SiC UMOSFET with super-junction shield region. Chin Phys B, 2021, 30, 058502 doi: 10.1088/1674-1056/abd740
[33]
Cha K, Kim K. 3.3 kV 4H-SiC DMOSFET with a source-contacted dummy gate for high-frequency applications. J Semicond, 2021, 42, 062801 doi: 10.1088/1674-4926/42/6/062801
[34]
Luo X R, Liao T, Wei J, et al. A novel 4H-SiC trench MOSFET with double shielding structures and ultralow gate-drain charge. J Semicond, 2019, 40, 052803 doi: 10.1088/1674-4926/40/5/052803
[35]
Wei J, Zhang M, Jiang H P, et al. Superjunction MOSFET with dual built-In Schottky diodes for fast reverse recovery: A numerical simulation study. IEEE Electron Device Lett, 2019, 40, 1155 doi: 10.1109/LED.2019.2917556
[36]
Kang H, Lee J, Lee K, et al. Trench angle: A key design factor for a deep trench superjunction MOSFET. Semicond Sci Technol, 2015, 30, 125008 doi: 10.1088/0268-1242/30/12/125008
[37]
Wang Y D, Duan B X, Zhang C, et al. AC-SJ VDMOS with ultra‐low resistance. Micro Nano Lett, 2020, 15, 230 doi: 10.1049/mnl.2019.0497
[38]
Tian R, Ma C, Wu J M, et al. A review of manufacturing technologies for silicon carbide superjunction devices. J Semicond, 2021, 42, 061801 doi: 10.1088/1674-4926/42/6/061801
[39]
Shen Z W, Zhang F, Yan G G, et al. High-frequency switching properties and low oxide electric field and energy loss in a reverse-channel 4H-SiC UMOSFET. IEEE Trans Electron Devices, 2020, 67, 4046 doi: 10.1109/TED.2020.3005899
[40]
Kim M, Forbes J J, Hirsch E A, et al. Evaluation of long-term reliability and overcurrent capabilities of 15-kV SiC MOSFETs and 20-kV SiC IGBTs during narrow current pulsed conditions. IEEE Trans Plasma Sci, 2020, 48, 3962 doi: 10.1109/TPS.2020.3030295
[41]
Appaswamy A, Chakraborty P, Cressler J D. Influence of interface traps on the temperature sensitivity of MOSFET drain-current variations. IEEE Electron Device Lett, 2010, 31, 387 doi: 10.1109/LED.2010.2041892
[42]
Chen R Z, Wang L X, Jiu N X, et al. Simulation and result analysis of split gate resurf stepped oxide UMOFSET with floating electrode for improved performance. Electronics, 2019, 8, 1553 doi: 10.3390/electronics8121553
[43]
Yoon J, Kim K. A 3.3 kV 4H-SiC split gate MOSFET with a central implant region for superior trade-off between static and switching performance. J Semicond, 2021, 42, 062803 doi: 10.1088/1674-4926/42/6/062803
[44]
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    Received: 02 May 2022 Revised: 06 September 2022 Online: Accepted Manuscript: 14 October 2022Uncorrected proof: 17 October 2022Published: 02 December 2022

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      Article Navigation >  Journal of Semiconductors  > 2022  >  43(12): 122802
      Xiaojie Wang, Zhanwei Shen, Guoliang Zhang, Yuyang Miao, Tiange Li, Xiaogang Zhu, Jiafa Cai, Rongdun Hong, Xiaping Chen, Dingqu Lin, Shaoxiong Wu, Yuning Zhang, Deyi Fu, Zhengyun Wu, Feng Zhang. A 4H-SiC semi-super-junction shielded trench MOSFET: p-pillar is grounded to optimize the electric field characteristics[J]. Journal of Semiconductors, 2022, 43(12): 122802. doi: 10.1088/1674-4926/43/12/122802 X J Wang, Z W Shen, G L Zhang, Y Y Miao, T G Li, X G Zhu, J F Cai, R D Hong, X P Chen, D Q Lin, S X Wu, Y N Zhang, D Y Fu, Z Y Wu, F Zhang. A 4H-SiC semi-super-junction shielded trench MOSFET: p-pillar is grounded to optimize the electric field characteristics[J]. J. Semicond, 2022, 43(12): 122802. doi: 10.1088/1674-4926/43/12/122802Export: BibTex EndNote
      Citation:
      Xiaojie Wang, Zhanwei Shen, Guoliang Zhang, Yuyang Miao, Tiange Li, Xiaogang Zhu, Jiafa Cai, Rongdun Hong, Xiaping Chen, Dingqu Lin, Shaoxiong Wu, Yuning Zhang, Deyi Fu, Zhengyun Wu, Feng Zhang. A 4H-SiC semi-super-junction shielded trench MOSFET: p-pillar is grounded to optimize the electric field characteristics[J]. Journal of Semiconductors, 2022, 43(12): 122802. doi: 10.1088/1674-4926/43/12/122802

      X J Wang, Z W Shen, G L Zhang, Y Y Miao, T G Li, X G Zhu, J F Cai, R D Hong, X P Chen, D Q Lin, S X Wu, Y N Zhang, D Y Fu, Z Y Wu, F Zhang. A 4H-SiC semi-super-junction shielded trench MOSFET: p-pillar is grounded to optimize the electric field characteristics[J]. J. Semicond, 2022, 43(12): 122802. doi: 10.1088/1674-4926/43/12/122802
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      A 4H-SiC semi-super-junction shielded trench MOSFET: p-pillar is grounded to optimize the electric field characteristics

      doi: 10.1088/1674-4926/43/12/122802
      • 1.

        College of Physical Science and Technology, Xiamen University, Xiamen 361005, China

      • 2.

        Key Laboratory of Semiconductor Material Sciences, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China

      • 3.

        Shenzhen Research Institute of Xiamen University, Shenzhen 518057, China

      • 4.

        Jiujiang Research Institute of Xiamen University, Jiujiang 332000, China

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      • Author Bio:

        Xiaojie Wang is a graduate student at the School of Physical Science and Technology, Xiamen University. His current research interests are the design, simulation and fabrication of SiC MOSFET devices, as well as the corresponding research on radiation resistance

        Zhanwei Shen is currently an Assistant Professor with Institute of Semiconductors, Chinese Academy of Sciences. His research and development activities include SiC-based power device design, gate-oxide growth and characterization, and relevant device fabrication

        Feng Zhang is currently a professor at the School of Physical Science and Technology, Xiamen University. His current interests include power devices such as wide bandgap semiconductor SiC MOSFETs, IGBT, and ultraviolet photodetectors and deep level defects and minority carrier lifetime in wide bandgap semiconductors

      • Corresponding author: zwshen@semi.ac.cn; fzhang@xmu.edu.cn
      • Received Date: 2022-05-02
      • Revised Date: 2022-09-06
        • Available Online: 2022-10-14

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