Fig. 1.
(Color online) (a) Schematic diagram of the plasma-activated wafer; (b) GaAs and Si wafer bonding; (c) time-dependent curve of annealing temperature at an annealing temperature of 300 ℃.
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Rui Huang, Zhiyong Wang, Kai Wu, Hao Xu, Qing Wang, Yecai Guo. Hybrid bonding of GaAs and Si wafers at low temperature by Ar plasma activation[J]. Journal of Semiconductors, 2024, 45(4): 042701. doi: 10.1088/1674-4926/45/4/042701
R Huang, Z Y Wang, K Wu, H Xu, Q Wang, Y C Guo. Hybrid bonding of GaAs and Si wafers at low temperature by Ar plasma activation[J]. J. Semicond, 2024, 45(4): 042701. doi: 10.1088/1674-4926/45/4/042701
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Hybrid bonding of GaAs and Si wafers at low temperature by Ar plasma activation
doi: 10.1088/1674-4926/45/4/042701
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Abstract
High-quality bonding of 4-inch GaAs and Si is achieved using plasma-activated bonding technology. The influence of Ar plasma activation on surface morphology is discussed. When the annealing temperature is 300 ℃, the bonding strength reaches a maximum of 6.2 MPa. In addition, a thermal stress model for GaAs/Si wafers is established based on finite element analysis to obtain the distribution of equivalent stress and deformation variables at different temperatures. The shape variation of the wafer is directly proportional to the annealing temperature. At an annealing temperature of 400 ℃, the maximum protrusion of 4 inches GaAs/Si wafers is 3.6 mm. The interface of GaAs/Si wafers is observed to be dense and defect-free using a transmission electron microscope. The characterization of interface elements by X-ray energy dispersion spectroscopy indicates that the elements at the interface undergo mutual diffusion, which is beneficial for improving the bonding strength of the interface. There is an amorphous transition layer with a thickness of about 5 nm at the bonding interface. The preparation of Si-based GaAs heterojunctions can enrich the types of materials required for the development of integrated circuits, improve the performance of materials and devices, and promote the development of microelectronics technology. -
References
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