Influence of Gate Voltages on Temperature of LDMOS Under Ultra-High Transient Currents

  • School of Microelectronics and Solid-State Electronics,University of Electronic Science and Technology of China,Chengdu 610054,China
  • School of Microelectronics and Solid-State Electronics,University of Electronic Science and Technology of China,Chengdu 610054,China

Key words: gate voltagestemperaturedissipated power densities

Abstract: The influence of gate voltages on the temperature of LDMOS under ultra-high transient currents is studied.The results show that in comparison with gate-grounded conditions,the temperature in the device rises when the gate voltages are positive,and the temperature falls when the gate voltages are negative.The distributions of the electric fields,conduction currents,and dissipated power densities under different gate voltages are also investigated.It is proved that positive gate voltages weaken the electro-static discharge capability of LDMOS,and negative gate voltages enhance it.These results can be used as a reference for the reliability of power devices.

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