In Press
In Press articles are edited and published online ahead of issue. When the final article is assigned to volumes/issues, the Article in Press version will be removed and the final version will appear in the associated published volumes/issues.
+ show detail
An NMOS output-capacitorless low-dropout regulator with dynamic-strength event-driven charge pump
Yiling Xie, Baochuang Wang, Dihu Chen, Jianping Guo
, Available online  
doi: 10.1088/1674-4926/23120057

In this paper, an NMOS output-capacitorless low-dropout regulator (OCL-LDO) featuring dual-loop regulation has been proposed, achieving fast transient response with low power consumption. An event-driven charge pump (CP) loop with the dynamic strength control (DSC), is proposed in this paper, which overcomes trade-offs inherent in conventional structures. The presented design addresses and resolves the large signal stability issue, which has been previously overlooked in the event-driven charge pump structure. This breakthrough allows for the full exploitation of the charge-pump structure's potential, particularly in enhancing transient recovery. Moreover, a dynamic error amplifier is utilized to attain precise regulation of the steady-state output voltage, leading to favorable static characteristics. A prototype chip has been fabricated in 65 nm CMOS technology. The measurement results show that the proposed OCL-LDO achieves a 410 nA low quiescent current (IQ), and can recover within 30 ns under 200 mA/10 ns loading change.

In this paper, an NMOS output-capacitorless low-dropout regulator (OCL-LDO) featuring dual-loop regulation has been proposed, achieving fast transient response with low power consumption. An event-driven charge pump (CP) loop with the dynamic strength control (DSC), is proposed in this paper, which overcomes trade-offs inherent in conventional structures. The presented design addresses and resolves the large signal stability issue, which has been previously overlooked in the event-driven charge pump structure. This breakthrough allows for the full exploitation of the charge-pump structure's potential, particularly in enhancing transient recovery. Moreover, a dynamic error amplifier is utilized to attain precise regulation of the steady-state output voltage, leading to favorable static characteristics. A prototype chip has been fabricated in 65 nm CMOS technology. The measurement results show that the proposed OCL-LDO achieves a 410 nA low quiescent current (IQ), and can recover within 30 ns under 200 mA/10 ns loading change.
Highlights in recent wireless power IC research
Cheng Huang, Junyao Tang
, Available online  
doi: 10.1088/1674-4926/45/4/040202

A frequency servo SoC with output power stabilization loop technology for miniaturized atomic clocks
Hongyang Zhang, Xinlin Geng, Zonglin Ye, Kailei Wang, Qian Xie, Zheng Wang
, Available online  
doi: 10.1088/1674-4926/23120056

A frequency servo system-on-chip (FS-SoC) featuring output power stabilization technology is introduced in this study for high-precision and miniaturized cesium (Cs) atomic clocks. The proposed power stabilization loop (PSL) technique, incorporating an off-chip power detector (PD), ensures that the output power of the FS-SoC remains stable, mitigating the impact of power fluctuations on the atomic clock's stability. Additionally, one-pulse-per-second (1PPS) is employed to synchronize the clock with GPS. Fabricated using 65 nm CMOS technology, the measured phase noise of the FS-SoC stands at −69.5 dBc/Hz@100 Hz offset and −83.9 dBc/Hz@1 kHz offset, accompanied by a power dissipation of 19.7 mW. The Cs atomic clock employing the proposed FS-SoC and PSL obtains an Allan deviation of 1.7 × 10−11 with 1-s averaging time.

A frequency servo system-on-chip (FS-SoC) featuring output power stabilization technology is introduced in this study for high-precision and miniaturized cesium (Cs) atomic clocks. The proposed power stabilization loop (PSL) technique, incorporating an off-chip power detector (PD), ensures that the output power of the FS-SoC remains stable, mitigating the impact of power fluctuations on the atomic clock's stability. Additionally, one-pulse-per-second (1PPS) is employed to synchronize the clock with GPS. Fabricated using 65 nm CMOS technology, the measured phase noise of the FS-SoC stands at −69.5 dBc/Hz@100 Hz offset and −83.9 dBc/Hz@1 kHz offset, accompanied by a power dissipation of 19.7 mW. The Cs atomic clock employing the proposed FS-SoC and PSL obtains an Allan deviation of 1.7 × 10−11 with 1-s averaging time.
Reliability evaluation of IGBT power module on electric vehicle using big data
Li Liu, Lei Tang, Huaping Jiang, Fanyi Wei, Zonghua Li, Changhong Du, Qianlei Peng, Guocheng Lu
, Available online  
doi: 10.1088/1674-4926/45/5/052301

There are challenges to the reliability evaluation for insulated gate bipolar transistors (IGBT) on electric vehicles, such as junction temperature measurement, computational and storage resources. In this paper, a junction temperature estimation approach based on neural network without additional cost is proposed and the lifetime calculation for IGBT using electric vehicle big data is performed. The direct current (DC) voltage, operation current, switching frequency, negative thermal coefficient thermistor (NTC) temperature and IGBT lifetime are inputs. And the junction temperature (Tj) is output. With the rain flow counting method, the classified irregular temperatures are brought into the life model for the failure cycles. The fatigue accumulation method is then used to calculate the IGBT lifetime. To solve the limited computational and storage resources of electric vehicle controllers, the operation of IGBT lifetime calculation is running on a big data platform. The lifetime is then transmitted wirelessly to electric vehicles as input for neural network. Thus the junction temperature of IGBT under long-term operating conditions can be accurately estimated. A test platform of the motor controller combined with the vehicle big data server is built for the IGBT accelerated aging test. Subsequently, the IGBT lifetime predictions are derived from the junction temperature estimation by the neural network method and the thermal network method. The experiment shows that the lifetime prediction based on a neural network with big data demonstrates a higher accuracy than that of the thermal network, which improves the reliability evaluation of system.

There are challenges to the reliability evaluation for insulated gate bipolar transistors (IGBT) on electric vehicles, such as junction temperature measurement, computational and storage resources. In this paper, a junction temperature estimation approach based on neural network without additional cost is proposed and the lifetime calculation for IGBT using electric vehicle big data is performed. The direct current (DC) voltage, operation current, switching frequency, negative thermal coefficient thermistor (NTC) temperature and IGBT lifetime are inputs. And the junction temperature (Tj) is output. With the rain flow counting method, the classified irregular temperatures are brought into the life model for the failure cycles. The fatigue accumulation method is then used to calculate the IGBT lifetime. To solve the limited computational and storage resources of electric vehicle controllers, the operation of IGBT lifetime calculation is running on a big data platform. The lifetime is then transmitted wirelessly to electric vehicles as input for neural network. Thus the junction temperature of IGBT under long-term operating conditions can be accurately estimated. A test platform of the motor controller combined with the vehicle big data server is built for the IGBT accelerated aging test. Subsequently, the IGBT lifetime predictions are derived from the junction temperature estimation by the neural network method and the thermal network method. The experiment shows that the lifetime prediction based on a neural network with big data demonstrates a higher accuracy than that of the thermal network, which improves the reliability evaluation of system.
70 Gbps PAM-4 850-nm oxide-confined VCSEL without equalization and pre-emphasis
Anjin Liu, Bao Tang, Zhiyong Li, Wanhua Zheng
, Available online  
doi: 10.1088/1674-4926/45/5/050501

Effect of annealing on the electrical performance of N-polarity GaN Schottky barrier diodes
Nuo Xu, Gaoqiang Deng, Haotian Ma, Shixu Yang, Yunfei Niu, Jiaqi Yu, Yusen Wang, Jingkai Zhao, Yuantao Zhang
, Available online  
doi: 10.1088/1674-4926/45/4/042501

A nitrogen-polarity (N-polarity) GaN-based high electron mobility transistor (HEMT) shows great potential for high-frequency solid-state power amplifier applications because its two-dimensional electron gas (2DEG) density and mobility are minimally affected by device scaling. However, the Schottky barrier height (SBH) of N-polarity GaN is low. This leads to a large gate leakage in N-polarity GaN-based HEMTs. In this work, we investigate the effect of annealing on the electrical characteristics of N-polarity GaN-based Schottky barrier diodes (SBDs) with Ni/Au electrodes. Our results show that the annealing time and temperature have a large influence on the electrical properties of N-polarity GaN SBDs. Compared to the N-polarity SBD without annealing, the SBH and rectification ratio at ±5 V of the SBD are increased from 0.51 eV and 30 to 0.77 eV and 7700, respectively, and the ideal factor of the SBD is decreased from 1.66 to 1.54 after an optimized annealing process. Our analysis results suggest that the improvement of the electrical properties of SBDs after annealing is mainly due to the reduction of the interface state density between Schottky contact metals and N-polarity GaN and the increase of barrier height for the electron emission from the trap state at low reverse bias.

A nitrogen-polarity (N-polarity) GaN-based high electron mobility transistor (HEMT) shows great potential for high-frequency solid-state power amplifier applications because its two-dimensional electron gas (2DEG) density and mobility are minimally affected by device scaling. However, the Schottky barrier height (SBH) of N-polarity GaN is low. This leads to a large gate leakage in N-polarity GaN-based HEMTs. In this work, we investigate the effect of annealing on the electrical characteristics of N-polarity GaN-based Schottky barrier diodes (SBDs) with Ni/Au electrodes. Our results show that the annealing time and temperature have a large influence on the electrical properties of N-polarity GaN SBDs. Compared to the N-polarity SBD without annealing, the SBH and rectification ratio at ±5 V of the SBD are increased from 0.51 eV and 30 to 0.77 eV and 7700, respectively, and the ideal factor of the SBD is decreased from 1.66 to 1.54 after an optimized annealing process. Our analysis results suggest that the improvement of the electrical properties of SBDs after annealing is mainly due to the reduction of the interface state density between Schottky contact metals and N-polarity GaN and the increase of barrier height for the electron emission from the trap state at low reverse bias.
Recess-free enhancement-mode AlGaN/GaN RF HEMTs on Si substrate
Tiantian Luan, Sen Huang, Guanjun Jing, Jie Fan, Haibo Yin, Xinguo Gao, Sheng Zhang, Ke Wei, Yankui Li, Qimeng Jiang, Xinhua Wang, Bin Hou, Ling Yang, Xiaohua Ma, Xinyu Liu
, Available online  
doi: 10.1088/1674-4926/23120006

Enhancement-mode (E-mode) GaN-on-Si radio-frequency (RF) high-electron-mobility transistors (HEMTs) were fabricated on an ultrathin-barrier (UTB) AlGaN (< 6 nm)/GaN heterostructure featuring a naturally depleted 2-D electron gas (2DEG) channel. The fabricated E-mode HEMTs exhibit a relatively high threshold voltage (VTH) of + 1.1 V with good uniformity. A maximum current/power gain cutoff frequency (fT/fMAX) of 31.3/99.6 GHz with a power added efficiency (PAE) of 52.47% and an output power density (Pout) of 1.0 W/mm at 3.5 GHz were achieved on the fabricated E-mode HEMTs with 1-µm gate and Au-free ohmic contact.

Enhancement-mode (E-mode) GaN-on-Si radio-frequency (RF) high-electron-mobility transistors (HEMTs) were fabricated on an ultrathin-barrier (UTB) AlGaN (< 6 nm)/GaN heterostructure featuring a naturally depleted 2-D electron gas (2DEG) channel. The fabricated E-mode HEMTs exhibit a relatively high threshold voltage (VTH) of + 1.1 V with good uniformity. A maximum current/power gain cutoff frequency (fT/fMAX) of 31.3/99.6 GHz with a power added efficiency (PAE) of 52.47% and an output power density (Pout) of 1.0 W/mm at 3.5 GHz were achieved on the fabricated E-mode HEMTs with 1-µm gate and Au-free ohmic contact.
A multichannel thermal bubble-actuated impedance flow cytometer with on-chip TIA based on CMOS-MEMS
Shengxun Cai, Jianqing Nie, Kun Wang, Yimin Guan, Demeng Liu
, Available online  
doi: 10.1088/1674-4926/45/5/052201

Electrochemical impedance spectroscopy (EIS) flow cytometry offers the advantages of speed, affordability, and portability in cell analysis and cytometry applications. However, the integration challenges of microfluidic and EIS read-out circuits hinder the downsizing of cytometry devices. To address this, we developed a thermal-bubble-driven impedance flow cytometric application-specific integrated circuit (ASIC). The thermal-bubble micropump avoids external piping and equipment, enabling high-throughput designs. With a total of 36 cell counting channels, each measuring 884 × 220 μm2, the chip significantly enhances the throughput of flow cytometers. Each cell counting channel incorporates a differential trans-impedance amplifier (TIA) to amplify weak biosensing signals. By eliminating the parasitic parameters created at the complementary metal-oxide-semiconductor transistor (CMOS)-micro-electromechanical systems (MEMS) interface, the counting accuracy can be increased. The on-chip TIA can adjust feedback resistance from 5 to 60 kΩ to accommodate solutions with different impedances. The chip effectively classifies particles of varying sizes, demonstrated by the average peak voltages of 0.0529 and 0.4510 mV for 7 and 14 μm polystyrene beads, respectively. Moreover, the counting accuracies of the chip for polystyrene beads and MSTO-211H cells are both greater than 97.6%. The chip exhibits potential for impedance flow cytometer at low cost, high-throughput, and miniaturization for the application of point-of-care diagnostics.

Electrochemical impedance spectroscopy (EIS) flow cytometry offers the advantages of speed, affordability, and portability in cell analysis and cytometry applications. However, the integration challenges of microfluidic and EIS read-out circuits hinder the downsizing of cytometry devices. To address this, we developed a thermal-bubble-driven impedance flow cytometric application-specific integrated circuit (ASIC). The thermal-bubble micropump avoids external piping and equipment, enabling high-throughput designs. With a total of 36 cell counting channels, each measuring 884 × 220 μm2, the chip significantly enhances the throughput of flow cytometers. Each cell counting channel incorporates a differential trans-impedance amplifier (TIA) to amplify weak biosensing signals. By eliminating the parasitic parameters created at the complementary metal-oxide-semiconductor transistor (CMOS)-micro-electromechanical systems (MEMS) interface, the counting accuracy can be increased. The on-chip TIA can adjust feedback resistance from 5 to 60 kΩ to accommodate solutions with different impedances. The chip effectively classifies particles of varying sizes, demonstrated by the average peak voltages of 0.0529 and 0.4510 mV for 7 and 14 μm polystyrene beads, respectively. Moreover, the counting accuracies of the chip for polystyrene beads and MSTO-211H cells are both greater than 97.6%. The chip exhibits potential for impedance flow cytometer at low cost, high-throughput, and miniaturization for the application of point-of-care diagnostics.
Control of GaN inverted pyramids growth on c-plane patterned sapphire substrates
Luming Yu, Xun Wang, Zhibiao Hao, Yi Luo, Changzheng Sun, Bing Xiong, Yanjun Han, Jian Wang, Hongtao Li, Lin Gan, Lai Wang
, Available online  
doi: 10.1088/1674-4926/24010013

Growth of gallium nitride (GaN) inverted pyramids on c-plane sapphire substrates is benefit for fabricating novel devices as it forms the semipolar facets. In this work, GaN inverted pyramids are directly grown on c-plane patterned sapphire substrates (PSS) by metal organic vapor phase epitaxy (MOVPE). The influences of growth conditions on the surface morphology are experimentally studied and explained by Wulff constructions. The competition of growth rate among {0001}, {$ 10\bar{\text{1}}1 $}, and {$11 \bar{\text{2}}2 $} facets results in the various surface morphologies of GaN. A higher growth temperature of 985 °C and a lower Ⅴ/Ⅲ ratio of 25 can expand the area of {$ 11\bar{\text{2}}2 $} facets in GaN inverted pyramids. On the other hand, GaN inverted pyramids with almost pure {$10 \bar{\text{1}}1 $} facets are obtained by using a lower growth temperature of 930 °C, a higher Ⅴ/Ⅲ ratio of 100, and PSS with pattern arrangement perpendicular to the substrate primary flat.

Growth of gallium nitride (GaN) inverted pyramids on c-plane sapphire substrates is benefit for fabricating novel devices as it forms the semipolar facets. In this work, GaN inverted pyramids are directly grown on c-plane patterned sapphire substrates (PSS) by metal organic vapor phase epitaxy (MOVPE). The influences of growth conditions on the surface morphology are experimentally studied and explained by Wulff constructions. The competition of growth rate among {0001}, {$ 10\bar{\text{1}}1 $}, and {$11 \bar{\text{2}}2 $} facets results in the various surface morphologies of GaN. A higher growth temperature of 985 °C and a lower Ⅴ/Ⅲ ratio of 25 can expand the area of {$ 11\bar{\text{2}}2 $} facets in GaN inverted pyramids. On the other hand, GaN inverted pyramids with almost pure {$10 \bar{\text{1}}1 $} facets are obtained by using a lower growth temperature of 930 °C, a higher Ⅴ/Ⅲ ratio of 100, and PSS with pattern arrangement perpendicular to the substrate primary flat.
Phase-locked single-mode terahertz quantum cascade lasers array
Yunfei Xu, Weijiang Li, Yu Ma, Quanyong Lu, Jinchuan Zhang, Shenqiang Zhai, Ning Zhuo, Junqi Liu, Shuman Liu, Fengmin Cheng, Lijun Wang, Fengqi Liu
, Available online  
doi: 10.1088/1674-4926/23120010

We demonstrated a scheme of phase-locked terahertz quantum cascade lasers (THz QCLs) array, with a single-mode pulse power of 108 mW at 13 K. The device utilizes a Talbot cavity to achieve phase locking among five ridge lasers with first-order buried distributed feedback (DFB) grating, resulting in nearly 5 times amplification of the single-mode power. Due to the optimum length of Talbot cavity depends on wavelength, the combination of Talbot cavity with the DFB grating leads to better power amplification than the combination with multimode Fabry−Perot cavities. The Talbot cavity facet reflects light back to the ridge array direction and achieves self-imaging in the array, enabling phase-locked operation of ridges. We set the spacing between adjacent elements to be 220 μm, much larger than the free-space wavelength, ensuring the operation of the fundamental supermode throughout the laser's dynamic range and obtaining a high-brightness far-field distribution. This scheme provides a new approach for enhancing the single-mode power of THz QCLs.

We demonstrated a scheme of phase-locked terahertz quantum cascade lasers (THz QCLs) array, with a single-mode pulse power of 108 mW at 13 K. The device utilizes a Talbot cavity to achieve phase locking among five ridge lasers with first-order buried distributed feedback (DFB) grating, resulting in nearly 5 times amplification of the single-mode power. Due to the optimum length of Talbot cavity depends on wavelength, the combination of Talbot cavity with the DFB grating leads to better power amplification than the combination with multimode Fabry−Perot cavities. The Talbot cavity facet reflects light back to the ridge array direction and achieves self-imaging in the array, enabling phase-locked operation of ridges. We set the spacing between adjacent elements to be 220 μm, much larger than the free-space wavelength, ensuring the operation of the fundamental supermode throughout the laser's dynamic range and obtaining a high-brightness far-field distribution. This scheme provides a new approach for enhancing the single-mode power of THz QCLs.
A 16-bit 18-MSPS flash-assisted SAR ADC with hybrid synchronous and asynchronous control logic
Junyao Ji, Xinao Ji, Ziyu Zhou, Zhichao Dai, Xuhui Chen, Jie Zhang, Zheng Jiang, Hong Zhang
, Available online  
doi: 10.1088/1674-4926/23120049

This paper presents a 16-bit, 18-MSPS(Million Samples per Second) flash-assisted successive-approximation-register (SAR) analog-to-digital converter (ADC) utilizing hybrid synchronous and asynchronous (HYSAS) timing control logic based on an on-chip delay-locked loop (DLL). The HYSAS scheme can provide a longer settling time for the capacitive digital-to-analog converter (CDAC) than the synchronous and asynchronous SAR ADC. Therefore, the issue of incomplete settling or ringing in the DAC voltage for cases of either on-chip or off-chip reference voltage can be solved to a large extent. In addition, the foreground calibration of the CDAC’s mismatch is performed with a finite-impulse-response bandpass filter (FIR-BPF) based least-mean-square (LMS) algorithm in an off-chip FPGA(Field Programmable Gate Array). Fabricated in 40-nm CMOS process, the prototype ADC achieves 94.02-dB spurious-free dynamic range (SFDR), and 75.98-dB signal-to-noise-and-distortion ratio (SNDR) for a 2.88-MHz input under 18-MSPS sampling rate.

This paper presents a 16-bit, 18-MSPS(Million Samples per Second) flash-assisted successive-approximation-register (SAR) analog-to-digital converter (ADC) utilizing hybrid synchronous and asynchronous (HYSAS) timing control logic based on an on-chip delay-locked loop (DLL). The HYSAS scheme can provide a longer settling time for the capacitive digital-to-analog converter (CDAC) than the synchronous and asynchronous SAR ADC. Therefore, the issue of incomplete settling or ringing in the DAC voltage for cases of either on-chip or off-chip reference voltage can be solved to a large extent. In addition, the foreground calibration of the CDAC’s mismatch is performed with a finite-impulse-response bandpass filter (FIR-BPF) based least-mean-square (LMS) algorithm in an off-chip FPGA(Field Programmable Gate Array). Fabricated in 40-nm CMOS process, the prototype ADC achieves 94.02-dB spurious-free dynamic range (SFDR), and 75.98-dB signal-to-noise-and-distortion ratio (SNDR) for a 2.88-MHz input under 18-MSPS sampling rate.
Complementary memtransistors for neuromorphic computing: How, what and why
Qi Chen, Yue Zhou, Weiwei Xiong, Zirui Chen, Yasai Wang, Xiangshui Miao, Yuhui He
, Available online  
doi: 10.1088/1674-4926/23120051

Memtransistors in which the source−drain channel conductance can be nonvolatilely manipulated through the gate signals have emerged as promising components for implementing neuromorphic computing. On the other side, it is known that the complementary metal-oxide-semiconductor (CMOS) field effect transistors have played the fundamental role in the modern integrated circuit technology. Therefore, will complementary memtransistors (CMT) also play such a role in the future neuromorphic circuits and chips? In this review, various types of materials and physical mechanisms for constructing CMT (how) are inspected with their merits and need-to-address challenges discussed. Then the unique properties (what) and potential applications of CMT in different learning algorithms/scenarios of spiking neural networks (why) are reviewed, including supervised rule, reinforcement one, dynamic vision with in-sensor computing, etc. Through exploiting the complementary structure-related novel functions, significant reduction of hardware consuming, enhancement of energy/efficiency ratio and other advantages have been gained, illustrating the alluring prospect of design technology co-optimization (DTCO) of CMT towards neuromorphic computing.

Memtransistors in which the source−drain channel conductance can be nonvolatilely manipulated through the gate signals have emerged as promising components for implementing neuromorphic computing. On the other side, it is known that the complementary metal-oxide-semiconductor (CMOS) field effect transistors have played the fundamental role in the modern integrated circuit technology. Therefore, will complementary memtransistors (CMT) also play such a role in the future neuromorphic circuits and chips? In this review, various types of materials and physical mechanisms for constructing CMT (how) are inspected with their merits and need-to-address challenges discussed. Then the unique properties (what) and potential applications of CMT in different learning algorithms/scenarios of spiking neural networks (why) are reviewed, including supervised rule, reinforcement one, dynamic vision with in-sensor computing, etc. Through exploiting the complementary structure-related novel functions, significant reduction of hardware consuming, enhancement of energy/efficiency ratio and other advantages have been gained, illustrating the alluring prospect of design technology co-optimization (DTCO) of CMT towards neuromorphic computing.
Electronic origin of structural degradation in Li-rich transition metal oxides: The case of Li2MnO3 and Li2RuO3
Peng Zhang
, Available online  
doi: 10.1088/1674-4926/45/4/042801

Li2MnO3 and Li2RuO3 represent two prototype Li-rich transition metal (TM) oxides as high-capacity cathodes for Li-ion batteries, which have similar crystal structures but show quite different cycling performances. Here, based on the first-principles calculations, we systematically studied the electronic structures and defect properties of these two Li-rich cathodes, in order to get more understanding on the structural degradation mechanism in Li-rich TM oxides. Our calculations indicated that the structural and cycling stability of Li2MnO3 and Li2RuO3 depend closely on their electronic structures, especially the energy of their highest occupied electronic states (HOS), as it largely determines the defect properties of these cathodes. For Li2MnO3 with low-energy HOS, we found that, due to the defect charge transfer mechanism, various defects can form spontaneously in its host structure as Li ions are extracted upon delithiation, which seriously deteriorates its structural and cycling stability. While for Li2RuO3, on the other hand, we identified that the high-energy HOS prevents it from the defect formation upon delithiation and thus preserve its cycling reversibility. Our studies thus illustrated an electronic origin of the structural degradation in Li-rich TM oxides and implied that it is possible to improve their cycling performances by carefully adjusting their TM components.

Li2MnO3 and Li2RuO3 represent two prototype Li-rich transition metal (TM) oxides as high-capacity cathodes for Li-ion batteries, which have similar crystal structures but show quite different cycling performances. Here, based on the first-principles calculations, we systematically studied the electronic structures and defect properties of these two Li-rich cathodes, in order to get more understanding on the structural degradation mechanism in Li-rich TM oxides. Our calculations indicated that the structural and cycling stability of Li2MnO3 and Li2RuO3 depend closely on their electronic structures, especially the energy of their highest occupied electronic states (HOS), as it largely determines the defect properties of these cathodes. For Li2MnO3 with low-energy HOS, we found that, due to the defect charge transfer mechanism, various defects can form spontaneously in its host structure as Li ions are extracted upon delithiation, which seriously deteriorates its structural and cycling stability. While for Li2RuO3, on the other hand, we identified that the high-energy HOS prevents it from the defect formation upon delithiation and thus preserve its cycling reversibility. Our studies thus illustrated an electronic origin of the structural degradation in Li-rich TM oxides and implied that it is possible to improve their cycling performances by carefully adjusting their TM components.
Countermeasure against blinding attack for single-photon detectors in quantum key distribution
Lianjun Jiang, Dongdong Li, Yuqiang Fang, Meisheng Zhao, Ming Liu, Zhilin Xie, Yukang Zhao, Yanlin Tang, Wei Jiang, Houlin Fang, Rui Ma, Lei Cheng, Weifeng Yang, Songtao Han, Shibiao Tang
, Available online  
doi: 10.1088/1674-4926/45/4/042702

Quantum key distribution (QKD), rooted in quantum mechanics, offers information-theoretic security. However, practical systems open security threats due to imperfections, notably bright-light blinding attacks targeting single-photon detectors. Here, we propose a concise, robust defense strategy for protecting single-photon detectors in QKD systems against blinding attacks. Our strategy uses a dual approach: detecting the bias current of the avalanche photodiode (APD) to defend against continuous-wave blinding attacks, and monitoring the avalanche amplitude to protect against pulsed blinding attacks. By integrating these two branches, the proposed solution effectively identifies and mitigates a wide range of bright light injection attempts, significantly enhancing the resilience of QKD systems against various bright-light blinding attacks. This method fortifies the safeguards of quantum communications and offers a crucial contribution to the field of quantum information security.

Quantum key distribution (QKD), rooted in quantum mechanics, offers information-theoretic security. However, practical systems open security threats due to imperfections, notably bright-light blinding attacks targeting single-photon detectors. Here, we propose a concise, robust defense strategy for protecting single-photon detectors in QKD systems against blinding attacks. Our strategy uses a dual approach: detecting the bias current of the avalanche photodiode (APD) to defend against continuous-wave blinding attacks, and monitoring the avalanche amplitude to protect against pulsed blinding attacks. By integrating these two branches, the proposed solution effectively identifies and mitigates a wide range of bright light injection attempts, significantly enhancing the resilience of QKD systems against various bright-light blinding attacks. This method fortifies the safeguards of quantum communications and offers a crucial contribution to the field of quantum information security.
Hybrid bonding of GaAs and Si wafers at low temperature by Ar plasma activation
Rui Huang, Zhiyong Wang, Kai Wu, Hao Xu, Qing Wang, Yecai Guo
, Available online  
doi: 10.1088/1674-4926/45/4/042701

High-quality bonding of 4-inch GaAs and Si is achieved using plasma-activated bonding technology. The influence of Ar plasma activation on surface morphology is discussed. When the annealing temperature is 300 ℃, the bonding strength reaches a maximum of 6.2 MPa. In addition, a thermal stress model for GaAs/Si wafers is established based on finite element analysis to obtain the distribution of equivalent stress and deformation variables at different temperatures. The shape variation of the wafer is directly proportional to the annealing temperature. At an annealing temperature of 400 ℃, the maximum protrusion of 4 inches GaAs/Si wafers is 3.6 mm. The interface of GaAs/Si wafers is observed to be dense and defect-free using a transmission electron microscope. The characterization of interface elements by X-ray energy dispersion spectroscopy indicates that the elements at the interface undergo mutual diffusion, which is beneficial for improving the bonding strength of the interface. There is an amorphous transition layer with a thickness of about 5 nm at the bonding interface. The preparation of Si-based GaAs heterojunctions can enrich the types of materials required for the development of integrated circuits, improve the performance of materials and devices, and promote the development of microelectronics technology.

High-quality bonding of 4-inch GaAs and Si is achieved using plasma-activated bonding technology. The influence of Ar plasma activation on surface morphology is discussed. When the annealing temperature is 300 ℃, the bonding strength reaches a maximum of 6.2 MPa. In addition, a thermal stress model for GaAs/Si wafers is established based on finite element analysis to obtain the distribution of equivalent stress and deformation variables at different temperatures. The shape variation of the wafer is directly proportional to the annealing temperature. At an annealing temperature of 400 ℃, the maximum protrusion of 4 inches GaAs/Si wafers is 3.6 mm. The interface of GaAs/Si wafers is observed to be dense and defect-free using a transmission electron microscope. The characterization of interface elements by X-ray energy dispersion spectroscopy indicates that the elements at the interface undergo mutual diffusion, which is beneficial for improving the bonding strength of the interface. There is an amorphous transition layer with a thickness of about 5 nm at the bonding interface. The preparation of Si-based GaAs heterojunctions can enrich the types of materials required for the development of integrated circuits, improve the performance of materials and devices, and promote the development of microelectronics technology.
Improvement of Ga2O3 vertical Schottky barrier diode by constructing NiO/Ga2O3 heterojunction
Xueqiang Ji, Jinjin Wang, Song Qi, Yijie Liang, Shengrun Hu, Haochen Zheng, Sai Zhang, Jianying Yue, Xiaohui Qi, Shan Li, Zeng Liu, Lei Shu, Weihua Tang, Peigang Li
, Available online  
doi: 10.1088/1674-4926/45/4/042503

The high critical electric field strength of Ga2O3 enables higher operating voltages and reduced switching losses in power electronic devices. Suitable Schottky metals and epitaxial films are essential for further enhancing device performance. In this work, the fabrication of vertical Ga2O3 barrier diodes with three different barrier metals was carried out on an n-Ga2O3 homogeneous epitaxial film deposited on an n+-β-Ga2O3 substrate by metal−organic chemical vapor deposition, excluding the use of edge terminals. The ideal factor, barrier height, specific on-resistance, and breakdown voltage characteristics of all devices were investigated at room temperature. In addition, the vertical Ga2O3 barrier diodes achieve a higher breakdown voltage and exhibit a reverse leakage as low as 4.82 ×10−8 A/cm2 by constructing a NiO/Ga2O3 heterojunction. Therefore, Ga2O3 power detailed investigations into Schottky barrier metal and NiO/Ga2O3 heterojunction of Ga2O3 homogeneous epitaxial films are of great research potential in high-efficiency, high-power, and high-reliability applications.

The high critical electric field strength of Ga2O3 enables higher operating voltages and reduced switching losses in power electronic devices. Suitable Schottky metals and epitaxial films are essential for further enhancing device performance. In this work, the fabrication of vertical Ga2O3 barrier diodes with three different barrier metals was carried out on an n-Ga2O3 homogeneous epitaxial film deposited on an n+-β-Ga2O3 substrate by metal−organic chemical vapor deposition, excluding the use of edge terminals. The ideal factor, barrier height, specific on-resistance, and breakdown voltage characteristics of all devices were investigated at room temperature. In addition, the vertical Ga2O3 barrier diodes achieve a higher breakdown voltage and exhibit a reverse leakage as low as 4.82 ×10−8 A/cm2 by constructing a NiO/Ga2O3 heterojunction. Therefore, Ga2O3 power detailed investigations into Schottky barrier metal and NiO/Ga2O3 heterojunction of Ga2O3 homogeneous epitaxial films are of great research potential in high-efficiency, high-power, and high-reliability applications.
High-speed performance self-powered short wave ultraviolet radiation detectors based on κ(ε)-Ga2O3
Aleksei Almaev, Alexander Tsymbalov, Bogdan Kushnarev, Vladimir Nikolaev, Alexei Pechnikov, Mikhail Scheglov, Andrei Chikiryaka, Petr Korusenko
, Available online  
doi: 10.1088/1674-4926/45/4/042502

High-speed solar-blind short wavelength ultraviolet radiation detectors based on κ(ε)-Ga2O3 layers with Pt contacts were demonstrated and their properties were studied in detail. The κ(ε)-Ga2O3 layers were deposited by the halide vapor phase epitaxy on patterned GaN templates with sapphire substrates. The spectral dependencies of the photoelectric properties of structures were analyzed in the wavelength interval 200–370 nm. The maximum photo to dark current ratio, responsivity, detectivity and external quantum efficiency of structures were determined as: 180.86 arb. un., 3.57 A/W, 1.78 × 1012 Hz0.5∙cm∙W−1 and 2193.6%, respectively, at a wavelength of 200 nm and an applied voltage of 1 V. The enhancement of the photoresponse was caused by the decrease in the Schottky barrier at the Pt/κ(ε)−Ga2O3 interface under ultraviolet exposure. The detectors demonstrated could functionalize in self-powered mode due to built-in electric field at the Pt/κ(ε)-Ga2O3 interface. The responsivity and external quantum efficiency of the structures at a wavelength of 254 nm and zero applied voltage were 0.9 mA/W and 0.46%, respectively. The rise and decay times in self-powered mode did not exceed 100 ms.

High-speed solar-blind short wavelength ultraviolet radiation detectors based on κ(ε)-Ga2O3 layers with Pt contacts were demonstrated and their properties were studied in detail. The κ(ε)-Ga2O3 layers were deposited by the halide vapor phase epitaxy on patterned GaN templates with sapphire substrates. The spectral dependencies of the photoelectric properties of structures were analyzed in the wavelength interval 200–370 nm. The maximum photo to dark current ratio, responsivity, detectivity and external quantum efficiency of structures were determined as: 180.86 arb. un., 3.57 A/W, 1.78 × 1012 Hz0.5∙cm∙W−1 and 2193.6%, respectively, at a wavelength of 200 nm and an applied voltage of 1 V. The enhancement of the photoresponse was caused by the decrease in the Schottky barrier at the Pt/κ(ε)−Ga2O3 interface under ultraviolet exposure. The detectors demonstrated could functionalize in self-powered mode due to built-in electric field at the Pt/κ(ε)-Ga2O3 interface. The responsivity and external quantum efficiency of the structures at a wavelength of 254 nm and zero applied voltage were 0.9 mA/W and 0.46%, respectively. The rise and decay times in self-powered mode did not exceed 100 ms.
Anomalous bond lengthening in compressed magnetic doped semiconductor Ba(Zn0.95Mn0.05)2As2
Fei Sun, Yi Peng, Guoqiang Zhao, Xiancheng Wang, Zheng Deng, Changqing Jin
, Available online  
doi: 10.1088/1674-4926/45/4/042101

Applying pressure has been evidenced as an effective method to control the properties of semiconductors, owing to its capability to modify the band configuration around Fermi energy. Correspondingly, structural evolutions under external pressures are required to analyze the mechanisms. Herein high-pressure structure of a magnetic doped semiconductor Ba(Zn0.95Mn0.05)2As2 is studied with combination of in-situ synchrotron X-ray diffractions and diamond anvil cells. The materials become ferromagnetic with Curie temperature of 105 K after further 20% K doping. The title material undergoes an isostructural phase transition at around 19 GPa. Below the transition pressure, it is remarkable to find lengthening of Zn/Mn−As bond within Zn/MnAs layers, since chemical bonds are generally shortened with applying pressures. Accompanied with the bond stretch, interlayer As−As distances become shorter and the As−As dimers form after the phase transition. With further compression, Zn/Mn−As bond becomes shortened due to the recovery of isotropic compression on the Zn/MnAs layers.

Applying pressure has been evidenced as an effective method to control the properties of semiconductors, owing to its capability to modify the band configuration around Fermi energy. Correspondingly, structural evolutions under external pressures are required to analyze the mechanisms. Herein high-pressure structure of a magnetic doped semiconductor Ba(Zn0.95Mn0.05)2As2 is studied with combination of in-situ synchrotron X-ray diffractions and diamond anvil cells. The materials become ferromagnetic with Curie temperature of 105 K after further 20% K doping. The title material undergoes an isostructural phase transition at around 19 GPa. Below the transition pressure, it is remarkable to find lengthening of Zn/Mn−As bond within Zn/MnAs layers, since chemical bonds are generally shortened with applying pressures. Accompanied with the bond stretch, interlayer As−As distances become shorter and the As−As dimers form after the phase transition. With further compression, Zn/Mn−As bond becomes shortened due to the recovery of isotropic compression on the Zn/MnAs layers.
On the relationship between imprint and reliability in Hf0.5Zr0.5O2 based ferroelectric random access memory
Peng Yuan, Yuting Chen, Liguo Chai, Zhengying Jiao, Qingjie Luan, Yongqing Shen, Ying Zhang, Jibin Leng, Xueli Ma, Jinjuan Xiang, Guilei Wang, Chao Zhao
, Available online  
doi: 10.1088/1674-4926/45/4/042301

The detrimental effect of imprint, which can cause misreading problem, has hindered the application of ferroelectric HfO2. In this work, we present results of a comprehensive reliability evaluation of Hf0.5Zr0.5O2-based ferroelectric random access memory. The influence of imprint on the retention and endurance is demonstrated. Furthermore, a solution in circuity is proposed to effectively solve the misreading problem caused by imprint.

The detrimental effect of imprint, which can cause misreading problem, has hindered the application of ferroelectric HfO2. In this work, we present results of a comprehensive reliability evaluation of Hf0.5Zr0.5O2-based ferroelectric random access memory. The influence of imprint on the retention and endurance is demonstrated. Furthermore, a solution in circuity is proposed to effectively solve the misreading problem caused by imprint.
Chemical vapor deposition for perovskite solar cells and modules
Zhihao Tao, Yuxuan Song, Baochang Wang, Guoqing Tong, Liming Ding
, Available online  
doi: 10.1088/1674-4926/45/4/040201

Light-emitting devices based on atomically thin MoSe2
Xinyu Zhang, Xuewen Zhang, Hanwei Hu, Vanessa Li Zhang, Weidong Xiao, Guangchao Shi, Jingyuan Qiao, Nan Huang, Ting Yu, Jingzhi Shang
, Available online  
doi: 10.1088/1674-4926/45/4/041701

Atomically thin MoSe2 layers, as a core member of the transition metal dichalcogenides (TMDs) family, benefit from their appealing properties, including tunable band gaps, high exciton binding energies, and giant oscillator strengths, thus providing an intriguing platform for optoelectronic applications of light-emitting diodes (LEDs), field-effect transistors (FETs), single-photon emitters (SPEs), and coherent light sources (CLSs). Moreover, these MoSe2 layers can realize strong excitonic emission in the near-infrared wavelengths, which can be combined with the silicon-based integration technologies and further encourage the development of the new generation technologies of on-chip optical interconnection, quantum computing, and quantum information processing. Herein, we overview the state-of-the-art applications of light-emitting devices based on two-dimensional MoSe2 layers. Firstly, we introduce recent developments in excitonic emission features from atomically thin MoSe2 and their dependences on typical physical fields. Next, we focus on the exciton-polaritons and plasmon-exciton polaritons in MoSe2 coupled to the diverse forms of optical microcavities. Then, we highlight the promising applications of LEDs, SPEs, and CLSs based on MoSe2 and their heterostructures. Finally, we summarize the challenges and opportunities for high-quality emission of MoSe2 and high-performance light-emitting devices.

Atomically thin MoSe2 layers, as a core member of the transition metal dichalcogenides (TMDs) family, benefit from their appealing properties, including tunable band gaps, high exciton binding energies, and giant oscillator strengths, thus providing an intriguing platform for optoelectronic applications of light-emitting diodes (LEDs), field-effect transistors (FETs), single-photon emitters (SPEs), and coherent light sources (CLSs). Moreover, these MoSe2 layers can realize strong excitonic emission in the near-infrared wavelengths, which can be combined with the silicon-based integration technologies and further encourage the development of the new generation technologies of on-chip optical interconnection, quantum computing, and quantum information processing. Herein, we overview the state-of-the-art applications of light-emitting devices based on two-dimensional MoSe2 layers. Firstly, we introduce recent developments in excitonic emission features from atomically thin MoSe2 and their dependences on typical physical fields. Next, we focus on the exciton-polaritons and plasmon-exciton polaritons in MoSe2 coupled to the diverse forms of optical microcavities. Then, we highlight the promising applications of LEDs, SPEs, and CLSs based on MoSe2 and their heterostructures. Finally, we summarize the challenges and opportunities for high-quality emission of MoSe2 and high-performance light-emitting devices.
The study of lithographic variation in resistive random access memory
Yuhang Zhang, Guanghui He, Feng Zhang, Yongfu Li, Guoxing Wang
, Available online  
doi: 10.1088/1674-4926/45/5/052303

Reducing the process variation is a significant concern for resistive random access memory (RRAM). Due to its ultra-high integration density, RRAM arrays are prone to lithographic variation during the lithography process, introducing electrical variation among different RRAM devices. In this work, an optical physical verification methodology for the RRAM array is developed, and the effects of different layout parameters on important electrical characteristics are systematically investigated. The results indicate that the RRAM devices can be categorized into three clusters according to their locations and lithography environments. The read resistance is more sensitive to the locations in the array (~30%) than SET/RESET voltage (<10%). The increase in the RRAM device length and the application of the optical proximity correction technique can help to reduce the variation to less than 10%, whereas it reduces RRAM read resistance by 4×, resulting in a higher power and area consumption. As such, we provide design guidelines to minimize the electrical variation of RRAM arrays due to the lithography process.

Reducing the process variation is a significant concern for resistive random access memory (RRAM). Due to its ultra-high integration density, RRAM arrays are prone to lithographic variation during the lithography process, introducing electrical variation among different RRAM devices. In this work, an optical physical verification methodology for the RRAM array is developed, and the effects of different layout parameters on important electrical characteristics are systematically investigated. The results indicate that the RRAM devices can be categorized into three clusters according to their locations and lithography environments. The read resistance is more sensitive to the locations in the array (~30%) than SET/RESET voltage (<10%). The increase in the RRAM device length and the application of the optical proximity correction technique can help to reduce the variation to less than 10%, whereas it reduces RRAM read resistance by 4×, resulting in a higher power and area consumption. As such, we provide design guidelines to minimize the electrical variation of RRAM arrays due to the lithography process.
Recent advances in two-dimensional photovoltaic devices
Haoyun Wang, Xingyu Song, Zexin Li, Dongyan Li, Xiang Xu, Yunxin Chen, Pengbin Liu, Xing Zhou, Tianyou Zhai
, Available online  
doi: 10.1088/1674-4926/45/5/051701

Two-dimensional (2D) materials have attracted tremendous interest in view of the outstanding optoelectronic properties, showing new possibilities for future photovoltaic devices toward high performance, high specific power and flexibility. In recent years, substantial works have focused on 2D photovoltaic devices, and great progress has been achieved. Here, we present the review of recent advances in 2D photovoltaic devices, focusing on 2D-material-based Schottky junctions, homojunctions, 2D−2D heterojunctions, 2D−3D heterojunctions, and bulk photovoltaic effect devices. Furthermore, advanced strategies for improving the photovoltaic performances are demonstrated in detail. Finally, conclusions and outlooks are delivered, providing a guideline for the further development of 2D photovoltaic devices.

Two-dimensional (2D) materials have attracted tremendous interest in view of the outstanding optoelectronic properties, showing new possibilities for future photovoltaic devices toward high performance, high specific power and flexibility. In recent years, substantial works have focused on 2D photovoltaic devices, and great progress has been achieved. Here, we present the review of recent advances in 2D photovoltaic devices, focusing on 2D-material-based Schottky junctions, homojunctions, 2D−2D heterojunctions, 2D−3D heterojunctions, and bulk photovoltaic effect devices. Furthermore, advanced strategies for improving the photovoltaic performances are demonstrated in detail. Finally, conclusions and outlooks are delivered, providing a guideline for the further development of 2D photovoltaic devices.
Dual-Schottky-junctions coupling device based on ultra-long β-Ga2O3 single-crystal nanobelt and its photoelectric properties
Haifeng Chen, Xiaocong Han, Chenlu Wu, Zhanhang Liu, Shaoqing Wang, Xiangtai Liu, Qin Lu, Yifan Jia, Zhan Wang, Yunhe Guan, Lijun Li, Yue Hao
, Available online  
doi: 10.1088/1674-4926/45/5/052502

High quality β-Ga2O3 single crystal nanobelts with length of 2−3 mm and width from tens of microns to 132 μm were synthesized by carbothermal reduction method. Based on the grown nanobelt with the length of 600 μm, the dual-Schottky-junctions coupling device (DSCD) was fabricated. Due to the electrically floating Ga2O3 nanobelt region coupling with the double Schottky junctions, the current IS2 increases firstly and rapidly reaches into saturation as increase the voltage VS2. The saturation current is about 10 pA, which is two orders of magnitude lower than that of a single Schottky junction. In the case of solar-blind ultraviolet (UV) light irradiation, the photogenerated electrons further aggravate the coupling physical mechanism in device. IS2 increases as the intensity of UV light increases. Under the UV light of 1820 μW/cm2, IS2 quickly enters the saturation state. At VS2 = 10 V, photo-to-dark current ratio (PDCR) of the device reaches more than 104, the external quantum efficiency (EQE) is 1.6 × 103%, and the detectivity (D*) is 7.5 × 1012 Jones. In addition, the device has a very short rise and decay times of 25−54 ms under different positive and negative bias. DSCD shows unique electrical and optical control characteristics, which will open a new way for the application of nanobelt-based devices.

High quality β-Ga2O3 single crystal nanobelts with length of 2−3 mm and width from tens of microns to 132 μm were synthesized by carbothermal reduction method. Based on the grown nanobelt with the length of 600 μm, the dual-Schottky-junctions coupling device (DSCD) was fabricated. Due to the electrically floating Ga2O3 nanobelt region coupling with the double Schottky junctions, the current IS2 increases firstly and rapidly reaches into saturation as increase the voltage VS2. The saturation current is about 10 pA, which is two orders of magnitude lower than that of a single Schottky junction. In the case of solar-blind ultraviolet (UV) light irradiation, the photogenerated electrons further aggravate the coupling physical mechanism in device. IS2 increases as the intensity of UV light increases. Under the UV light of 1820 μW/cm2, IS2 quickly enters the saturation state. At VS2 = 10 V, photo-to-dark current ratio (PDCR) of the device reaches more than 104, the external quantum efficiency (EQE) is 1.6 × 103%, and the detectivity (D*) is 7.5 × 1012 Jones. In addition, the device has a very short rise and decay times of 25−54 ms under different positive and negative bias. DSCD shows unique electrical and optical control characteristics, which will open a new way for the application of nanobelt-based devices.
ZnSb/Ti3C2Tx MXene van der Waals heterojunction for flexible near-infrared photodetector arrays
Chuqiao Hu, Ruiqing Chai, Zhongming Wei, La Li, Guozhen Shen
, Available online  
doi: 10.1088/1674-4926/45/5/052601

Two-dimension (2D) van der Waals heterojunction holds essential promise in achieving high-performance flexible near-infrared (NIR) photodetector. Here, we report the successful fabrication of ZnSb/Ti3C2Tx MXene based flexible NIR photodetector array via a facile photolithography technology. The single ZnSb/Ti3C2Tx photodetector exhibited a high light-to-dark current ratio of 4.98, fast response/recovery time (2.5/1.3 s) and excellent stability due to the tight connection between 2D ZnSb nanoplates and 2D Ti3C2Tx MXene nanoflakes, and the formed 2D van der Waals heterojunction. Thin polyethylene terephthalate (PET) substrate enables the ZnSb/Ti3C2Tx photodetector withstand bending such that stable photoelectrical properties with non-obvious change were maintained over 5000 bending cycles. Moreover, the ZnSb/Ti3C2Tx photodetectors were integrated into a 26 × 5 device array, realizing a NIR image sensing application.

Two-dimension (2D) van der Waals heterojunction holds essential promise in achieving high-performance flexible near-infrared (NIR) photodetector. Here, we report the successful fabrication of ZnSb/Ti3C2Tx MXene based flexible NIR photodetector array via a facile photolithography technology. The single ZnSb/Ti3C2Tx photodetector exhibited a high light-to-dark current ratio of 4.98, fast response/recovery time (2.5/1.3 s) and excellent stability due to the tight connection between 2D ZnSb nanoplates and 2D Ti3C2Tx MXene nanoflakes, and the formed 2D van der Waals heterojunction. Thin polyethylene terephthalate (PET) substrate enables the ZnSb/Ti3C2Tx photodetector withstand bending such that stable photoelectrical properties with non-obvious change were maintained over 5000 bending cycles. Moreover, the ZnSb/Ti3C2Tx photodetectors were integrated into a 26 × 5 device array, realizing a NIR image sensing application.
Metal-modulated epitaxy of Mg-doped Al0.80In0.20N-based layer for application as the electron blocking layer in deep ultraviolet light-emitting diodes
Horacio Irán Solís-Cisneros, Carlos Alberto Hernández-Gutiérrez, Enrique Campos-González, Máximo López-López
, Available online  
doi: 10.1088/1674-4926/45/5/052501

This work reports the growth and characterization of p-AlInN layers doped with Mg by plasma-assisted molecular beam epitaxy (PAMBE). AlInN was grown with an Al molar fraction of 0.80 by metal-modulated epitaxy (MME) with a thickness of 180 nm on Si(111) substrates using AlN as buffer layers. Low substrate temperatures were used to enhance the incorporation of indium atoms into the alloy without clustering, as confirmed by X-ray diffraction (XRD). Cathodoluminescence measurements revealed ultraviolet (UV) range emissions. Meanwhile, Hall effect measurements indicated a maximum hole mobility of 146 cm2/(V∙s), corresponding to a free hole concentration of 1.23 × 1019 cm−3. The samples were analyzed by X-ray photoelectron spectroscopy (XPS) estimating the alloy composition and extracting the Fermi level by valence band analysis. Mg-doped AlInN layers were studied for use as the electron-blocking layer (EBL) in LED structures. We varied the Al composition in the EBL from 0.84 to 0.96 molar fraction to assess its theoretical effects on electroluminescence, carrier concentration, and electric field, using SILVACO Atlas. The results from this study highlight the importance and capability of producing high-quality Mg-doped p-AlInN layers through PAMBE. Our simulations suggest that an Al content of 0.86 is optimal for achieving desired outcomes in electroluminescence, carrier concentration, and electric field.

This work reports the growth and characterization of p-AlInN layers doped with Mg by plasma-assisted molecular beam epitaxy (PAMBE). AlInN was grown with an Al molar fraction of 0.80 by metal-modulated epitaxy (MME) with a thickness of 180 nm on Si(111) substrates using AlN as buffer layers. Low substrate temperatures were used to enhance the incorporation of indium atoms into the alloy without clustering, as confirmed by X-ray diffraction (XRD). Cathodoluminescence measurements revealed ultraviolet (UV) range emissions. Meanwhile, Hall effect measurements indicated a maximum hole mobility of 146 cm2/(V∙s), corresponding to a free hole concentration of 1.23 × 1019 cm−3. The samples were analyzed by X-ray photoelectron spectroscopy (XPS) estimating the alloy composition and extracting the Fermi level by valence band analysis. Mg-doped AlInN layers were studied for use as the electron-blocking layer (EBL) in LED structures. We varied the Al composition in the EBL from 0.84 to 0.96 molar fraction to assess its theoretical effects on electroluminescence, carrier concentration, and electric field, using SILVACO Atlas. The results from this study highlight the importance and capability of producing high-quality Mg-doped p-AlInN layers through PAMBE. Our simulations suggest that an Al content of 0.86 is optimal for achieving desired outcomes in electroluminescence, carrier concentration, and electric field.
A novel small-signal equivalent circuit model for GaN HEMTs incorporating a dual-field-plate
Jinye Wang, Jun Liu, Zhenxin Zhao
, Available online  
doi: 10.1088/1674-4926/45/5/052302

An accurate and novel small-signal equivalent circuit model for GaN high-electron-mobility transistors (HEMTs) is proposed, which considers a dual-field-plate (FP) made up of a gate-FP and a source-FP. The equivalent circuit of the overall model is composed of parasitic elements, intrinsic transistors, gate-FP, and source-FP networks. The equivalent circuit of the gate-FP is identical to that of the intrinsic transistor. In order to simplify the complexity of the model, a series combination of a resistor and a capacitor is employed to represent the source-FP. The analytical extraction procedure of the model parameters is presented based on the proposed equivalent circuit. The verification is carried out on a 4 × 250 μm GaN HEMT device with a gate-FP and a source-FP in a 0.45 μm technology. Compared with the classic model, the proposed novel small-signal model shows closer agreement with measured S-parameters in the range of 1.0 to 18.0 GHz.

An accurate and novel small-signal equivalent circuit model for GaN high-electron-mobility transistors (HEMTs) is proposed, which considers a dual-field-plate (FP) made up of a gate-FP and a source-FP. The equivalent circuit of the overall model is composed of parasitic elements, intrinsic transistors, gate-FP, and source-FP networks. The equivalent circuit of the gate-FP is identical to that of the intrinsic transistor. In order to simplify the complexity of the model, a series combination of a resistor and a capacitor is employed to represent the source-FP. The analytical extraction procedure of the model parameters is presented based on the proposed equivalent circuit. The verification is carried out on a 4 × 250 μm GaN HEMT device with a gate-FP and a source-FP in a 0.45 μm technology. Compared with the classic model, the proposed novel small-signal model shows closer agreement with measured S-parameters in the range of 1.0 to 18.0 GHz.
Flexible perovskite light-emitting diodes for display applications and beyond
Yongqi Zhang, Shahbaz Ahmed Khan, Dongxiang Luo, Guijun Li
, Available online  
doi: 10.1088/1674-4926/45/5/051601

The flexible perovskite light-emitting diodes (FPeLEDs), which can be expediently integrated to portable and wearable devices, have shown great potential in various applications. The FPeLEDs inherit the unique optical properties of metal halide perovskites, such as tunable bandgap, narrow emission linewidth, high photoluminescence quantum yield, and particularly, the soft nature of lattice. At present, substantial efforts have been made for FPeLEDs with encouraging external quantum efficiency (EQE) of 24.5%. Herein, we summarize the recent progress in FPeLEDs, focusing on the strategy developed for perovskite emission layers and flexible electrodes to facilitate the optoelectrical and mechanical performance. In addition, we present relevant applications of FPeLEDs in displays and beyond. Finally, perspective toward the future development and applications of flexible PeLEDs are also discussed.

The flexible perovskite light-emitting diodes (FPeLEDs), which can be expediently integrated to portable and wearable devices, have shown great potential in various applications. The FPeLEDs inherit the unique optical properties of metal halide perovskites, such as tunable bandgap, narrow emission linewidth, high photoluminescence quantum yield, and particularly, the soft nature of lattice. At present, substantial efforts have been made for FPeLEDs with encouraging external quantum efficiency (EQE) of 24.5%. Herein, we summarize the recent progress in FPeLEDs, focusing on the strategy developed for perovskite emission layers and flexible electrodes to facilitate the optoelectrical and mechanical performance. In addition, we present relevant applications of FPeLEDs in displays and beyond. Finally, perspective toward the future development and applications of flexible PeLEDs are also discussed.