Qingqing Wang, Yun Zheng, Chonghao Zhai, Xudong Li, Qihuang Gong, Jianwei Wang. Chip-based quantum communications[J]. Journal of Semiconductors, 2021, 42(9): 091901. doi: 10.1088/1674-4926/42/9/091901.
Q Q Wang, Y Zheng, C H Zhai, X D Li, Q H Gong, J W Wang, Chip-based quantum communications[J]. J. Semicond., 2021, 42(9): 091901. doi: 10.1088/1674-4926/42/9/091901.
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The terminal structure of the PiN diode has undergone several improvements since its development. The field-limiting ring (FLR), junction termination extension (JTE), Mesa technology (Mesa), and composite terminal technologies are the leading technologies for modifying this terminal structure. For example, Sheridan et al. studied the breakdown characteristics of SiC-PiN diodes with single- and multi-region JTE terminal structures in 2001. In 2005, Perez et al. conducted a comparative study of various planar terminal technologies, mainly JTE terminals, FLR terminals, and their composite structures based on a 1.7 kV SiC-PiN diode. Field-ring-assisted junction extension terminals (GA-JTE) can effectively increase the breakdown voltage for devices with lower JTE concentration and broaden the range of JTE optimal values. In 2009, Ghandi et al. from the Royal Institute of Technology, Sweden, successfully developed a high-voltage SiC-PiN diode with a dual-zone etch JTE terminal. The breakdown voltage of the device was measured as 4.3 kV. Niwa et al. used a space-modulated junction termination extension (SM-JTE) terminal to broaden the JTE optimal concentration window to avoid the influence of the interface charge. Salemi et al. developed a breakdown voltage for a SiC bipolar transistor with a four-stage etched JTE terminal reaching 15.8 kV at the Royal Institute of Technology, Sweden, in 2018. This study thoroughly reviewed the effects of 4H SiC-PiN diode terminal structures on the breakdown voltage.