In recent years, research focusing on synaptic device based on phototransistors has provided a new method for associative learning and neuromorphic computing. A TiO₂/AlGaN/GaN heterostructure-based synaptic phototransistor is fabricated and measured, integrating a TiO₂ nanolayer gate and a two-dimensional electron gas (2DEG) channel to mimic the synaptic weight and the synaptic cleft, respectively. The maximum drain to source current is 10 nA, while the device is driven at a reverse bias not exceeding −2.5 V. A excitatory postsynaptic current (EPSC) of 200 nA can be triggered by a 365 nm UVA light spike with the duration of 1 seconds at light intensity of 1.35 μW∙cm⁻². Multiple synaptic neuromorphic functions, including EPSC, short-term/long-term plasticity (STP/LTP) and paried-pulse facilitation (PPF), are effectively mimicked by our GaN-based heterostructure synaptic device. In the typical Pavlov’s dog experiment, we demonstrate that the device can achieve “retraining” process to extend memory time through enhancing the intensity of synaptic weight, which is similar to the working mechanism of human brain.

This paper presents a comprehensive analysis of the short-circuit failure mechanisms in commercial 1.2 kV planar silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) under 400 V and 800 V bus voltage conditions. The study compares two products with varying short-circuit tolerances, scrutinizing their external characteristics and intrinsic factors that influence their short-circuit endurance. Experimental and numerical analyses reveal that at 400 V, the differential thermal expansion between the source metal and the dielectric leads to cracking, which in turn facilitates the infiltration of liquid metal and results in a gate-source short circuit. At 800 V, the failure mechanism is markedly different, attributed to the thermal carrier effect leading to the degradation of the gate oxide, which impedes the device's capacity to switch off, thereby triggering thermal runaway. The paper proposes strategies to augment the short-circuit robustness of SiC MOSFETs at both voltage levels, with the objective of fortifying the device's resistance to such failures.

In recent years, propelled by the rapid iterative advancements in digital imaging technology and the semiconductor industry, encompassing microelectronic design, manufacturing, packaging, and testing, time-of-flight (ToF)-based imaging systems for acquiring depth information have garnered considerable attention from both academia and industry. This technology has emerged as a focal point of research within the realm of 3D imaging. Owing to its relatively straightforward principles and exceptional performance, ToF technology finds extensive applications across various domains including human−computer interaction, autonomous driving, industrial inspection, medical and healthcare, augmented reality, smart homes, and 3D reconstruction, among others. Notably, the increasing maturity of ToF-based LiDAR systems is evident in current developments. This paper comprehensively reviews the fundamental principles of ToF technology and LiDAR systems, alongside recent research advancements. It elucidates the innovative aspects and technical challenges encountered in both transmitter (TX) and receiver (RX), providing detailed discussions on corresponding solutions. Furthermore, the paper explores prospective avenues for future research, offering valuable insights for subsequent investigations.

Fifteen periods of Si/Si_0.7Ge_0.3 multilayers (MLs) with various SiGe thicknesses are grown on a 200 mm Si substrate using reduced pressure chemical vapor deposition (RPCVD). Several methods were utilized to characterize and analyze the ML structures. The high resolution transmission electron microscopy (HRTEM) results show that the ML structure with 20 nm Si_0.7Ge_0.3 features the best crystal quality and no defects are observed. Stacked Si_0.7Ge_0.3 ML structures etched by three different methods were carried out and compared, and the results show that they have different selectivities and morphologies. In this work, the fabrication process influences on Si/SiGe MLs are studied and there are no significant effects on the Si layers, which are the channels in lateral gate all around field effect transistor (L-GAAFET) devices. For vertically-stacked dynamic random access memory (VS-DRAM), it is necessary to consider the dislocation caused by strain accumulation and stress release after the number of stacked layers exceeds the critical thickness. These results pave the way for the manufacture of high-performance multivertical-stacked Si nanowires, nanosheet L-GAAFETs, and DRAM devices.

Infrared optoelectronic sensing is the core of many critical applications such as night vision, health and medication, military, space exploration, etc. Further including mechanical flexibility as a new dimension enables novel features of adaptability and conformability, promising for developing next−generation optoelectronic sensory applications toward reduced size, weight, price, power consumption, and enhanced performance (SWaP³). However, in this emerging research frontier, challenges persist in simultaneously achieving high infrared response and good mechanical deformability in devices and integrated systems. Therefore, we perform a comprehensive review of the design strategies and insights of flexible infrared optoelectronic sensors, including the fundamentals of infrared photodetectors, selection of materials and device architectures, fabrication techniques and design strategies, and the discussion of architectural and functional integration towards applications in wearable optoelectronics and advanced image sensing. Finally, this article offers insights into future directions to practically realize the ultra−high performance and smart sensors enabled by infrared−sensitive materials, covering challenges in materials development and device micro−/nanofabrication. Benchmarks for scaling these techniques across fabrication, performance, and integration are presented, alongside perspectives on potential applications in medication and health, biomimetic vision, and neuromorphic sensory systems, etc.

Triboelectric nanogenerator (TENG) utilizing tribovoltaic effect can directly produce direct current with high energy conversion efficiency, which expands their application in semiconductor devices and self-powered systems. This work comprehensively summarizes the recent developments in semiconductor-based direct current TENGs (SDC-TENGs), which hold significant promise for DC energy harvesting technologies and semiconductor systems. First, the tribovoltaic effect is elucidated, and SDC-TENGs are categorized into six types based on different triboelectric structures: metal-semiconductor (M-S), metal-insulator-semiconductor (M-I-S), semiconductor-semiconductor (S-S), semiconductor-insulator-semiconductor (S-I-S), liquid-semiconductor (L-S), and metal/semiconductor-liquid-semiconductor (M/S-L-S) contact devices. Subsequent sections detail the operational mechanisms, strengths, and limitations of each category. Additionally, this paper outlines the enhancement mechanisms of SDC-TENGs providing guidance and recommendations for performance improvement. The conclusion highlights potential application scenarios for various types of SDC-TENGs, outlining the prospective benefits and challenges. SDC-TENG technology is poised to drive revolutionary developments in semiconductor devices and self-powered systems.

Flexible photodetectors have garnered significant attention by virtue of their potential applications in environmental monitoring, wearable healthcare, imaging sensing, and portable optical communications. Perovskites stand out as particularly promising materials for photodetectors, offering exceptional optoelectronic properties, tunable band gaps, low-temperature solution processing, and notable mechanical flexibility. In this review, we explore the latest progress in flexible perovskite photodetectors, emphasizing the strategies developed for photoactive materials and device structures to enhance optoelectronic performance and stability. Additionally, we discuss typical applications of these devices and offer insights into future directions and potential applications.

Silicon carbide (SiC), as a third-generation semiconductor material, possesses exceptional material properties that significantly enhance the performance of power devices. The SiC lateral double-diffused metal–oxide–semiconductor (LDMOS) power devices have undergone continuous optimization, resulting in an increase in breakdown voltage (BV) and ultra-low specific on-resistance (R_on,sp). This paper has summarized the structural optimizations and experimental progress of SiC LDMOS power devices, including the trench-gate technology, reduced surface field (RESURF) technology, doping technology, junction termination techniques and so on. The paper is aimed at enhancing the understanding of the operational mechanisms and providing guidelines for the further development of SiC LDMOS power devices.

CMOS analog and mixed-signal phase-locked loops (PLL) are widely used in varies of the system-on-chips (SoC) as the clock generator or frequency synthesizer. This paper presents an overview of the AMS-PLL, including: 1) a brief introduction of the basics of the charge-pump based PLL, which is the most widely used AMS-PLL architecture due to its simplicity and robustness; 2) a summary of the design issues of the basic CPPLL architecture; 3) a systematic introduction of the techniques for the performance enhancement of the CPPLL; 4) a brief overview of ultra-low-jitter AMS-PLL architectures which can achieve lower jitter (< 100 fs) with lower power consumption compared with the CPPLL, including the injection-locked PLL (ILPLL), sub-sampling (SSPLL) and sampling PLL (SPLL); 5) a discussion about the consideration of the AMS-PLL architecture selection, which could help designers meet their performance requirements.