This paper presents a design of single photon avalanche diode (SPAD) light detection and ranging (LiDAR) sensor with 128 × 128 pixels and 128 column-parallel time-to-analog-merged-analog-to-digital converts (TA-ADCs). Unlike the conventional TAC-based SPAD LiDAR sensor, in which the TAC and ADC are separately implemented, we propose to merge the TAC and ADC by sharing their capacitors, thus avoiding the analog readout noise of TAC’s output buffer, improving the conversion rate, and reducing chip area. The reverse start-stop logic is employed to reduce the power of the TA-ADC. Fabricated in a 180 nm CMOS process, our prototype sensor exhibits a timing resolution of 25 ps, a DNL of +0.30/−0.77 LSB, an INL of +1.41/−2.20 LSB, and a total power consumption of 190 mW. A flash LiDAR system based on this sensor demonstrates the function of 2D/3D imaging with 128 × 128 resolution, 25 kHz inter-frame rate, and sub-centimeter ranging precision.
Resistive random access memories (RRAMs) are emerging as a key enabling technology for cost-effective, energy-efficient and secure chips, especially in the framework of edge computing. In particular, their electrically programmable resistance has been widely exploited in several in-memory computing and neuromorphic architectures. By adjusting the applied voltages and compliance currents (IC), RRAM devices can be programmed to multiple resistance states during set and reset procedures, enabling multilevel functionality. While the multilevel behavior of the reset phase is generally well captured by existing compact models, only a few account for the multilevel characteristics of the set operations. Moreover, such models are rarely validated against comprehensive experimental datasets capturing device dynamics across multiple timescales. In this work, we present a physics-based compact model that enhances the UniMORE RRAM framework by incorporating the dynamic lateral evolution of the conductive filament (CF), thereby enabling accurate simulation of set operations at varying IC values. The model is calibrated to experimental data from IHP 130 nm 1T1R RRAM technology and reproduces device behavior across several operating conditions using a single set of parameters. The results highlight the potential of the proposed compact model in design optimization workflows of RRAM-based circuits.
In the present work, zinc oxide (ZnO) and silver (Ag) doped ZnO nanostructures are synthesized using a hydrothermal method. Structural quality of the products is attested using X-ray diffraction, which confirms the hexagonal wurtzite structure of pure ZnO and Ag-doped ZnO nanostructures. XRD further confirms the crystallite orientation along the c-axis, (101) plane. The field emission scanning electron microscope study reveals the change in shape of the synthesized ZnO particles from hexagonal nanoparticles to needle-shaped nanostructures for 3 wt% Ag-doped ZnO. The optical band gaps and lattice strain of nanostructures is increased significantly with the increase of doping concentration of Ag in ZnO nanostructure. The antimicrobial activity of synthesized nanostructures has been evaluated against the gram-positive human pathogenic bacteria, Staphylococcus aureus via an agarose gel diffusion test. The maximum value of zone of inhibition (22 mm) is achieved for 3 wt% Ag-doped ZnO nanostructure and it clearly demonstrates the remarkable antibacterial activity.
Currently, the global 5G network, cloud computing, and data center industries are experiencing rapid development. The continuous growth of data center traffic has driven the vigorous progress in high-speed optical transceivers for optical interconnection within data centers. The electro-absorption modulated laser (EML), which is widely used in optical fiber communications, data centers, and high-speed data transmission systems, represents a high-performance photoelectric conversion device. Compared to traditional directly modulated lasers (DMLs), EMLs demonstrate lower frequency chirp and higher modulation bandwidth, enabling support for higher data rates and longer transmission distances. This article introduces the composition, working principles, manufacturing processes, and applications of EMLs. It reviews the progress on advanced indium phosphide (InP)-based EML devices from research institutions worldwide, while summarizing and comparing data transmission rates and key technical approaches across various studies.
A 2D model for the potential distribution in silicon film is derived for a symmetrical double gate MOSFET in weak inversion. This 2D potential distribution model is used to analytically derive an expression for the subthreshold slope and threshold voltage. A drain current model for lightly doped symmetrical DG MOSFETs is then presented by considering weak and strong inversion regions including short channel effects, series source to drain resistance and channel length modulation parameters. These derived models are compared with the simulation results of the SILVACO (Atlas) tool for different channel lengths and silicon film thicknesses. Lastly, the effect of the fixed oxide charge on the drain current model has been studied through simulation. It is observed that the obtained analytical models of symmetrical double gate MOSFETs are in good agreement with the simulated results for a channel length to silicon film thickness ratio greater than or equal to 2.
Bulk single-crystal aluminum nitride (BSC AlN) substrates are known to be ideal platforms for constructing high-power and DUV optoelectronic nitride devices. However, high-quality epitaxial growth of nitride films on BSC AlN and related characterization is still far from being well studied. The challenges and uncertainties in doing accurate thermal characterization on such heterostructures are not fully recognized. In this study, we successfully fabricated a buffer-free thin GaN/AlN heterostructure on a BSC AlN substrate via metal−organic chemical vapor deposition (MOCVD) technology. This heterostructure consists of a 140 nm-thick AlN homoepitaxial layer and a 480 nm-thick GaN epitaxial layer. Characterization results indicate that the prepared heterojunction has excellent crystal quality and smooth surface morphology. To accurately obtain the thermophysical parameters of the heterostructure, this study employed broadband frequency domain thermoreflectance (BB-FDTR) technology, and careful measurements with detailed data analysis were demonstrated. In addition to showing the feasibility of epitaxial growth of high-quality thin film GaN directly on BSC AlN substrates, this study also provides key experimental data for evaluating the heat dissipation advantages of GaN/AlN heterostructures.
A compact pixel for single-photon detection in the analog domain is presented. The pixel integrates a single-photon avalanche diode (SPAD), a passive quenching & active recharging circuit (PQARC), and an analog counter for fast and accurate sensing and counting of photons. Fabricated in a standard 0.18 µm CMOS technology, the simulated and experimental results reveal that the dead time of the PQARC is about 8 ns and the maximum photon-counting rate can reach 125 Mcps (counting per second). The analog counter can achieve an 8-bit counting range with a voltage step of 6.9 mV. The differential nonlinearity (DNL) and integral nonlinearity (INL) of the analog counter are within the ± 0.6 and ± 1.2 LSB, respectively, indicating high linearity of photon counting. Due to its simple circuit structure and compact layout configuration, the total area occupation of the presented pixel is about 1500 μm2, leading to a high fill factor of 9.2%. The presented in-pixel front-end circuit is very suitable for the high-density array integration of SPAD sensors.
In this letter we report the morphological, electrical and thermal transport properties of a high electron mobility transistor (HEMT) style epitaxial wafer, where an approximately 2000 nm thick GaN layer has been directly deposited on a bulk single crystal AlN (BCS AlN) substrate with no buffer layer in between, and also the experimental results of DC and RF properties of a HEMT device based on such a wafer. The sample achieved very smooth surface morphology and roughness down to Ra = 0.172 nm over an area of 1 μm × 1 μm in AFM measurements. Electrical transport measurements showed sheet carrier concentration of 7.3 × 1012 cm−2, Hall mobility of 2220 cm2/(V·s) and sheet resistance of 386 Ω/sq. The measured maximum trans-conductance Gm of the fabricated HEMT device was 250 mS/mm at a gate bias voltage of −1.8 V. With a gate length of 500 nm and a gate-to-drain distance of 4.7 μm, the fT and fmax, derived from S-parameters measurements, are 25.9 and 54 GHz, respectively. Large-signal RF measurement exhibited a high linear power gain (Gp) of 25.2 dB and a peak output power (Pout) density of 7.2 W/mm@1.5 GHz, associated with a power-added efficiency (PAE) of 40.9%. Comparing with the structure with a 500 nm thick AlGaN buffer, the total thermal resistance of the structure in our device decreased by 44%. This work confirms the technical feasibility of fabricating GaN HEMT devices on BCS AlN substrates without any additional buffer layer, and the excellent electric and thermal transport properties of the simplified wafer structure indicate a bright future of BCS AlN-based GaN HEMT devices in ultra-high-frequency and high-power-density nitride electronics.
