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Additive and interfacial control for efficient perovskite light-emitting diodes with reduced trap densities 102
Shun Tian, Chen Zou, Runchen Lai, Chungen Hsu, Xuhui Cao, Shiyu Xing, Baodan Zhao, Dawei Di
2022, 43(5): 050502. doi: 10.1088/1674-4926/43/5/050502

A 256 Gb/s electronic−photonic monolithically integrated transceiver in 45 nm CMOS 98
Ang Li, Qianli Ma, Yujun Xie, Yongliang Xiong, Yingjie Ma, Han Liu, Ye Jin, Menghan Yang, Guike Li, Haoran Yin, Minye Zhu, Yang Qu, Peng Wang, Daofa Wang, Wei Li, Liyuan Liu, Nan Qi, Ming Li
2024, 45(7): 070501. doi: 10.1088/1674-4926/24050040

Defects evolution in n-type 4H-SiC induced by electron irradiation and annealing 81
Huifan Xiong, Xuesong Lu, Xu Gao, Yuchao Yan, Shuai Liu, Lihui Song, Deren Yang, Xiaodong Pi
2024, 45(7): 072502. doi: 10.1088/1674-4926/23090024

Radiation damage produced in 4H-SiC by electrons of different doses is presented by using multiple characterization techniques. Raman spectra results indicate that SiC crystal structures are essentially impervious to 10 MeV electron irradiation with doses up to 3000 kGy. However, irradiation indeed leads to the generation of various defects, which are evaluated through photoluminescence (PL) and deep level transient spectroscopy (DLTS). The PL spectra feature a prominent broad band centered at 500 nm, accompanied by several smaller peaks ranging from 660 to 808 nm. The intensity of each PL peak demonstrates a linear correlation with the irradiation dose, indicating a proportional increase in defect concentration during irradiation. The DLTS spectra reveal several thermally unstable and stable defects that exhibit similarities at low irradiation doses. Notably, after irradiating at the higher dose of 1000 kGy, a new stable defect labeled as R2 (Ec − 0.51 eV) appeared after annealing at 800 K. Furthermore, the impact of irradiation-induced defects on SiC junction barrier Schottky diodes is discussed. It is observed that high-dose electron irradiation converts SiC n-epilayers to semi-insulating layers. However, subjecting the samples to a temperature of only 800 K results in a significant reduction in resistance due to the annealing out of unstable defects.

Indium–gallium–zinc–oxide thin-film transistors: Materials, devices, and applications 74
Ying Zhu, Yongli He, Shanshan Jiang, Li Zhu, Chunsheng Chen, Qing Wan
2021, 42(3): 031101. doi: 10.1088/1674-4926/42/3/031101

Since the invention of amorphous indium–gallium–zinc–oxide (IGZO) based thin-film transistors (TFTs) by Hideo Hosono in 2004, investigations on the topic of IGZO TFTs have been rapidly expanded thanks to their high electrical performance, large-area uniformity, and low processing temperature. This article reviews the recent progress and major trends in the field of IGZO-based TFTs. After a brief introduction of the history of IGZO and the main advantages of IGZO-based TFTs, an overview of IGZO materials and IGZO-based TFTs is given. In this part, IGZO material electron travelling orbitals and deposition methods are introduced, and the specific device structures and electrical performance are also presented. Afterwards, the recent advances of IGZO-based TFT applications are summarized, including flat panel display drivers, novel sensors, and emerging neuromorphic systems. In particular, the realization of flexible electronic systems is discussed. The last part of this review consists of the conclusions and gives an outlook over the field with a prediction for the future.

Towards efficient generative AI and beyond-AI computing: New trends on ISSCC 2024 machine learning accelerators 66
Bohan Yang, Jia Chen, Fengbin Tu
2024, 45(4): 040204. doi: 10.1088/1674-4926/45/4/040204

A review of ToF-based LiDAR 61
Jie Ma, Shenglong Zhuo, Lei Qiu, Yuzhu Gao, Yifan Wu, Ming Zhong, Rui Bai, Miao Sun, Patrick Yin Chiang
doi: 10.1088/1674-4926/24040015

In recent years, propelled by the rapid iterative advancements in digital imaging technology and the semiconductor industry, encompassing microelectronic design, manufacturing, packaging, and testing, time-of-flight (ToF)-based imaging systems for acquiring depth information have garnered considerable attention from both academia and industry. This technology has emerged as a focal point of research within the realm of 3D imaging. Owing to its relatively straightforward principles and exceptional performance, ToF technology finds extensive applications across various domains including human−computer interaction, autonomous driving, industrial inspection, medical and healthcare, augmented reality, smart homes, and 3D reconstruction, among others. Notably, the increasing maturity of ToF-based LiDAR systems is evident in current developments. This paper comprehensively reviews the fundamental principles of ToF technology and LiDAR systems, alongside recent research advancements. It elucidates the innovative aspects and technical challenges encountered in both transmitter (TX) and receiver (RX), providing detailed discussions on corresponding solutions. Furthermore, the paper explores prospective avenues for future research, offering valuable insights for subsequent investigations.

Impact of strain relaxation on the growth rate of heteroepitaxial germanium tin binary alloy 58
Pedram Jahandar, Maksym Myronov
doi: 10.1088/1674-4926/24030002

The growth of high-quality germanium tin (Ge1–ySny) binary alloys on a Si substrate using chemical vapor deposition (CVD) techniques holds immense potential for advancing electronics and optoelectronics applications, including the development of efficient and low-cost mid-infrared detectors and light sources. However, achieving precise control over the Sn concentration and strain relaxation of the Ge1–ySny epilayer, which directly influence its optical and electrical properties, remain a significant challenge. In this research, the effect of strain relaxation on the growth rate of Ge1–ySny epilayers, with Sn concentration >11 at.%, is investigated. It is successfully demonstrated that the growth rate slows down by ~55 % due to strain relaxation after passing its critical thickness, which suggests a reduction in the incorporation of Ge into Ge1–ySny growing layers. Despite the increase in Sn concentration as a result of the decrease in the growth rate, it has been found that the Sn incorporation rate into Ge1–ySny growing layers has also decreased due to strain relaxation. Such valuable insights could offer a foundation for the development of innovative growth techniques aimed at achieving high-quality Ge1–ySny epilayers with tuned Sn concentration and strain relaxation.

Current-collapse suppression and leakage-current decrease in AlGaN/GaN HEMT by sputter-TaN gate-dielectric layer 56
Bosen Liu, Guohao Yu, Huimin Jia, Jingyuan Zhu, Jiaan Zhou, Yu Li, Bingliang Zhang, Zhongkai Du, Bohan Guo, Lu Wang, Qizhi Huang, Leifeng Jiang, Zhongming Zeng, Zhipeng Wei, Baoshun Zhang
2024, 45(7): 072501. doi: 10.1088/1674-4926/24010025

In this paper, we explore the electrical characteristics of high-electron-mobility transistors (HEMTs) using a TaN/AlGaN/GaN metal insulating semiconductor (MIS) structure. The high-resistance tantalum nitride (TaN) film prepared by magnetron sputtering as the gate dielectric layer of the device achieved an effective reduction of electronic states at the TaN/AlGaN interface, and reducing the gate leakage current of the MIS HEMT, its performance was enhanced. The HEMT exhibited a low gate leakage current of 2.15 × 10−7 mA/mm and a breakdown voltage of 1180 V. Furthermore, the MIS HEMT displayed exceptional operational stability during dynamic tests, with dynamic resistance remaining only 1.39 times even under 400 V stress.

Implementation of sub-100 nm vertical channel-all-around (CAA) thin-film transistor using thermal atomic layer deposited IGZO channel 55
Yuting Chen, Xinlv Duan, Xueli Ma, Peng Yuan, Zhengying Jiao, Yongqing Shen, Liguo Chai, Qingjie Luan, Jinjuan Xiang, Di Geng, Guilei Wang, Chao Zhao
2024, 45(7): 072301. doi: 10.1088/1674-4926/24010032

In–Ga–Zn–O (IGZO) channel based thin-film transistors (TFT), which exhibit high on–off current ratio and relatively high mobility, has been widely researched due to its back end of line (BEOL)-compatible potential for the next generation dynamic random access memory (DRAM) application. In this work, thermal atomic layer deposition (TALD) indium gallium zinc oxide (IGZO) technology was explored. It was found that the atomic composition and the physical properties of the IGZO films can be modulated by changing the sub-cycles number during atomic layer deposition (ALD) process. In addition, thin-film transistors (TFTs) with vertical channel-all-around (CAA) structure were realized to explore the influence of different IGZO films as channel layers on the performance of transistors. Our research demonstrates that TALD is crucial for high density integration technology, and the proposed vertical IGZO CAA-TFT provides a feasible path to break through the technical problems for the continuous scale of electronic equipment.

Design space of electrostatic chuck in etching chamber 55
Yuchun Sun, Jia Cheng, Yijia Lu, Yuemin Hou, Linhong Ji
2015, 36(8): 084004. doi: 10.1088/1674-4926/36/8/084004

One of the core semiconductor devices is the electrostatic chuck. It has been widely used in plasma-based and vacuum-based semiconductor processing. The electrostatic chuck plays an important role in adsorbing and cooling/heating wafers, and has technical advantages on non-edge exclusion, high reliability, wafer planarity, particles reduction and so on. This article extracts key design elements from the existing knowledge and techniques of electrostatic chuck by the method proposed by Paul and Beitz, and establishes a design space systematically. The design space is composed of working objects, working principles and working structures. The working objects involve electrostatic chuck components and materials, classifications, and relevant properties; the working principles involve clamping force, residual force, and temperature control; the working structures describe how to compose an electrostatic chuck and to fulfill the overall functions. The systematic design space exhibits the main issues during electrostatic chuck design. The design space will facilitate and inspire designers to improve the design quality and shorten the design time in the conceptual design.