Design Analysis of a Novel Low Triggering Voltage Dual Direction SCR ESD Device in 0.18μm Mixed Mode RFCMOS Technology

  • School of Information,Jiangnan University,Wuxi 214035,China
  • 58th Institute of CETC,Wuxi 214035,China
  • ESD Laboratory,Department of Information Science and Electronic Engineering,Zhejiang University, Hangzhou 310027,China
  • School of Information,Jiangnan University,Wuxi 214035,China

Key words: electrostatic dischargedual direction SCRsnapback

Abstract: A novel SCR on-chip ESD device is proposed to protect IC chips against ESD stressing in two opposite directions.The triggering voltages of four types of dual direction SCRs (DDSCR) are compared and analyzed.pMOS or nMOS are embedded into the structures to adjust their triggering voltages.Both MOSFETs embedded DDSCRs have tunable triggering voltage,low DC leakage (~pA),and fast turn on speed snapback I-V characteristics without latch-up problem.It achieves high ESD performance of ~94V/μm.The new ESD protection devices are area efficient and can reduce the parasitic effects significantly.


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