Analytical Model and Optimization of Bulk-Silicon Surface Implanted LDMOS with p Buried Layer

  • IC Design Center,University of Electronic Science & Technology,Chengdu 610054,China
  • IC Design Center,University of Electronic Science & Technology,Chengdu 610054,China
  • IC Design Center,University of Electronic Science & Technology,Chengdu 610054,China

Key words: p buried layersurface implantedsurface electrical fieldbreakdown voltagemodel

Abstract: A novel bulk-silicon surface implanted device with a p buried layer is proposed,and an analytical model for the surface electrical field distributions and breakdown voltage is developed.The on-resistance is decreased as a result of the surface-implanted n+ layer surface,and the p buried layer improves the surface electrical field distribution and increases the optimal drift region doping concentration.Based on the 2D Poisson’s solution,the model gives the closed form solutions of the surface potential and electrical field distributions as functions of the structure parameters and drain bias.The dependence of breakdown voltage on structure parameters is also calculated.Analytical results are well verified by simulation results obtained by MEDICI,showing the validity of the model presented here.BSI structure allowed a significant improvement of breakdown voltage by about 16%,and reduction of on-resistance by about 31%,compared to conventional structures.

    HTML

Relative (20)

Journal of Semiconductors © 2017 All Rights Reserved