A Low Voltage Low Power CMOS 5Gb/s Transceiver

  • College of Information Science and Technology,Nankai University,Tianjin 300071,China
  • IDT (Shanghai) Co.Ltd.,Shanghai 200233,China
  • College of Information Science and Technology,Nankai University,Tianjin 300071,China

Key words: low voltagelow powertransceiverequalization

Abstract: A low voltage and low power SerDes transceiver implemented in 0.13μm CMOS is described.The power supply voltage is 1V,and the operating frequency range is from 2.5 to 5GHz.The transmitter includes a 20∶1 serializer and a transmission driver,the latter of which uses pre-emphasis architecture for channel compensation.The receiver employs two 1∶20 deserializer,an input signal pre-amplifier,and a clock and data recovery circuit.The pre-amplifier employs a novel architecture,consisting of a feed-forward equalizer to cancel ISI.The measured transceiver power consumption is 127mW/channel.The RMS jitter of the transmitter output is 4ps.Test results indicate the receiver BER is less than 1e-12 when the input signal amplitude is 150mV differential peak to peak and the eye closure is 0.5UI.

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