The thermal sensitivity of phase-change memory (PCM) poses a stringent thermal budget for back-end encapsulation, demanding high-performance diffusion barriers processable at low temperatures. Conventional low-temperature silicon nitride (SiNx) films, however, are typically porous and prone to oxidation due to abundant metastable Si–H/N–H bonds. Herein, we propose an in-situ plasma cycling strategy that reconstructs the bonding network of plasma-enhanced chemical vapor deposition (PECVD) SiNx at a record-low temperature of 200 °C. Through controlled Ar/N2 plasma exposure, we cleave metastable bonds and reorganize into a continuous Si–N network, achieving a near-theoretical density of 3.4 g/cm3 (a 61.9% increase) and a 143.8% enhancement in Si–N bonding proportion. The resulting 40-nm barrier effectively suppresses Te/O interdiffusion, reduces wet-etch rate by ~67%, and maintains thermal confinement within 1.6% deviation. Integrated into PCM devices, this barrier yields a 98.7% SET/RESET operation yield and a 1.4-fold wider resistance window. This work not only provides a reliable encapsulation solution for PCM but also establishes a generalizable plasma-mediated interfacial engineering approach for advanced electronic devices under thermal constraints.
Just Accepted manuscripts are peer-reviewed and accepted for publication. They are posted online prior to technical editing formatting for publication and author proofing.
Achieving high emission efficiency at low current densities remains a challenge for micro-LEDs. Here, we demonstrate a controllable interfacial strategy by tuning the annealing temperature of RF-superimposed DC sputtered ITO to modulate carrier injection dynamics. STEM analysis reveals 500 °C annealing triggers discrete substitutional In-atom incorporation into the p-GaN lattice, forming localized nanoscale contact regions. This architecture induces a localized carrier injection mechanism that significantly enhances the efficiency of micro-LEDs at low current densities. Specifically, the 500 °C-annealed 10 μm devices exhibit a dramatic enhancement in light output power (LOP), reaching 1.3 × 10−1 mW at 5 A/cm2, which is significantly higher than the 5.3 × 10−4 mW measured for 700 °C-annealed devices. Furthermore, the peak efficiency current density (Jpeak) is dramatically shifted from 140 to 17 A/cm2 for 5 μm devices. Capacitance-voltage analysis further corroborates the localized carrier injection mechanism. These findings establish contact interfacial modulation as a robust strategy for optimizing micro-LEDs in low-power display applications and tailoring device-level performance across broader optoelectronics.
Efficient spin injection is crucial for developing high-performance spintronic and optoelectronic devices. To address the issue of low spin injection efficiency caused by lattice mismatch and interface defects in traditional CoFeB/MgO tunnel junctions, this work proposes a strategy of using graphene as an insertion layer to optimize interface quality and enhance the spin injection efficiency of tunnel junctions. By systematically investigating three types of tunnel junction structures, namely CoFeB/MgO, CoFeB/Graphene/MgO and CoFeB/MgO/Graphene, we demonstrate that the graphene insertion layer can effectively release interface stress, reduce defects and distortions induced by lattice mismatch, and thereby suppress spin scattering. Meanwhile, it alleviates resistance mismatch while preserving high spin polarization. Ultimately, the spin injection polarization is increased from 10.6% to 16.2%, representing an enhancement of approximately 53%. Additionally, the optimized CoFeB/MgO/Graphene tunnel junction was integrated into GaN-based spin light-emitting diodes, resulting in an increased circular polarization of electroluminescence from 8.4% to 17.3%. This work provides an interface engineering strategy for achieving efficient spin injection and advancing the development of spin-optoelectronic devices.
The integration of two-dimensional (2D) semiconductors with mainstream complementary metal-oxide-semiconductor (CMOS) technology is hampered by the limited ability to adjust device performance after fabrication. Here, we present a differential Schottky-barrier tuning strategy to post-customize the optoelectronic performance based on a two-dimensional asymmetric Schottky contact WSe2 photodiode, eliminating the need for device re-fabrication. A brief, room-temperature ozone exposure (1.5 min) enables in-situ tuning of the rectification ratio across three orders of magnitude (from 102 to 105) and enhances the peak responsivity at 532 nm by 11.2 times. These effects stem from differential modulation of Schottky barrier height (SBH) at the asymmetric contacts. While the SBH at the WSe2/Au interface is reduced, the SBH at the WSe2/graphene junction is elevated, a phenomenon unlocked by the combination of oxidation-induced Fermi-level lowering in WSe2 and interfacial dipole modification. Our method establishes a "device-after-design" paradigm for 2D material engineering, providing a CMOS-compatible and versatile route toward adaptive optoelectronics for applications in wearable sensing and reconfigurable photonic systems.
A skipper image sensor (SIS) with lateral overflow gate-coupled capacitor (LOGCC) is proposed in this work. During the integration period, the transfer gates after TG are switched on to construct a LOGCC with specific operation timing. Once high light illumination fully charges the pinned photodiode (PPD), the extra photogenerated electrons will overflow to LOGCC, which effectively improve the dynamic range (DR) of SIS. Before the readout of signal in PPD, the electrons stored in LOGCC are sampled and then reset through the floating diffusion (FD). In the end, the electrons in PPD are sampled by the method of the conventional skipper pixels. According to TCAD simulation results, the extra electrons are transferred to LOGCC through the TG effectively. Measurement of prototype chip shows that the DR is extended to 89.3 dB. As contrast, the DR is 66 dB when switching off the transfer gates, i.e. LOGCC. Compared with traditional SIS, the proposed architecture achieved DR extension by introducing LOGCC which is constructed with transfer gates. Therefore, this study proposes the introduction of LOGCC to expand the application scenarios of SIS, providing a new approach for its use in conditions requiring stronger light.
The integration of proximity sensing into flexible tactile electronic skins (e-skins) represents a fundamental shift from conventional contact-only interfaces toward anticipatory perception systems. This mini-review provides a systematic examination of recent advances in proximity-augmented e-skins, which overcome the inherent latency of tactile sensors by extending sensory awareness into the pre-contact domain. We provide a comprehensive overview of five key sensing modalities—capacitive, triboelectric, magnetic, temperature-based, and humidity-based—detailing their operating principles, material innovations, and structural optimization strategies. System-level requirements for practical deployment are also critically analyzed. Representative applications in interactive surfaces, human–robot collaboration, soft robotics, healthcare monitoring, and integrated multifunctional e-skins are highlighted to illustrate the transformative potential of this technology. Despite substantial progress, challenges persist in seamless multimodal integration, scalable manufacturing, and intelligent data fusion. Future directions are discussed to realize robust, perceptually intelligent e-skins that bridge the gap between laboratory innovations and real-world applications.
