Sb₂S₃ has attracted increasing attention for next-generation photovoltaics due to its excellent materials and optoelectronic properties, especially a suitable bandgap (~1.75 eV) for indoor photovoltaics and silicon-based tandem solar cells. However, the highest power conversion efficiency (PCE) report thus far for Sb₂S₃ solar cells is 8.26%, lagging far behind its theoretical efficiency limit (~28%). This study aims to scrutinize the important roles of hole transport layers (HTLs) in near-intrinsic Sb₂S₃ solar cells. It is found that the device efficiencies of both of p-type Sb₂S₃ and n-type Sb₂S₃ based planar solar cells are significantly enhanced with the incorporation of Spiro-OMeTAD HTL, further confirmed by the SCAPS simulation. The specific roles of HTL on promoting the interface hole extraction in Sb₂S₃ solar cells are elucidated. Then the performance optimization is conducted by systematically optimizing key parameters of Sb₂S₃ absorbers, such as absorber thickness, defect density, and doping concentration. Furthermore, several typical inorganic HTL candidates for replacing Spiro-OMeTAD were explored for Sb₂S₃ solar cells, revealing that the Cu₂O HTL based device exhibits a highest PCE of 23.09%. This work highlights the necessity of HTLs for devices based on near-intrinsic Sb₂S₃ and provides valuable insights for further enhancing the performance of Sb₂S₃ solar cells.

Integrating electrochromic (EC) and photochromic (PC) functions within a single material system holds great significance for the development of next-generation intelligent responsive materials. Traditional organic photochromic materials are all small molecules and oligomers, which require the photochemical response of specific photosensitive groups. However, PEDOT:PSS, a classic electrochromic polymer, has never been reported to exhibit photochromic properties due to the absence of photosensitive groups. Herein, we report for the first time the photochromic properties of PEDOT:PSS films, demonstrating their simultaneous capability of multi-field coupling response in the aspects of light, electricity and chemistry. The composite film undergoes a rapid color change from light blue to dark blue under ultraviolet light irradiation. This is attributed to the transformation process from the bipolarons state to the polarons state in the PEDOT:PSS, induced by photogenerated electrons as confirmed by EPR and Raman analyses. Furthermore, the developed hydrogel system enhances charge separation, yielding a 30.1% relative transmittance change and month-long stability. This work fills the long-standing gap in the understanding of the photochromic and electrochromic mechanisms of PEDOT:PSS, providing fundamental insights into carrier dynamics at organic-inorganic interfaces and laying the foundation for the development of multi-mode stimuli-responsive devices.

Achieving long-range, high-accuracy depth perception under stringent power constraints remains a critical challenge for stereo vision in edge applications. This work presents a cascadable stereo matching processor that overcomes the inherent trade-off between sensing range and computational efficiency. The core innovation is a scalable semi-global matching (SSGM) algorithm which dynamically optimizes the disparity search range for different baselines, ensuring constant on-chip memory usage and a significant reduction in data movement. The architecture further integrates a raw-domain rectification front-end, which performs direct geometric transformation on Bayer-patterned image streams. This approach eliminates the need for external memory access by bypassing conventional ISP pipelines, thereby maximizing throughput and reducing system memory consumption. Parallel processing paths for multiple baselines converge in a pixel-wise fusion module, which synthesizes a unified depth map by selecting the most reliable disparity estimate for each output pixel. The cascadable stereo matching processor achieves speedups of up to 178x and 97x over CPU and EdgeGPU platforms, respectively, in multi-baseline stereo disparity fusion. Implemented in 40-nm CMOS technology, the processor operates at 160 MHz, achieving a processing speed of 80 frames per second with an energy efficiency of 7.9 pJ/pixel and occupying a core area of 6.04 mm².