Heterogeneously integrated lithium niobate (LN) electro-optic modulators have great potential for high-speed applications, but challenges remain in optimizing performance, particularly in terms of modulation efficiency, bandwidth, and the trade-offs. This work presents an optimized design for a silicon-nitride (Si3N4)-loaded modulator on a thin-film lithium niobate (TFLN) platform, consisting of 300 nm-thick LN film and 300 nm-thick Si3N4 optical waveguide. By systematically optimizing the dielectric layer thickness, electrode parameters, and achieving velocity and impedance matching, we demonstrate a modulator with a bandwidth exceeding 200 GHz. Our collaborative optimization scheme highlights the critical role of reducing the silicon oxide box layer thickness for velocity matching. We show that multiple structural configurations can achieve bandwidths greater than 120 GHz with Vπ·L＜ 4 V·cm, providing feasibility in low-loss design and fabrication. These findings offer valuable design guidelines for high-performance electro-optic modulators suitable for data communications.
Just Accepted manuscripts are peer-reviewed and accepted for publication. They are posted online prior to technical editing formatting for publication and author proofing.
Achieving long-range, high-accuracy depth perception under stringent power constraints remains a critical challenge for stereo vision in edge applications. This work presents a cascadable stereo matching processor that overcomes the inherent trade-off between sensing range and computational efficiency. The core innovation is a scalable semi-global matching (SSGM) algorithm which dynamically optimizes the disparity search range for different baselines, ensuring constant on-chip memory usage and a significant reduction in data movement. The architecture further integrates a raw-domain rectification front-end, which performs direct geometric transformation on Bayer-patterned image streams. This approach eliminates the need for external memory access by bypassing conventional ISP pipelines, thereby maximizing throughput and reducing system memory consumption. Parallel processing paths for multiple baselines converge in a pixel-wise fusion module, which synthesizes a unified depth map by selecting the most reliable disparity estimate for each output pixel. The cascadable stereo matching processor achieves speedups of up to 178x and 97x over CPU and EdgeGPU platforms, respectively, in multi-baseline stereo disparity fusion. Implemented in 40-nm CMOS technology, the processor operates at 160 MHz, achieving a processing speed of 80 frames per second with an energy efficiency of 7.9 pJ/pixel and occupying a core area of 6.04 mm2.
Two-dimensional (2D) magnetic materials have attracted significant attention owing to their tunable magnetic properties and prospective applications in next-generation spintronic devices. However, their practical utilization is often limited by poor air stability. 2D magnetic metal oxides, which generally exhibit better stability under ambient conditions, represent a promising alternative. In this work, high-quality CoO nanosheets were successfully synthesized via chemical vapor deposition. Structural characterization confirms a well-defined triangular morphology and single-crystalline nature, with the thinnest nanosheets reaching approximately 10.1 nm in thickness. Magnetic measurements reveal significant magnetic anisotropy with an in-plane easy magnetization axis and a transition temperature of approximately 159 K. Our study provides a feasible approach for the controllable synthesis of air-stable 2D magnetic semiconductors, thereby laying a foundation for their potential application in low-power spintronic devices.
The computational cost of TCAD simulations is becoming prohibitively high with the complexity of advanced process technologies, making simulation acceleration a critical research priority. While end-to-end surrogate models mapping process recipes to device structures and characteristics offer a promising alternative, their application is often limited by poor generalizability and explainability. In this work, we present MPNet, a modular deep learning surrogate modeling framework for process TCAD. MPNet comprises distinct surrogate models for individual process modules, which are assembled into an integrated framework. These modular models employ a novel UNet-attention feature evolution method to capture the complex evolutions of device geometry and doping profiles. Each module can be trained separately on its individual process, after which the modules are cascaded and jointly fine-tuned to minimize error accumulation throughout the cascade. The efficacy of the proposed MPNet framework is demonstrated through a MOSFET integrated process TCAD case study. Results show that MPNet achieves a computational speedup of over 103 times compared to conventional TCAD, while maintaining predictive fidelity exceeding 98%. Finally, to illustrated the application of the proposed framework, MPNet is coupled with a PSO algorithm, showcasing its utility for fast process optimization to meet specific process targets.
