A high-sensitivity, low-noise single photon avalanche diode (SPAD) detector was presented based on a 180 nm BCD process. The proposed device utilizes a p-implant layer/high-voltage n-well (HVNW) junction to form a deep avalanche multiplication region for near-infrared (NIR) sensitivity enhancement. By optimizing the device size and electric field of the guard ring, the fill factor (FF) is significantly improved, further increasing photon detection efficiency (PDE). To solve the dark noise caused by the increasing active diameter, a field polysilicon gate structure connected to the p+ anode was investigated, effectively suppressing dark count noise by 76.6%. It is experimentally shown that when the active diameter increases from 5 to 10 μm, the FF is significantly improved from 20.7% to 39.1%, and thus the peak PDE also rises from 13.3% to 25.8%. At an excess bias voltage of 5 V, a NIR photon detection probability (PDP) of 6.8% at 905 nm, a dark count rate (DCR) of 2.12 cps/μm2, an afterpulsing probability (AP) of 1.2%, and a timing jitter of 216 ps are achieved, demonstrating excellent single photon detection performance.
Just Accepted manuscripts are peer-reviewed and accepted for publication. They are posted online prior to technical editing formatting for publication and author proofing.
CZTS (Cu2ZnSnS4) is a quaternary semiconductor that is environmentally friendly, less expensive. In this paper, we report on the optimization and fabrication of CZTS-based heterojunction nanodevices for bifunctional applications such as solar cells and photodetectors. CZTS thin films were deposited on top of (Molybdenum) Mo-coated glass substrates via RF sputtering at 100 and 200 Watt. Rapid thermal processing (RTP) was used at 300, 400, and 500°C temperatures. CdS (Cadmium sulphide) was deposited on CZTS using a chemical bath deposition system with 3- and 5-minute (min) deposition times. ZnO (Zinc Oxide) and AZO (Aluminium doped Zinc Oxide) layers were deposited using RF (Radio Frequency) sputtering to create the solar device. XRD confirms the formation of a tetragonal structure with increased crystallinity due to the use of RTP. Raman reveals the characteristic Raman shift peak associated with CZTS at 336 and 335 cm−1. The FESEM shows a relationship with RTP temperature. Surface features, including grain size, vary with RTP temperature. The ideality factor is nearly 2, indicating imperfection in the Mo/CZTS interface. Schottky barrier height estimates range from 0.6 to 0.7 eV. Absorbance and transmittance show a predictable fluctuation with RTP temperature. Photovoltaic device was built using the higher crystalline feature of CZTS in conjunction with CdS deposited at 3 and 5 min. The efficiency of CdS deposited after 3 and 5 min was 1.15 and 0.97 percent, respectively. Fabricated devices were used for wavelength-dependent photodetection. This work demonstrated self-powered photodetection.
Metal halide perovskites (MHPs) have become promising optoelectronic materials due to their long carrier lifetimes and high mobility. However, the presence of defects and ion migration in MHPs results in high and unstable dark currents, which compromise the stability and detection performance of MHP-based optoelectronic devices. Interfacial engineering has proven to be an effective strategy to reduce defect density in MHPs and suppress ion migration. Given the compatibility of silicon (Si) and MHP processing technologies, coupled with the simplicity and cost-effectiveness of the approach, the integration of MHPs onto Si surfaces has become a prominent area of research. This integration not only enhances device performance but also expands their practical applications. This review provides an overview of the integration technologies for Si and single crystal MHPs, evaluates the advantages and limitations of various integration schemes (including inverse temperature crystallization, vacuum-assisted vapor deposition, and anti-solvent vapor-assisted crystallization), and explores the practical applications of Si/MHP-integrated optoelectronic devices with different structures. These optimized devices exhibit outstanding performance in X-ray detection, multi-wavelength photodetection, and circularly polarized light detection. This review provides a systematic reference for technological innovation and application expansion of Si/MHP-integrated devices.
A monolithic integrated full-wave bridge rectifier consisted of horizontal Schottky-barrier diodes (SBD) is prepared based on 100 nm ultra-thin β-Ga2O3 and demonstrated the solar-blind UV (SUV) light-modulated characteristics. Under SUV light illumination, the rectifier has the excellent full-wave rectification characteristics for the AC input signals of 5 V, 12 V and 24 V with different frequencies. Further, experimental results confirmed the feasibility of continuously tuning the rectified output through SUV light-encoding. This work provides valuable insights for the development of optically programmable Ga2O3 AC-DC converters.
Along with NOR flash cell scaling down, dielectric burnout has gradually become one of the most important factors which affects product reliability, especially for high dropout voltage films. In this study, we demonstrate a reliability-enhanced NOR flash cell in 50 nm node technology through structural optimization of floating gate (FG) dimensions and active area profile. By synergistically increasing FG thickness, reducing FG width, and tuning cell-open depth, the control gate-to-active area corner distance expands by 22%, suppressing peak electric fields by 29% vertically and 18% horizontally. This structural innovation achieves: (1) 100× reduction in early-cycle burnout failures, (2) 7.38× Time Dependent Dielectric Breakdown lifetime improvement, while maintaining data retention and accelerating programming/erasing speeds by 15.4%/7.3%. The enhanced reliability enables 97.5% reduction in Fowler-Nordheim stress time during Characterization Program testing, providing a cost-effective solution for automotive-grade flash memories.
