J. Semicond. > Volume 32 > Issue 2 > Article Number: 025006

A 10-bit 80-MS/s opamp-sharing pipelined ADC with a switch-embedded dual-input MDAC

Yin Rui , Liao Youchun , Zhang Wei and Tang Zhangwen

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Abstract: A 10-bit 80-MS/s opamp-sharing pipelined ADC is implemented in a 0.18-μm CMOS. An opamp-sharing MDAC with a switch-embedded dual-input opamp is proposed to eliminate the non-resetting and successive-stage crosstalk problems observed in the conventional opamp-sharing technique. The ADC achieves a peak SNDR of 60.1 dB (ENOB = 9.69 bits) and a peak SFDR of 76 dB, while maintaining more than 9.6 ENOB for the full Nyquist input bandwidth. The core area of the ADC is 1.1 mm2 and the chip consumes 28 mW with a 1.8 V power supply.

Key words: pipelined ADC

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Yin R, Liao Y C, Zhang W, Tang Z W. A 10-bit 80-MS/s opamp-sharing pipelined ADC with a switch-embedded dual-input MDAC[J]. J. Semicond., 2011, 32(2): 025006. doi: 10.1088/1674-4926/32/2/025006.

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History

Manuscript received: 18 August 2015 Manuscript revised: 14 September 2010 Online: Published: 01 February 2011

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