J. Semicond. > Volume 33 > Issue 1 > Article Number: 015011

An offset cancellation technique in a switched-capacitor comparator for SAR ADCs

Tong Xingyuan , Zhu Zhangming and Yang Yintang

+ Author Affilications + Find other works by these authors

PDF

Abstract: An offset cancellation technique for a SAR (successive approximation register) ADC switched-capacitor comparator is described. The comparator is designed with a pre-amplifying and regenerative latching structure and realized in 0.18 μm CMOS. With the first stage preamplifier offset cancellation and low offset regenerative latching approach, the equivalent offset of the comparator is reduced to < 0.55 mV. By using the pre-amplifying and regenerative latching comparison mode the comparator exhibits low power dissipation. Under a 1.8 V power supply, with a 200 kS/s ADC sampling rate and 3 MHz clock frequency, a 13-bit comparison resolution is reached and less than 0.09 mW power dissipation is consumed. The superiority of this comparator is discussed and proved by the post-simulation and application to a 10 bit 200 kS/s touch screen SAR A/D converter.

Key words: A/D converterswitched-capacitor comparatorpreamplifierregenerative latchlow powerlow offset

[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[1]

Shubin Liu, Zhangming Zhu, Yintang Yang, Lianxi Liu. A high speed low power low offset dynamic comparator used in SHA-less pipelined ADC. J. Semicond., 2014, 35(5): 055008. doi: 10.1088/1674-4926/35/5/055008

[2]

Shimin Feng, Suihua Zhou, Zhiyi Chen. A very low noise preamplifier for extremely low frequency magnetic antenna. J. Semicond., 2013, 34(7): 075003. doi: 10.1088/1674-4926/34/7/075003

[3]

Wang Xiaoxia, Wang Zhigong. High performance power-configurable preamplifier in a high-density parallel optical receiver. J. Semicond., 2012, 33(1): 015004. doi: 10.1088/1674-4926/33/1/015004

[4]

Yin Tao, Yang Haigang, Liu Ke. A Low-Noise,Low-Offset Chopper Amplifier for Micro-Sensor Readout Circuit. J. Semicond., 2007, 28(5): 796.

[5]

Chen Honglei, Wu Dong, Shen Yanzhao, Xu Jun. A low power 14 bit 51.2 kS/s double-sampling extended counting ADC with a class-AB OTA. J. Semicond., 2012, 33(9): 095004. doi: 10.1088/1674-4926/33/9/095004

[6]

Kai Tang, Qiao Meng, Zhigong Wang, Ting Guo. A low power 20 GHz comparator in 90 nm COMS technology. J. Semicond., 2014, 35(5): 055002. doi: 10.1088/1674-4926/35/5/055002

[7]

Xu Bulu, Shao Bowen, Lin Xia, Yi Wei, Liu Yun. Design and verification of a 10-bit 1.2-V 100-MSPS D/A IP core based on a 0.13-μm low power CMOS process. J. Semicond., 2010, 31(9): 095007. doi: 10.1088/1674-4926/31/9/095007

[8]

Ma Haifeng, Zhou Feng, Niu Qi, Lü Changhui. Nested Miller Active-Capacitor Frequency Compensation for Low-Power Three-Stage Amplifiers. J. Semicond., 2008, 29(9): 1698.

[9]

Sun Yehui, Jiang Lixin, Qin Shicai. A Low Voltage Low Power CMOS 5Gb/s Transceiver. J. Semicond., 2007, 28(8): 1283.

[10]

Chenjian Wu, Zhiqun Li, Ge Sun. A low voltage low power up-conversion mixer for WSN application. J. Semicond., 2014, 35(4): 045006. doi: 10.1088/1674-4926/35/4/045006

[11]

Ying Jianhua, Chen Jia, Wang Jie. Design of Low Power,High PSRR Voltage Reference. J. Semicond., 2007, 28(6): 975.

[12]

Weiyang Liu, Jingjing Chen, Haiyong Wang, Nanjian Wu. A low power 2.4 GHz transceiver for ZigBee applications. J. Semicond., 2013, 34(8): 085007. doi: 10.1088/1674-4926/34/8/085007

[13]

Yu Yang, Zhao Qian, Shao Zhibiao. A Low Power SRAM/SOI Memory Cell Design. J. Semicond., 2006, 27(2): 318.

[14]

Quan Zhou, Shuxu Guo, Jingyi Song, Zhaohan Li, Guotong Du, Yuchun Chang. A low power discrete operation mode for punchthrough phototransistor. J. Semicond., 2013, 34(7): 074010. doi: 10.1088/1674-4926/34/7/074010

[15]

Li Guofeng, Geng Zhiqing, Wu Nanjian. A low power automatic gain control loop for a receiver. J. Semicond., 2010, 31(9): 095009. doi: 10.1088/1674-4926/31/9/095009

[16]

Wei Benfu, Yuan Guoshun. Design of a Low Noise,Low Power Audio Power Amplifierfor Driving Headphones. J. Semicond., 2006, 27(S1): 29.

[17]

Li Guofeng, Wu Nanjian. A low power flexible PGA for software defined radio systems. J. Semicond., 2012, 33(5): 055006. doi: 10.1088/1674-4926/33/5/055006

[18]

Zhao Gang, Hou Ligang, Luo Rengui, Liu Yuan, Wu Wuchen. Design and Optimization of Low-Power Processor for Wireless Sensor Network. J. Semicond., 2006, 27(S1): 370.

[19]

Chen Shuai, Li Hao, Shi Xiaobing, Yang Liqiong, Yang Zongren, Zhong Shiqiang, Huang Lingyi. A low-power high-swing voltage-mode transmitter. J. Semicond., 2012, 33(4): 045003. doi: 10.1088/1674-4926/33/4/045003

[20]

Yan Na, Tan Xi, Zhao Dixian, Min Hao. An Ultra-Low-Power Embedded EEPROM for Passive RFID Tags. J. Semicond., 2006, 27(6): 994.

Search

Advanced Search >>

GET CITATION

Tong X Y, Zhu Z M, Yang Y T. An offset cancellation technique in a switched-capacitor comparator for SAR ADCs[J]. J. Semicond., 2012, 33(1): 015011. doi: 10.1088/1674-4926/33/1/015011.

Export: BibTex EndNote

Article Metrics

Article views: 1855 Times PDF downloads: 8539 Times Cited by: 0 Times

History

Manuscript received: 20 August 2015 Manuscript revised: 08 October 2011 Online: Published: 01 January 2012

Email This Article

User name:
Email:*请输入正确邮箱
Code:*验证码错误