J. Semicond. > Volume 33 > Issue 11 > Article Number: 115004

Pulse swallowing frequency divider with low power and compact structure

Gao Haijun , Sun Lingling , Cai Chaobo and Zhan Haiting

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Abstract: A pulse swallowing frequency divider with low power and compact structure is presented. One of the DFFs in the divided by 2/3 prescaler is controlled by the modulus control signal, and automatically powered off when it has no contribution to the operation of the prescaler. The DFFs in the program counter and the swallow counter are shared to compose a compact structure, which reduces the power consumption further. The proposed multi-modulus frequency divider was implemented in a standard 65 nm CMOS process with an area of 28 × 22 μm2. The power consumption of the divider is 0.6 mW under 1.2 V supply voltage when operating at 988 MHz.

Key words: frequency dividerlow powerprescalermulti-modulus

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Gao H J, Sun L L, Cai C B, Zhan H T. Pulse swallowing frequency divider with low power and compact structure[J]. J. Semicond., 2012, 33(11): 115004. doi: 10.1088/1674-4926/33/11/115004.

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History

Manuscript received: 20 August 2015 Manuscript revised: 17 May 2012 Online: Published: 01 November 2012

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