J. Semicond. > Volume 33 > Issue 5 > Article Number: 055006

A low power flexible PGA for software defined radio systems

Li Guofeng and Wu Nanjian

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Abstract: This paper proposes a new low power structure to improve the trade-off between the bandwidth and the power consumption of a programmable gain amplifier (PGA). The PGA consists of three-stage amplifiers, which includes a variable gain amplifier and DC offset cancellation circuits. The cutoff frequency of the DC offset cancellation circuits can be changed from 4 to 80 kHz. The chip was fabricated in 0.13 μ m CMOS technology. Measurement results showed that the gain of the PGA can be programmed from -5 to 60 dB. At the gain setting of 60 dB, the bandwidth can be tuned from 1 to 10 MHz, while the power consumption can be programmed from 850 μA to 3.2 mA at a supply voltage of 1.2 V. Its in-band OIP3 result is at 14 dBm.

Key words: low powerDC offsetprogrammable gain amplifiersoftware defined radio

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Li G F, Wu N J. A low power flexible PGA for software defined radio systems[J]. J. Semicond., 2012, 33(5): 055006. doi: 10.1088/1674-4926/33/5/055006.

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History

Manuscript received: 20 August 2015 Manuscript revised: 24 November 2011 Online: Published: 01 May 2012

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