J. Semicond. > Volume 33 > Issue 8 > Article Number: 084004

A PNPN tunnel field-effect transistor with high-k gate and low-k fringe dielectrics

Cui Ning , Liang Renrong , Wang Jing , Zhou Wei and Xu Jun

+ Author Affiliations + Find other works by these authors


Abstract: A PNPN tunnel field effect transistor (TFET) with a high-k gate dielectric and a low-k fringe dielectric is introduced. The effects of the gate and fringe electric fields on the TFET's performance were investigated through two-dimensional simulations. The results showed that a high gate dielectric constant is preferable for enhancing the gate control over the channel, while a low fringe dielectric constant is useful to increase the band-to-band tunneling probability. The TFET device with the proposed structure has good switching characteristics, enhanced on-state current, and high process tolerance. It is suitable for low-power applications and could become a potential substitute in next-generation complementary metal-oxide-semiconductor technology.

Key words: TFET


Shiromani Balmukund Rahi, Bahniman Ghosh, Pranav Asthana. A simulation-based proposed high-k heterostructure AlGaAs/Si junctionless n-type tunnel FET. J. Semicond., 2014, 35(11): 114005. doi: 10.1088/1674-4926/35/11/114005


Shiromani Balmukund Rahi, Bahniman Ghosh, Bhupesh Bishnoi. Temperature effect on hetero structure junctionless tunnel FET. J. Semicond., 2015, 36(3): 034002. doi: 10.1088/1674-4926/36/3/034002


T. S. Arun Samuel, N. B. Balamurugan. Analytical modeling and simulation of germanium single gate silicon on insulator TFET. J. Semicond., 2014, 35(3): 034002. doi: 10.1088/1674-4926/35/3/034002


Shashi Bala, Mamta Khosla. Design and simulation of nanoscale double-gate TFET/tunnel CNTFET. J. Semicond., 2018, 39(4): 044001. doi: 10.1088/1674-4926/39/4/044001


S.K. Vishvakarma, Ankur Beohar, Vikas Vijayvargiya, Priyal Trivedi. Analysis of DC and analog/RF performance on Cyl-GAA-TFET using distinct device geometry. J. Semicond., 2017, 38(7): 074003. doi: 10.1088/1674-4926/38/7/074003


Advanced Search >>


Cui N, Liang R R, Wang J, Zhou W, Xu J. A PNPN tunnel field-effect transistor with high-k gate and low-k fringe dielectrics[J]. J. Semicond., 2012, 33(8): 084004. doi: 10.1088/1674-4926/33/8/084004.

Export: BibTex EndNote

Article Metrics

Article views: 2290 Times PDF downloads: 2689 Times Cited by: 0 Times


Manuscript received: 20 August 2015 Manuscript revised: 12 March 2012 Online: Published: 01 August 2012

Email This Article

User name: