J. Semicond. > Volume 34 > Issue 1 > Article Number: 015003

A wideband current-commutating passive mixer for multi-standard receivers in a 0.18 μm CMOS

Kuan Bao , Xiangning Fan , , Wei Li and Zhigong Wang

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Abstract: This paper reports a wideband passive mixer for direct conversion multi-standard receivers. A brief comparison between current-commutating passive mixers and active mixers is presented. The effect of source and load impedance on the linearity of a mixer is analyzed. Specially, the impact of the input impedance of the transimpedance amplifier (TIA), which acts as the load impedance of a mixer, is investigated in detail. The analysis is verified by a passive mixer implemented with 0.18 μm CMOS technology. The circuit is inductorless and can operate over a broad frequency range. On wafer measurements show that, with radio frequency (RF) ranges from 700 MHz to 2.3 GHz, the mixer achieves 21 dB of conversion voltage gain with a-1 dB intermediate frequency (IF) bandwidth of 10 MHz. The measured ⅡP3 is 9 dBm and the measured double-sideband noise figure (NF) is 10.6 dB at 10 MHz output. The chip occupies an area of 0.19 mm2 and drains a current of 5.5 mA from a 1.8 V supply.

Key words: CMOScurrent-commutating passive mixerlinearitysource and load impedancemulti-standard receiverwideband

Abstract: This paper reports a wideband passive mixer for direct conversion multi-standard receivers. A brief comparison between current-commutating passive mixers and active mixers is presented. The effect of source and load impedance on the linearity of a mixer is analyzed. Specially, the impact of the input impedance of the transimpedance amplifier (TIA), which acts as the load impedance of a mixer, is investigated in detail. The analysis is verified by a passive mixer implemented with 0.18 μm CMOS technology. The circuit is inductorless and can operate over a broad frequency range. On wafer measurements show that, with radio frequency (RF) ranges from 700 MHz to 2.3 GHz, the mixer achieves 21 dB of conversion voltage gain with a-1 dB intermediate frequency (IF) bandwidth of 10 MHz. The measured ⅡP3 is 9 dBm and the measured double-sideband noise figure (NF) is 10.6 dB at 10 MHz output. The chip occupies an area of 0.19 mm2 and drains a current of 5.5 mA from a 1.8 V supply.

Key words: CMOScurrent-commutating passive mixerlinearitysource and load impedancemulti-standard receiverwideband



References:

[1]

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Bao Kuan, Fan Xiangning, Li Wei. A wideband LNA employing gate-inductive-peaking and noise-canceling techniques in 0.18μm CMOS[J]. Journal of Semiconductors, 2012, 33(1): 015003. doi: 10.1088/1674-4926/33/1/015003

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Zhou S, Chang M C F. A CMOS passive mixer with low flicker noise for low-power direct-conversion receivers[J]. IEEE J Solid-State Circuits, 2005, 40(5): 1084. doi: 10.1109/JSSC.2005.845981

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Mirzaei , Darabi H, Yazdi A. A 65 nm CMOS quad-band SAW-less receiver SoC for GSM/GPRS/EDGE Ahmad[J]. IEEE J Solid-State Circuits, 2011, 46(4): 950. doi: 10.1109/JSSC.2011.2109570

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Wang Riyan, Huang Jiwei, Li Zhengping. A 1.2 V CMOS front-end for LTE direct conversion SAW-less receiver[J]. Journal of Semiconductors, 2012, 33(3): 035005. doi: 10.1088/1674-4926/33/3/035005

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Hao Shilei, Mei Niansong, Huang Yumei. A 5 GHz 7.2 dB NF low power direct conversion receiver front-end with balun LNA[J]. Journal of Semiconductors, 2011, 32(12): 125006. doi: 10.1088/1674-4926/32/12/125006

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Kim T W, Kim B. A 13-dB ⅡP3 improved low-power CMOS RF programmable gain amplifier using differential circuit transconductance linearization for various terrestrial mobile D-TV applications[J]. IEEE J Solid-State Circuits, 2006, 41(4): 945. doi: 10.1109/JSSC.2006.870744

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Poobuaphen N, Chen W H, Boos Z. A 1.5 V, 0.7-2.5 GHz CMOS quadrature demodulator for multiband direct-conversion receiver[J]. IEEE J Solid-State Circuits, 2007, 42(8): 1669. doi: 10.1109/JSSC.2007.900294

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Bagheri R, Mirzaei A, Chehrazi S. An 800 MHz-6 GHz software-defined wireless receiver in 90-nm CMOS[J]. IEEE J Solid-State Circuits, 2006, 41(12): 2860. doi: 10.1109/JSSC.2006.884835

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Elahi I, Muhammad K. ⅡP2 calibration by injecting DC offset at the mixer in a wireless receiver[J]. IEEE Trans Circuits Syst I, Reg Papers, 2007, 54(12): 1135.

[19]

Manstretta D, Brandolini M, Svelto F. Second-order intermodulation mechanisms in CMOS down converters[J]. IEEE J Solid-State Circuits, 2003, 38(3): 394. doi: 10.1109/JSSC.2002.808310

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Brandolini M, Rossi P, Sanzogni D. A CMOS direct down-converter with +78 dBm minimum ⅡP2 for 3G cell-phones[J]. IEEE International Solid-State Circuits Conference, 2005.

[21]

Kim N, Aparin V, Larson L E. A resistively degenerated wideband CMOS passive mixer with low noise figure and high ⅡP2[J]. IEEE Trans Microw Theory Tech, 2010, 58(4): 820. doi: 10.1109/TMTT.2010.2042644

[22]

Khatri H, Gudem P S, Larson L E. Distortion in current commutating passive CMOS down conversion mixers[J]. IEEE Trans Microw Theory Tech, 2009, 57(11): 2671. doi: 10.1109/TMTT.2009.2031930

[23]

Le V H, Nguyen H N, Lee I Y. A passive mixer for a wideband TV tuner[J]. IEEE Trans Circuits Syst Ⅱ, 2011, 58(7): 398. doi: 10.1109/TCSII.2011.2158262

[1]

Brandolini M, Rossi P, Manstretta D. Toward multistandard mobile terminals——fully integrated receivers requirements and architectures[J]. IEEE Trans Microw Theory Tech, 2005, 53(3): 1026. doi: 10.1109/TMTT.2005.843505

[2]

Giannini V, Nuzzo P, Soens C. A 2 mm2 0.1-5 GHz software-defined radio receiver in 45 nm digital CMOS[J]. IEEE J Solid-State Circuits, 2009, 44(12): 3486. doi: 10.1109/JSSC.2009.2032585

[3]

Bao Kuan, Fan Xiangning, Li Wei. A wideband LNA employing gate-inductive-peaking and noise-canceling techniques in 0.18μm CMOS[J]. Journal of Semiconductors, 2012, 33(1): 015003. doi: 10.1088/1674-4926/33/1/015003

[4]

Abidi . The path to SDR receiver[J]. IEEE J Solid-State Circuits, 2007, 42(5): 954. doi: 10.1109/JSSC.2007.894307

[5]

Lee T H. The design of CMOS radio-frequency integrated circuits[J]. Cambridge, UK:Cambridge University Press, 2004.

[6]

Zhou S, Chang M C F. A CMOS passive mixer with low flicker noise for low-power direct-conversion receivers[J]. IEEE J Solid-State Circuits, 2005, 40(5): 1084. doi: 10.1109/JSSC.2005.845981

[7]

Redman-White W, Leenaerts D M W. 1/f noise in passive CMOS mixers for low and zero IF integrated receivers[J]. IEEE Eur Solid-State Circuits Conf, 2001: 41.

[8]

Darabi H, Abid A A. Noise in RF-CMOS mixers:a simple physical model[J]. IEEE J Solid-State Circuits, 2000, 35(1): 15. doi: 10.1109/4.818916

[9]

Terrovitis M T, Meyer R G. Intermodulation distortion in current-commutating CMOS mixers[J]. IEEE J Solid-State Circuits, 2000, 35(10): 1461. doi: 10.1109/4.871323

[10]

Mirzaei , Darabi H, Yazdi A. A 65 nm CMOS quad-band SAW-less receiver SoC for GSM/GPRS/EDGE Ahmad[J]. IEEE J Solid-State Circuits, 2011, 46(4): 950. doi: 10.1109/JSSC.2011.2109570

[11]

Wang Riyan, Huang Jiwei, Li Zhengping. A 1.2 V CMOS front-end for LTE direct conversion SAW-less receiver[J]. Journal of Semiconductors, 2012, 33(3): 035005. doi: 10.1088/1674-4926/33/3/035005

[12]

Hao Shilei, Mei Niansong, Huang Yumei. A 5 GHz 7.2 dB NF low power direct conversion receiver front-end with balun LNA[J]. Journal of Semiconductors, 2011, 32(12): 125006. doi: 10.1088/1674-4926/32/12/125006

[13]

Kim T W, Kim B. A 13-dB ⅡP3 improved low-power CMOS RF programmable gain amplifier using differential circuit transconductance linearization for various terrestrial mobile D-TV applications[J]. IEEE J Solid-State Circuits, 2006, 41(4): 945. doi: 10.1109/JSSC.2006.870744

[14]

Kim T W, Kim B, Lee K. Highly linear receiver front-end adopting MOSFET transconductance-linearization by multiple gated transistors[J]. IEEE J Solid-State Circuits, 2004, 41(4): 223.

[15]

Poobuaphen N, Chen W H, Boos Z. A 1.5 V, 0.7-2.5 GHz CMOS quadrature demodulator for multiband direct-conversion receiver[J]. IEEE J Solid-State Circuits, 2007, 42(8): 1669. doi: 10.1109/JSSC.2007.900294

[16]

Ingels M, Giannini V, Borremans J. A 5 mm2 40 nm LP CMOS transceiver for a software-defined radio platform[J]. IEEE J Solid-State Circuits, 2010, 45(12): 2794. doi: 10.1109/JSSC.2010.2075210

[17]

Bagheri R, Mirzaei A, Chehrazi S. An 800 MHz-6 GHz software-defined wireless receiver in 90-nm CMOS[J]. IEEE J Solid-State Circuits, 2006, 41(12): 2860. doi: 10.1109/JSSC.2006.884835

[18]

Elahi I, Muhammad K. ⅡP2 calibration by injecting DC offset at the mixer in a wireless receiver[J]. IEEE Trans Circuits Syst I, Reg Papers, 2007, 54(12): 1135.

[19]

Manstretta D, Brandolini M, Svelto F. Second-order intermodulation mechanisms in CMOS down converters[J]. IEEE J Solid-State Circuits, 2003, 38(3): 394. doi: 10.1109/JSSC.2002.808310

[20]

Brandolini M, Rossi P, Sanzogni D. A CMOS direct down-converter with +78 dBm minimum ⅡP2 for 3G cell-phones[J]. IEEE International Solid-State Circuits Conference, 2005.

[21]

Kim N, Aparin V, Larson L E. A resistively degenerated wideband CMOS passive mixer with low noise figure and high ⅡP2[J]. IEEE Trans Microw Theory Tech, 2010, 58(4): 820. doi: 10.1109/TMTT.2010.2042644

[22]

Khatri H, Gudem P S, Larson L E. Distortion in current commutating passive CMOS down conversion mixers[J]. IEEE Trans Microw Theory Tech, 2009, 57(11): 2671. doi: 10.1109/TMTT.2009.2031930

[23]

Le V H, Nguyen H N, Lee I Y. A passive mixer for a wideband TV tuner[J]. IEEE Trans Circuits Syst Ⅱ, 2011, 58(7): 398. doi: 10.1109/TCSII.2011.2158262

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K Bao, X N Fan, W Li, Z G Wang. A wideband current-commutating passive mixer for multi-standard receivers in a 0.18 μm CMOS[J]. J. Semicond., 2013, 34(1): 015003. doi: 10.1088/1674-4926/34/1/015003.

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History

Manuscript received: 19 June 2012 Manuscript revised: 25 July 2012 Online: Published: 01 January 2013

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