J. Semicond. > Volume 34 > Issue 10 > Article Number: 105008

Novel bandgap-based under-voltage-lockout methods with high reliability

Yongrui Zhao 1, , and Xinquan Lai 2,

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Abstract: Highly reliable bandgap-based under-voltage-lockout (UVLO) methods are presented in this paper. The proposed under-voltage state to signal conversion methods take full advantages of the high temperature stability characteristics and the enhancement low-voltage protection methods which protect the core circuit from error operation; moreover, a common-source stage amplifier method is introduced to expand the output voltage range. All of these methods are verified in a UVLO circuit fabricated with a 0.5 μm standard BCD process technology. The experimental result shows that the proposed bandgap method exhibits a good temperature coefficient of 20 ppm/℃, which ensures that the UVLO keeps a stable output until the under-voltage state changes. Moreover, at room temperature, the high threshold voltage VTH+ generated by the UVLO is 12.3 V with maximum drift voltage of ±80 mV, and the low threshold voltage VTH- is 9.5 V with maximum drift voltage of ±70 mV. Also, the low voltage protection method used in the circuit brings a high reliability when the supply voltage is very low.

Key words: UVLObandgap-comparatorhigh reliabilityhigh temperature stability

Abstract: Highly reliable bandgap-based under-voltage-lockout (UVLO) methods are presented in this paper. The proposed under-voltage state to signal conversion methods take full advantages of the high temperature stability characteristics and the enhancement low-voltage protection methods which protect the core circuit from error operation; moreover, a common-source stage amplifier method is introduced to expand the output voltage range. All of these methods are verified in a UVLO circuit fabricated with a 0.5 μm standard BCD process technology. The experimental result shows that the proposed bandgap method exhibits a good temperature coefficient of 20 ppm/℃, which ensures that the UVLO keeps a stable output until the under-voltage state changes. Moreover, at room temperature, the high threshold voltage VTH+ generated by the UVLO is 12.3 V with maximum drift voltage of ±80 mV, and the low threshold voltage VTH- is 9.5 V with maximum drift voltage of ±70 mV. Also, the low voltage protection method used in the circuit brings a high reliability when the supply voltage is very low.

Key words: UVLObandgap-comparatorhigh reliabilityhigh temperature stability



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Zhao Fanglan, Feng Quanyuan, Gong Kunlin. An undervoltage lockout of hysteretic threshold of zero temperature coefficients[J]. IEEE Asia-Pacific Microwave Conference Proceedings, 2005: 153.

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He H, Lai X, Xu W. High-speed gate driver with a simple structure for power MOSFET[J]. Journal of Xidian University, 2012, 39(2): 168.

[1]

Katiraei F, Iravani M R. Power management strategies for a microgrid with multiple distributed generation units[J]. IEEE Trans Power Syst, 2006, 21(4): 1821. doi: 10.1109/TPWRS.2006.879260

[2]

Kwak D K. Novel PFC AC-DC converter of high efficiency used in 2 kW fire electric installation[J]. IEICE Electron Express, 2007, 4(1): 1. doi: 10.1587/elex.4.1

[3]

Brohlin P L, Allen. Supply independent low quiescent current under voltage lockout circuit. US Patent, No. 6842321B2, 2005

[4]

Gariboldi R, Lacchiarella, Pulvirenti F. Circuit for generating a reference voltage and detecting an under voltage of a supply and corresponding method. US Patent, No. 5747978, 1998

[5]

Brokaw A P. A simple three-terminal IC bandgap reference[J]. IEEE J Solid-State Circuits, 1974, 9(6): 388. doi: 10.1109/JSSC.1974.1050532

[6]

Lai Xinquan, Hu Juncai, Jia Ligang. Design of hysteretic comparator with bandgap structure[J]. Proceedings of 5th International Conference on ASIC, 2003: 615.

[7]

Allen P E, Holberg D R. CMOS analog circuit design. 2nd ed[J]. Oxford:Oxford University, 2002.

[8]

Razavi B. Design of analog CMOS integrated circuits[J]. New York:McGraw-Hill, 2003.

[9]

Mohammad R H, Simon S A. A CMOS Under-voltage lockout circuit[J]. Proceedings of the World Congress on Engineering and Computer Science, San Francisco, USA, 2008: 157.

[10]

Nguyen T K, Kim C H, Ihm G J. CMOS low-noise amplifier design optimization techniques[J]. IEEE Trans Microw Theory Tech, 2004, 52(5): 1433. doi: 10.1109/TMTT.2004.827014

[11]

Halpin S M, Harley K A, Jones R A. Slope-permissive under-voltage load shed relay for delayed voltage recovery mitigation[J]. IEEE Trans Power Syst, 2008, 23(3): 1211. doi: 10.1109/TPWRS.2008.926409

[12]

Perry R T, Lewis S H, Brokaw A P. A 1.4 V supply CMOS fractional bandgap reference[J]. IEEE J Solid-State Circuits, 2007, 42(10): 2180. doi: 10.1109/JSSC.2007.905236

[13]

Leung N K, Mok P K T, Yat L C. A 2-V 23-μ A 5.3-ppm/℃ curvature-compensated CMOS bandgap voltage reference[J]. IEEE J Solid-State Circuits, 2003, 38(3): 561. doi: 10.1109/JSSC.2002.808328

[14]

Chavoshisani R, Hashemipour O. A high-speed current conveyor based current comparator[J]. Microelectron J, 2011, 42(1): 28. doi: 10.1016/j.mejo.2010.09.007

[15]

Lai X, Xu Z, Li Y. A CMOS piecewise curvature-compensated voltage reference[J]. Microelectron J, 2009, 40(1): 39. doi: 10.1016/j.mejo.2008.09.006

[16]

Zhang C, Yang Z, Zhang Z. A CMOS hysteresis undervoltage lockout with current source inverter structure[J]. IEEE 9th International Conference on ASIC (ASICON), 2011: 918.

[17]

Li F, Wang W, Hang Q. Design of a under voltage lock out circuit with bandgap structure[J]. Proceedings of the 12th International Symposium on Integrated Circuits, 2009: 224.

[18]

Zhou Qingsheng, Wu Xiaobo. Design of novel under voltage lock out circuit[J]. Microelectronics & Computer, 2006, 23(11): 199.

[19]

Zhao Fanglan, Feng Quanyuan, Gong Kunlin. An undervoltage lockout of hysteretic threshold of zero temperature coefficients[J]. IEEE Asia-Pacific Microwave Conference Proceedings, 2005: 153.

[20]

Zhao Y, Lai X, Ye Q. Timing circuit with preheating/ignition function in ballast ICs[J]. Journal of Convergence Information Technology, 2012, 7(8): 19. doi: 10.4156/jcit

[21]

He H, Lai X, Xu W. High-speed gate driver with a simple structure for power MOSFET[J]. Journal of Xidian University, 2012, 39(2): 168.

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Y R Zhao, X Q Lai. Novel bandgap-based under-voltage-lockout methods with high reliability[J]. J. Semicond., 2013, 34(10): 105008. doi: 10.1088/1674-4926/34/10/105008.

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Manuscript received: 07 May 2013 Manuscript revised: 03 July 2013 Online: Published: 01 October 2013

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