S Li, C B Zeng, J J Luo, Z S Han. The abnormal electrostatic discharge of a no-connect metal cover in a ceramic packaging device[J]. J. Semicond., 2013, 34(8): 084007. doi: 10.1088/1674-4926/34/8/084007.
Abstract: The human body model (HBM) stress of a no-connect metal cover is tested to obtain the characteristics of abnormal electrostatic discharge, including current waveforms and peak current under varied stress voltage and device failure voltage. A new discharge model called the "sparkover-induced model" is proposed based on the results. Then, failure mechanism analysis and model simulation are performed to prove that the transient peak current caused by a sparkover of low arc impedance will result in the devices' premature damage when the potential difference between the no-connect metal cover and the chip exceeds the threshold voltage of sparkover.
Key words: electrostatic discharge, human body model, no-connect metal cover, sparkover
Abstract: The human body model (HBM) stress of a no-connect metal cover is tested to obtain the characteristics of abnormal electrostatic discharge, including current waveforms and peak current under varied stress voltage and device failure voltage. A new discharge model called the "sparkover-induced model" is proposed based on the results. Then, failure mechanism analysis and model simulation are performed to prove that the transient peak current caused by a sparkover of low arc impedance will result in the devices' premature damage when the potential difference between the no-connect metal cover and the chip exceeds the threshold voltage of sparkover.
Key words:
electrostatic discharge, human body model, no-connect metal cover, sparkover
References:
[1] |
Fang R, Wang J, Huang L. The development of electronic packaging[J]. Science & Technology Association Forum, 2012(2): 84. |
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Inspection criteria for microelectronic packages and covers. JEDEC Solid State Technology Association, May 2011 |
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MIL-STD-883H. Departments and Agencies of the Department of Defense, February 2010 |
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ESDA/JEDEC joint standard for electrostatic discharge sensitivity testing-human body model (HBM)-component level. ESD Association & JEDEC Solid State Technology Association, November 2011 |
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Wen Y L, Ming D K. Abnormal ESD failure mechanism in high-pin-count BGA packaged ICs due to stressing nonconnected balls[J]. IEEE Trans Device Mater Reliab, 2004, 4(1): 24. doi: 10.1109/TDMR.2004.824362 |
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Kunz H, Duvvury C, Brodsky J. HBM stress of no-connect IC pins and subsequent arc-over events that lead to human-metal-discharge-like events into unstressed neighbor pins[J]. Electrical Overstress/Electrostatic Discharge Symposium, 2006. |
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Kaschani K T, Schimon M, Hofmann M. ESD damage due to HBM stressing of non-connected pins[J]. Electrical Overstress/Electrostatic Discharge Symposium, 2006. |
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ESD association technical report for the protection of electrostatic discharge susceptible items-human metal model (HMM). Electrostatic Discharge Association, 2009 |
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IEC 61000-4-2: electromagnetic compatibility(emc)-part 4-2: testing and measurement techniques-electrostatic discharge immunity test. IEC International Standard, 2008 |
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Field-induced charged-device model test method for electrostatic-discharge-withstand thresholds of microelectronic components. JEDEC Solid State Technology Association, December 2009 |
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ESD association standard for electrostatic discharge sensitivity testing-charged device model (CDM)-component level. Electrostatic Discharge Association, July 2009 |
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Muhonen K, Peachey N, Testin A. Human metal model (HMM) testing, challenges to using ESD guns[J]. Electrical Overstress/Electrostatic Discharge Symposium, 2009. |
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Karp J, Kireev V, Tsaggaris D. Effect of flip-chip package parameters on CDM discharge[J]. Electrical Overstress/Electrostatic Discharge Symposium, 2008. |
[1] |
Fang R, Wang J, Huang L. The development of electronic packaging[J]. Science & Technology Association Forum, 2012(2): 84. |
[2] |
Inspection criteria for microelectronic packages and covers. JEDEC Solid State Technology Association, May 2011 |
[3] |
MIL-STD-883H. Departments and Agencies of the Department of Defense, February 2010 |
[4] |
ESDA/JEDEC joint standard for electrostatic discharge sensitivity testing-human body model (HBM)-component level. ESD Association & JEDEC Solid State Technology Association, November 2011 |
[5] |
Wen Y L, Ming D K. Abnormal ESD failure mechanism in high-pin-count BGA packaged ICs due to stressing nonconnected balls[J]. IEEE Trans Device Mater Reliab, 2004, 4(1): 24. doi: 10.1109/TDMR.2004.824362 |
[6] |
Kunz H, Duvvury C, Brodsky J. HBM stress of no-connect IC pins and subsequent arc-over events that lead to human-metal-discharge-like events into unstressed neighbor pins[J]. Electrical Overstress/Electrostatic Discharge Symposium, 2006. |
[7] |
Kaschani K T, Schimon M, Hofmann M. ESD damage due to HBM stressing of non-connected pins[J]. Electrical Overstress/Electrostatic Discharge Symposium, 2006. |
[8] |
ESD association technical report for the protection of electrostatic discharge susceptible items-human metal model (HMM). Electrostatic Discharge Association, 2009 |
[9] |
IEC 61000-4-2: electromagnetic compatibility(emc)-part 4-2: testing and measurement techniques-electrostatic discharge immunity test. IEC International Standard, 2008 |
[10] |
Field-induced charged-device model test method for electrostatic-discharge-withstand thresholds of microelectronic components. JEDEC Solid State Technology Association, December 2009 |
[11] |
ESD association standard for electrostatic discharge sensitivity testing-charged device model (CDM)-component level. Electrostatic Discharge Association, July 2009 |
[12] |
Muhonen K, Peachey N, Testin A. Human metal model (HMM) testing, challenges to using ESD guns[J]. Electrical Overstress/Electrostatic Discharge Symposium, 2009. |
[13] |
Karp J, Kireev V, Tsaggaris D. Effect of flip-chip package parameters on CDM discharge[J]. Electrical Overstress/Electrostatic Discharge Symposium, 2008. |
S Li, C B Zeng, J J Luo, Z S Han. The abnormal electrostatic discharge of a no-connect metal cover in a ceramic packaging device[J]. J. Semicond., 2013, 34(8): 084007. doi: 10.1088/1674-4926/34/8/084007.
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Manuscript received: 07 January 2013 Manuscript revised: 22 March 2013 Online: Published: 01 August 2013
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