Superjunction technology is believed to reach the optimal specific on-resistance and breakdown voltage trade-off. It has become a mainstream technology in silicon high-voltage metal oxide semiconductor field effect transistor devices. Numerous efforts have been conducted to employ the same concept in silicon carbide devices. These works are summarized here.

Gallium nitride (GaN)-based high-electron mobility transistors (HEMTs) are widely used in high power and high frequency application fields, due to the outstanding physical and chemical properties of the GaN material. However, GaN HEMTs suffer from degradations and even failures during practical applications, making physical analyses of post-failure devices extremely significant for reliability improvements and further device optimizations. In this paper, common physical characterization techniques for post failure analyses are introduced, several failure mechanisms and corresponding failure phenomena are reviewed and summarized, and finally device optimization methods are discussed.

Polarization-resolved photodetectors, a significant branch of photodetection, can more effectively distinguish the target from the background by exploiting polarization-sensitive characteristics. However, due to the absence of intrinsic polarized absorption properties of many materials, there is still a great challenge to develop the high-performance polarization-resolved photodetectors. Here, we report a van der Waals heterojunction (vdWH) ReSe₂/WSe₂ photodetector, which performs a high responsivity of ~0.28 A/W and a high detectivity of 1.1 × 10¹² Jones under the illumination of 520 nm laser at room temperature. Remarkably, scanning photocurrent mapping (SPCM) measurements demonstrate the photoresponse of devices closely depend on the polarized angle of the incident light, indicating the effective polarized light detection. This work paves the way to develop high-performance polarization-resolved photodetectors based on two-dimensional (2D) materials.

The explosive growth of data and information has motivated various emerging non-von Neumann computational approaches in the More-than-Moore era. Photonics neuromorphic computing has attracted lots of attention due to the fascinating advantages such as high speed, wide bandwidth, and massive parallelism. Here, we offer a review on the optical neural computing in our research groups at the device and system levels. The photonics neuron and photonics synapse plasticity are presented. In addition, we introduce several optical neural computing architectures and algorithms including photonic spiking neural network, photonic convolutional neural network, photonic matrix computation, photonic reservoir computing, and photonic reinforcement learning. Finally, we summarize the major challenges faced by photonic neuromorphic computing, and propose promising solutions and perspectives.

A narrow linewidth light source is a prerequisite for high-performance coherent optical communication and sensing. Waveguide-based external cavity narrow linewidth semiconductor lasers (WEC-NLSLs) have become a competitive and attractive candidate for many coherent applications due to their small size, volume, low energy consumption, low cost and the ability to integrate with other optical components. In this paper, we present an overview of WEC-NLSLs from their required technologies to the state-of-the-art progress. Moreover, we highlight the common problems occurring to current WEC-NLSLs and show the possible approaches to resolving the issues. Finally, we present the possible development directions for the next phase and hope this review will be beneficial to the advancements of WEC-NLSLs.

We report a low-cost manufacturing approach for fabricating monolithic multi-wavelength sources for dense wavelength division multiplexing (DWDM) systems that offers high yield and eliminates crystal regrowth and selective area epitaxy steps that are essential in traditional fabrication methods. The source integrates an array of distributed feedback (DFB) lasers with a passive coupler and semiconductor optical amplifier (SOA). Ridge waveguide lasers with sampled Bragg side wall gratings have been integrated using quantum well intermixing to achieve a fully functional four-channel DWDM source with 0.8 nm wavelength spacing and residual errors < 0.13 nm. The output power from the SOA is > 10 mW per channel making the source suitable for use in passive optical networks (PONs). We have also investigated using multisection phase-shifted sampled gratings to both increase the effective grating coupling coefficient and precisely control the channel lasing wavelength spacing. An 8-channel DFB laser array with 100 GHz channel spacing was demonstrated using a sampled grating with two π-phase-shifted sections in each sampling period. The entire array was fabricated by only a single step of electron beam lithography.

A virtual gate model with surface traps at gate edge of drain side is modelled for AlGaN/GaN high electron mobility transistor (HEMT). The model confirms the utility of a field plate (FP) improves sheet carrier density and suppress current collapse. At the gate-edge of the drain side, the channel electron densities with the field plate are 2.1 × 10⁹, 4.68 × 10⁹, and 8.63 × 10⁹ cm^–3 for L_FP = 0.5, 1, and 1.5 μm is increased with respect to the length of the field plate, whereas without the field plate it shows much lower electron density value of 1.14 × 10⁹ cm^–3 in the device. The increase of drain current from 736 to 813 mA/mm with the increase in L_FP from 0 to 1.5 μm is observed for drain voltage at 40 V. Furthermore, the use of the field plate shows a great control over the electric field and trapped carrier density at the gate edge of the device. The model formulated in this paper correlated-well with the simulation result of AlGaN/GaN HEMT.

In this paper, we discuss low-temperature hopping-conductivity behavior in the insulating phase, in the absence of a magnetic field. We conduct a theoretical study of the crossover from hopping to activated transport in a GaAs two-dimensional hole system at low temperatures, finding that a crossover takes place from the Efros-Shklovskii variable-range hopping (VRH) regime to an activated regime in this system. This conductivity behavior in p-GaAs quantum wells is qualitatively consistent with the laws laid down in theories of localized electron interactions. Given sufficiently strong interactions, the holes in the localized states are able to hop collectively.

A side-channel attack (SCA)-resistant AES S-box implementation is proposed, which is an improvement from the power-aware hiding (PAH) S-box but with higher security and a smaller area. We use the composite field approach and apply the PAH method to the inversion in the nonlinear kernel and a masking method to the other parts. In addition, a delay-matched enable control technique is used to suppress glitches in the masked parts. The evaluation results show that its area is contracted to 63.3% of the full PAH S-box, and its power-delay product is much lower than that of the masking implementation. The leakage assessment using simulation power traces concludes that it has no detectable leakage under t-test and that it at least can thwart the moment-correlation analysis using 665 000 noiseless traces.

Magnetoresistive random access memories (MRAMs) have drawn the attention of radiation researchers due to their potential high radiation tolerance. In particular, spin-orbit torque MRAM (SOT-MRAM) has the best performance on endurance and access speed, which is considered to be one of the candidates to replace SRAM for space application. However, little attention has been given to the γ-ray irradiation effect on the SOT-MRAM device yet. Here, we report the Co-60 irradiation results for both SOT (spin-orbit torque) magnetic films and SOT-Hall devices with the same stacks. The properties of magnetic films are not affected by radiation even with an accumulated dose up to 300 krad (Si) while the magnetoelectronic properties of SOT-Hall devices exhibit a reversible change behavior during the radiation. We propose a non-equilibrium anomalous Hall effect model to understand the phenomenon. Achieved results and proposed analysis in this work can be used for the material and structure design of memory cell in radiation-hardened SOT-MRAM.

The photovoltaic (PV) market is currently dominated by silicon based solar cells. However technological diversification is essential to promote competition, which is the driving force for technological growth. Historically, the choice of PV materials has been limited to the three-dimensional (3D) compounds with a high crystal symmetry and direct band gap. However, to meet the strict demands for sustainable PV applications, material space has been expanded beyond 3D compounds. In this perspective we discuss the potential of low-dimensional materials (2D, 1D) for application in PVs. We present unique features of low-dimensional materials in context of their suitability in the solar cells. The band gap, absorption, carrier dynamics, mobility, defects, surface states and growth kinetics are discussed and compared to 3D counterparts, providing a comprehensive view of prospects of low-dimensional materials. Structural dimensionality leads to a highly anisotropic carrier transport, complex defect chemistry and peculiar growth dynamics. By providing fundamental insights into these challenges we aim to deepen the understanding of low-dimensional materials and expand the scope of their application. Finally, we discuss the current research status and development trend of solar cell devices made of low-dimensional materials.

This paper presents a 1.2 V high accuracy thermal sensor analog front-end circuit with 7 probes placed around the microprocessor chip. This analog front-end consists of a BGR (bandgap reference), a DEM (dynamic element matching) control, and probes. The BGR generates the voltages linear changed with temperature, which are followed by the data read out circuits. The superior accuracy of the BGR’s output voltage is a key factor for sensors fabricated via the FinFET digital process. Here, a 4-stage folded current bias structure is proposed, to increase DC accuracy and confer immunity against FinFET process variation due to limited device length and low current bias. At the same time, DEM is also adopted, so as to filter out current branch mismatches. Having been fabricated via a 12 nm FinFET CMOS process, 200 chips were tested. The measurement results demonstrate that these analog front-end circuits can work steadily below 1.2 V, and a less than 3.1% 3σ-accuracy level is achieved. Temperature stability is 0.088 mV/°C across a range from –40 to 130 °C.

The performance enhancement of conventional Si MOSFETs through device scaling is becoming increasingly difficult. The application of high mobility channel materials is one of the most promising solutions to overcome the bottleneck. The Ge and GeSn channels attract a lot of interest as the alternative channel materials, because of not only the high carrier mobility but also the superior compatibility with typical Si CMOS technology. In this paper, the recent progress of high mobility Ge and GeSn MOSFETs has been investigated, providing feasible approaches to improve the performance of Ge and GeSn devices for future CMOS technologies.

Herein, high-quality n-ZnO film layer on c-sapphire and well-crystallized tetragonal p-BiOCl nanoflakes on Cu foil are prepared, respectively. According to the absorption spectra, the bandgaps of n-ZnO and p-BiOCl are confirmed as ~3.3 and ~3.5 eV, respectively. Subsequently, a p-BiOCl/n-ZnO heterostructural photodetector is constructed after a facile mechanical bonding and post annealing process. At –5 V bias, the photocurrent of the device under 350 nm irradiation is ~800 times higher than that in dark, which indicates its strong UV light response characteristic. However, the on/off ratio of In–ZnO–In photodetector is ~20 and the Cu–BiOCl–Cu photodetector depicts very weak UV light response. The heterostructure device also shows a short decay time of 0.95 s, which is much shorter than those of the devices fabricated from pure ZnO thin film and BiOCl nanoflakes. The p-BiOCl/n-ZnO heterojunction photodetector provides a promising pathway to multifunctional UV photodetectors with fast response, high signal-to-noise ratio, and high selectivity.

In this paper, a 4H-SiC DMOSFET with a source-contacted dummy gate (DG-MOSFET) is proposed and analyzed through Sentaurus TCAD and PSIM simulations. The source-contacted MOS structure forms fewer depletion regions than the PN junction. Therefore, the overlapping region between the gate and the drain can be significantly reduced while limiting R_ON degradation. As a result, the DG-MOSFET offers an improved high-frequency figure of merit (HF-FOM) over the conventional DMOSFET (C-MOSFET) and central-implant MOSFET (CI-MOSFET). The HF-FOM (R_ON × Q_GD) of the DG-MOSFET was improved by 59.2% and 22.2% compared with those of the C-MOSFET and CI-MOSFET, respectively. In a double-pulse test, the DG-MOSFET could save total power losses of 53.4% and 5.51%, respectively. Moreover, in a power circuit simulation, the switching power loss was reduced by 61.9% and 12.7% in a buck converter and 61% and 9.6% in a boost converter.

A signal chain model of single-bit and multi-bit quanta image sensors (QISs) is established. Based on the proposed model, the photoresponse characteristics and signal error rates of QISs are investigated, and the effects of bit depth, quantum efficiency, dark current, and read noise on them are analyzed. When the signal error rates towards photons and photoelectrons counting are lower than 0.01, the high accuracy photon and photoelectron counting exposure ranges are determined. Furthermore, an optimization method of integration time to ensure that the QIS works in these high accuracy exposure ranges is presented. The trade-offs between pixel area, the mean value of incident photons, and integration time under different illuminance level are analyzed. For the 3-bit QIS with 0.16 e-/s dark current and 0.21 e- r.m.s. read noise, when the illuminance level and pixel area are 1 lux and 1.21 μm², or 10 000 lux and 0.21 μm², the recommended integration time is 8.8 to 30 ms, or 10 to 21.3 μs, respectively. The proposed method can guide the design and operation of single-bit and multi-bit QISs.

Integrated circuit (IC) industry has fully considered the fact that the Moore’s Law is slowing down or ending. Alternative solutions are highly and urgently desired to break the physical size limits in the More-than-Moore era. Integrated silicon photonics technology exhibits distinguished potential to achieve faster operation speed, less power dissipation, and lower cost in IC industry, because their COMS compatibility, fast response, and high monolithic integration capability. Particularly, compared with other on-chip resonators (e.g. microrings, 2D photonic crystal cavities) silicon-on-insulator (SOI)-based photonic crystal nanobeam cavity (PCNC) has emerged as a promising platform for on-chip integration, due to their attractive properties of ultra-high Q/V, ultra-compact footprints and convenient integration with silicon bus-waveguides. In this paper, we present a comprehensive review on recent progress of on-chip PCNC devices for lasing, modulation, switching/filting and label-free sensing, etc.

Since the invention of amorphous indium–gallium–zinc–oxide (IGZO) based thin-film transistors (TFTs) by Hideo Hosono in 2004, investigations on the topic of IGZO TFTs have been rapidly expanded thanks to their high electrical performance, large-area uniformity, and low processing temperature. This article reviews the recent progress and major trends in the field of IGZO-based TFTs. After a brief introduction of the history of IGZO and the main advantages of IGZO-based TFTs, an overview of IGZO materials and IGZO-based TFTs is given. In this part, IGZO material electron travelling orbitals and deposition methods are introduced, and the specific device structures and electrical performance are also presented. Afterwards, the recent advances of IGZO-based TFT applications are summarized, including flat panel display drivers, novel sensors, and emerging neuromorphic systems. In particular, the realization of flexible electronic systems is discussed. The last part of this review consists of the conclusions and gives an outlook over the field with a prediction for the future.

We demonstrate the key module of comparators in GaN ICs, based on resistor-transistor logic (RTL) on E-mode wafers in this work. The fundamental inverters in the comparator consist of a p-GaN gate HEMT and a 2DEG resistor as the load. The function of the RTL comparators is finally verified by a undervoltage lockout (UVLO) circuit. The compatibility of this circuit with the current p-GaN technology paves the way for integrating logic ICs together with the power devices.

The heterogeneous integration of III–V devices with Si-CMOS on a common Si platform has shown great promise in the new generations of electrical and optical systems for novel applications, such as HEMT or LED with integrated control circuitry. For heterogeneous integration, direct wafer bonding (DWB) techniques can overcome the materials and thermal mismatch issues by directly bonding dissimilar materials systems and device structures together. In addition, DWB can perform at wafer-level, which eases the requirements for integration alignment and increases the scalability for volume production. In this paper, a brief review of the different bonding technologies is discussed. After that, three main DWB techniques of single-, double- and multi-bonding are presented with the demonstrations of various heterogeneous integration applications. Meanwhile, the integration challenges, such as micro-defects, surface roughness and bonding yield are discussed in detail.

The gradient doping regions were employed in the emitter layer and the base layer of GaAs based laser power converters (LPCs). Silvaco TCAD was used to numerically simulate the linear gradient doping and exponential gradient doping structure, and analyze the transport process of photogenerated carriers. Energy band adjustment via gradient doping improved the separation and transport efficiency of photogenerated carriers and reduced the total recombination rate of GaAs LPCs. Compared with traditional structure of LPCs, the photoelectric conversion efficiency of LPCs with linear and exponential gradient doping structure were improved from 52.7% to 57.2% and 57.7%, respectively, under 808nm laser light at the power density of 1 W/cm².

In this paper, the dependencies of Young's modulus and attenuation decrement on samarium sulfide polycrystals (SmS) under various annealing temperatures are studied by the piezoelectric ultrasonic composite oscillator technique at a frequency of 100 kHz in the temperature range of 80–300 K. A decrease in Young's modulus with an increase of the annealing temperature due to the texturing of the material was revealed. At the same time, attenuation peaks were observed at temperatures about 90 and 125 K, presumably due to Niblett-Wilks and Bordoni relaxations.