Citation: |
Li Weinan, Xia Lingli, Zheng Yongzheng, Huang Yumei, Hong Zhiliang. A low-power monolithic CMOS transceiver for 802.11b wireless LANs[J]. Journal of Semiconductors, 2009, 30(1): 015007. doi: 10.1088/1674-4926/30/1/015007
****
Li W N, Xia L L, Zheng Y Z, Huang Y M, Hong Z L. A low-power monolithic CMOS transceiver for 802.11b wireless LANs[J]. J. Semicond., 2009, 30(1): 015007. doi: 10.1088/1674-4926/30/1/015007.
|
A low-power monolithic CMOS transceiver for 802.11b wireless LANs
DOI: 10.1088/1674-4926/30/1/015007
-
Abstract
A single-chip low-power transceiver IC operating in the 2.4 GHz ISM band is presented. Designed in 0.18 μm CMOS, the transceiver system employs direct-conversion architecture for both receiver and transmitter to realize a fully integrated wireless LAN product. A sigma-delta (ΣΔ) fractional-N frequency synthesizer provides on-chip quadrature local oscillator frequency. Measurement results show that the receiver achieves a maximum gain of 81 dB and a noise figure of 8.2 dB, the transmitter has maximum output power of -3.4 dBm and RMS EVM of 6.8%. Power dissipation of the transceiver is 74 mW in receiving mode and 81 mW in transmitting mode under supply voltage of 1.8 V, respectively, including 30 mW consumed by frequency synthesizer. Total chip area with pads is 2.7 mm × 4.2 mm. -
References
-
Proportional views