The dynamic avalanche effect is a critical factor influencing the performance and reliability of the field-stop insulated gate bipolar transistors (FS-IGBT). Unclamped inductive switching (UIS) is the primary method for testing the dynamic avalanche capability of FS-IGBTs. Numerous studies have demonstrated that factors such as device structure, avalanche-generating current filaments, and electrical parameters influence the dynamic avalanche effect of the FS-IGBT. However, few studies have focused on enhancing the avalanche reliability of the FS-IGBT by adjusting circuit parameters during operation. In this paper, the dynamic avalanche effect of the FS-IGBT under UIS conditions is comprehensively investigated through a series of comparative experiments with varying circuit parameters, including bus voltage V_DC, gate voltage V_G, gate resistance R_g, load inductance L, and temperature T_C. Furthermore, a method to enhance the dynamic avalanche reliability of the FS-IGBT under UIS by optimizing circuit parameters is proposed. In practical applications, reducing gate voltage, increasing load inductance, and lowering temperature can effectively improve the dynamic avalanche capability of the FS-IGBT.

Thermally chargeable supercapacitors (TCSCs) have unique advantages in the collection, conversion, and storage of thermal energy, contributing to the development of new strategies for thermal energy utilization. 2D MXene materials are predicted to be highly promising new thermoelectric materials. Here, we report a self-assembled flexible Ti₃C₂T_x MXene-based TCSC device, using prepared Ti₃C₂T_x MXene as the capacitor electrode and a NaClO₄/PEO gel as the electrolyte. We also explore the working mechanism of the TCSCs. The fabricated Ti₃C₂T_x-based TCSCs exhibit an excellent Seebeck coefficient of 11.8 mV∙K⁻¹ on average and maintain good cycling stability under various temperature differences. Demonstrations of multiple practical applications show that Ti₃C₂T_x MXene-based TCSC devices are excellent candidates for self-powered integrated electronic devices.

The event-based vision sensor (EVS), which can generate efficient spiking data streams by exclusively detecting motion, exemplifies neuromorphic vision methodologies. Generally, its inherent lack of texture features limits effectiveness in complex vision processing tasks, necessitating supplementary visual information. However, to date, no event-based hybrid vision solution has been developed that preserves the characteristics of complete spike data streams to support synchronous computation architectures based on spiking neural network (SNN). In this paper, we present a novel spike-based sensor with digitized pixels, which integrates the event detection structure with the pulse frequency modulation (PFM) circuit. This design enables the simultaneous output of spiking data that encodes both temporal changes and texture information. Fabricated in 180 nm process, the proposed sensor achieves a resolution of 128 × 128, a maximum event rate of 960 Meps, a grayscale framerate of 117.1 kfps, and a measured power consumption of 60.1 mW, which is suited for high-speed, low-latency, edge SNN-based vision computing systems.

The novel HfO₂-based ferroelectric field effect transistor (FeFET) is considered a promising candidate for next-generation nonvolatile memory (NVM). However, a series of reliability issues caused by the fatigue effect hinder its further development. Therefore, a comprehensive understanding of the fatigue mechanisms of the device and optimization strategies is essential for its application. The fundamental mechanism of the fatigue effect is attributed to charge trapping and trap generation based on the current studies, and the underlying causes, occurrence locations and specific impacts are analyzed in this review. In particular, the asymmetric trapping/detrapping of electrons and holes, as well as the relationship between the ferroelectric (FE) polarization and charge trapping, are given particular attention. After categorizing and summarizing the current progress, we propose a series of optimization strategies derived based on the fatigue mechanisms.

Graphene has garnered significant attention in photodetection due to its exceptional optical, electrical, mechanical, and thermal properties. However, the practical application of two-dimensional (2D) graphene in optoelectronic fields is limited by its weak light absorption (only 2.3%) and zero bandgap characteristics. Increasing light absorption is a critical scientific challenge for developing high-performance graphene-based photodetectors. Three-dimensional (3D) graphene comprises vertically grown stacked 2D-graphene layers and features a distinctive porous structure. Unlike 2D-graphene, 3D-graphene offers a larger specific surface area, improved electrochemical activity, and high chemical stability, making it a promising material for optoelectronic detection. Importantly, 3D-graphene has an optical microcavity structure that enhances light absorption through interaction with incoming light. This paper systematically reviews and analyzes the current research status and challenges of 3D-graphene-based photodetectors, aiming to explore feasible development paths for these devices and promote their industrial application.

AlGaN-based LEDs with peak wavelength below 240 nm (far-UVC) pose no significant harm to human health, thus highlighting their broader application potential. While, there is a significant Schottky barrier between the n-electrode and Al-rich n-AlGaN, adversely impeding electron injection and resulting in considerable heat generation. Here, we fabricate V-based electrodes of V/Al/Ti/Au on n-AlGaN with Al content over 80% and investigate the relationship between the metal diffusion and contact properties during the high-temperature annealing process. Experiments reveal that decreasing V thickness in the electrode promotes the diffusion of Al towards the surface of n-AlGaN, which facilitates the formation of V_N and thus the increase of local electron concentration, resulting in lower specific contact resistivity. Then, increasing the Al thickness inhibits the diffusion of Au to the n-AlGaN surface, suppressing the rise of Schottky barrier. Experimentally, an optimized n-electrode of V(10 nm)/Al(240 nm)/Ti(40 nm)/Au(50 nm) on n-Al_0.81Ga_0.19N is obtained, realizing an optimal specific contact resistivity of 7.30 × 10⁻⁴ Ω·cm². Based on the optimal n-electrode preparation scheme for Al-rich n-AlGaN, the work voltage of a far-UVC LED with peak wavelength of 233.5 nm is effectively reduced.

All-inorganic CsPbBr₃ perovskite quantum dots (QDs) have attracted extensive attention in photoelectric detection for their excellent photoelectric properties and stability. However, the CsPbBr₃ quantum dot film exhibits a high non-radiative recombination rate, and the mismatch in energy levels with the carbon electrode weakens hole extraction efficiency. These reduces the device's performance. To improve this, a semiconductor photodetector based on fluorine-doped tin oxide (FTO)/dense titanium dioxide (c-TiO₂)/mesoporous titanium dioxide (m-TiO₂)/CsPbBr₃ QDs/CsPbBr_xI_3–x (x = 2, 1.5, 1) QDs/C structure was studied. By adjusting the Br^– : I^– ratio, the synthesized CsPbBr_xI_3–x (x = 2, 1.5, 1) QDs showed an adjustable band gap width of 2.284−2.394 eV. And forming a type II band structure with CsPbBr₃ QDs, which reduced the valence band offset between the active layer and the carbon electrode, this promoted carrier extraction and reduced non-radiative recombination rate. Compared with the original device (the photosensitive layer is CsPbBr₃ QDs), the performance of the photodetector based on the CsPbBr₃ QDs/CsPbBr₂I QDs heterostructure is significantly improved, the responsivity (R) increased by 73%, the specific detectivity rate (D^*) increased from 6.98 × 10¹² to 3.19 × 10¹³ Jones, the on/off ratio reached 10⁶. This study provides a new idea for the development of semiconductor tandem detectors.

Accurate quantification of exercise interventions and changes in muscle function is essential for personalized health management. Electrical impedance myography (EIM) technology offers an innovative, noninvasive, painless, and easy−to−perform solution for muscle health monitoring. However, current EIM platforms face a number of limitations, including large device size, wired connections, and instability of the electrode–skin interface, which limit their applicability for monitoring muscle movement. In this study, a miniature wireless EIM platform with a user−friendly smartphone app is proposed and developed. The miniature, wireless, multi−frequency (20 kHz−1 MHz) EIM platform is equipped with flexible microneedle array electrodes (MAE). The advantages of MAEs over conventional electrodes were demonstrated by physical field modeling simulations and skin−electrode contact impedance comparison tests. The smartphone APP was developed to wirelessly operate the EIM platform, and to transmit and process real−time muscle impedance data. To validate its effectiveness, a seven−day adaptive fatigue training study was conducted, which demonstrated that the EIM platform was able to detect muscle adaptations and serve as a reliable indicator of fatigue. This study presents an innovative approach to applying EIM technology to muscle health monitoring and exercise testing, thereby advancing the development of personalized health management and athletic performance assessment.

Low power consumption, high responsivity, and self-powering are key objectives for photoelectrochemical ultraviolet detectors. In this research, In-doped α-Ga₂O₃ nanowire arrays were fabricated on FTO substrates through a hydrothermal approach, with subsequent thermal annealing. These arrays were then used as photoanodes to construct a UV photodetector. In doping reduced the bandgap of α-Ga₂O₃, enhancing its absorption of UV light. Consequently, the In-doped α-Ga₂O₃ nanowire arrays exhibited excellent light detection performance. When irradiated by 255 nm deep ultraviolet light, they obtained a responsivity of 38.85 mA/W. Moreover, the detector's response and recovery times are 13 and 8 ms respectively. The In-doped α-Ga₂O₃ nanowire arrays exhibit a responsivity that is about three-fold higher than the undoped one. Due to its superior responsivity, the In-doped device was used to develop a photoelectric imaging system. This study demonstrates that doping α-Ga₂O₃ nanowires with indium is a potent approach for optimizing their photoelectrochemical performance, which also has significant potential for optoelectronic applications.

A silicon-based Germanium (Ge) photodetector working for C and L bands is proposed in this paper. The device features a novel asymmetric PIN structure, which contributes to a more optimized electric field distribution in Ge and a shorter effective width of depleted region. Meanwhile, the optical structure is designed carefully to enhance responsivity for broadband. Under −7 V, where the weak avalanche process happens, the responsivity of our device is 1.49 and 1.16 A/W at 1550 and 1600 nm, with bandwidth of 47.1 and 44.5 GHz, respectively. These performances demonstrate the significant application potential of the device in optical communication systems.

This paper presents the design of a low-power multi-channel analog front-end (AFE) for bio-potential recording. By using time division multiplexing (TDM), a successive approximation register analog-to-digital converter (SAR ADC) is shared among all 20 channels. A charge-sharing multiplexer (MUX) is proposed to transmit the output signals from the respective channels to the ADC. By separately pre sampling the output of each channel, the sampling time of each channel is greatly extended and additional active buffers are avoided. The AFE is fabricated in a 65-nm CMOS process, and the whole system consumes 28.2 μW under 1 V supply. Each analog acquisition channel consumes 1.25 μW and occupies a chip area of 0.14 mm². Measurement results show that the AFE achieves an input referred noise of 1.8 μV∙rms in a 350 Hz bandwidth and a noise efficiency factor (NEF) of 4.1. The 12-bit SAR ADC achieves an ENOB of 9.8 bit operating at 25 kS/s. The AFE is experimented on real-world applications by measuring human ECG and a clear ECG waveform is captured.

This paper presents a 4-level pulse amplitude modulation (PAM-4) distributed feedback (DFB) laser driver. The driver adopts a digital slicing architecture to achieve high linearity by adjusting the weights of three thermometer-coded main paths. An efficient-biased output stage structure is proposed to reduce power consumption while avoiding the degradation of output node bandwidth typically induced by parasitic capacitance in high-current bias path. A two-tap linear and nonlinear feed-forward equalizer (FFE) is implemented in the digital domain to extend bandwidth limitations and compensate for the dynamic nonlinearity of the DFB laser. The nonlinear FFE is realized at the cost of lower power consumption and smaller area by utilizing the simultaneity of low-speed parallel data. The chip is fabricated in 28 nm CMOS process. Measurement results indicate that, with a laser bias current of 40 mA, a modulation current of 20 mApp, and an operating rate of 32 Gb/s PAM-4, the overall power consumption of the chip is 372 mW, corresponding to an energy efficiency of 11.6 pJ/b.

This paper describes a 2D/3D vision chip with integrated sensing and processing capabilities. The 2D/3D vision chip architecture includes a 2D/3D image sensor and a programmable visual processor. In this architecture, we design a novel on-chip processing flow with die-to-die image transmission and low-latency fixed-point image processing. The vision chip achieves real-time end-to-end processing of convolutional neural networks (CNNs) and conventional image processing algorithms. Furthermore, an end-to-end 2D/3D vision system is built to exhibit the capacity of the vision chip. The vision system achieves real-timing applications under 2D and 3D scenes, such as human face detection (processing delay 10.2 ms) and depth map reconstruction (processing delay 4.1 ms). The frame rate of image acquisition, image process, and result display is larger than 30 fps.

Robotic computing systems play an important role in enabling intelligent robotic tasks through intelligent algorithms and supporting hardware. In recent years, the evolution of robotic algorithms indicates a roadmap from traditional robotics to hierarchical and end-to-end models. This algorithmic advancement poses a critical challenge in achieving balanced system-wide performance. Therefore, algorithm-hardware co-design has emerged as the primary methodology, which analyzes algorithm behaviors on hardware to identify common computational properties. These properties can motivate algorithm optimization to reduce computational complexity and hardware innovation from architecture to circuit for high performance and high energy efficiency. We then reviewed recent works on robotic and embodied AI algorithms and computing hardware to demonstrate this algorithm-hardware co-design methodology. In the end, we discuss future research opportunities by answering two questions: (1) how to adapt the computing platforms to the rapid evolution of embodied AI algorithms, and (2) how to transform the potential of emerging hardware innovations into end-to-end inference improvements.

In this work, the incorporation of Tantalum (Ta) into p-type metal-oxide (SnO_x) semiconductor film is investigated to improve the electrical characteristics and suppress the fringe effect of thin film transistors (TFTs). The Ta-doped SnO_x (SnO_x:Ta) film is deposited by radio-frequency (RF) magnetron sputtering with a Sn:Ta (3at.%) target and thermally annealed at 270 °C for 30 mins. Here, we observe that the SnO_x:Ta film presents increased crystallinity, reduced defect density (3.25 × 10¹² cm⁻²eV⁻¹), and widened bandgap (1.98 eV), in comparison with the undoped SnO_x film. As a result, the SnO_x:Ta TFTs exhibit a lower off-state current (I_off), an improved on/off current ratio (2.17 × 10⁴), a remarkably decreased subthreshold swing (SS) by 41%, and enhanced device stability. Additionally, by introducing Ta dopants, the fringe effect as well as the impact of channel width-to-length ratio (W/L) on electrical performances of the p-type oxide TFTs can be effectively suppressed. These results shall contribute to further exploration and development of p-type SnO_x TFTs.

GaN diodes for high energy (64.8 MeV) proton detection were fabricated and investigated. A comparison of the performance of GaN diodes with different structures is presented, with a focus on sapphire and on GaN substrates, Schottky and pin diodes, and different active layer thicknesses. Pin diodes fabricated on a sapphire substrate are the best choice for a GaN proton detector working at 0 V bias. They are sensitive (minimum detectable proton beam <1 pA/cm²), linear as a function of proton current and fast (<1 s). High proton current sensitivity and high spatial resolution of GaN diodes can be exploited in the future for proton imaging of patients in proton therapy.

As a type of charge-balanced power device, the performance of super-junction MOSFETs (SJ-MOS) is significantly influenced by fluctuations in the fabrication process. To overcome the relatively narrow process window of conventional SJ-MOS, an optimized structure "vertical variable doping super-junction MOSFET (VVD-SJ)" is proposed. Based on the analysis using the charge superposition principle, it is observed that the VVD-SJ, in which the impurity concentration of the P-pillar gradually decreases while that of the N-pillar increases from top to bottom, improves the electric field distribution and mitigates charge imbalance (CIB). Experimental results demonstrate that the optimized 600 V VVD-SJ achieves a 35.90% expansion of the process window.

In this work, we design and fabricate AlGaN/GaN-based Schottky barrier diodes (SBDs) on a silicon substrate with a trenched n⁺-GaN cap layer. With the developed physical models, we find that the n⁺-GaN cap layer provides more electrons into the AlGaN/GaN channel, which is further confirmed experimentally. When compared with the reference device, this increases the two-dimensional electron gas (2DEG) density by two times and leads to a reduced specific ON-resistance （R_on,sp）of ~2.4 mΩ·cm². We also adopt the trenched n⁺-GaN structure such that partial of the n⁺-GaN is removed by using dry etching process to eliminate the surface electrical conduction when the device is set in the off-state. To suppress the surface defects that are caused by the dry etching process, we also deposit Si₃N₄ layer prior to the deposition of field plate (FP), and we obtain a reduced leakage current of ~8 × 10⁻⁵ A·cm⁻² and breakdown voltage (BV) of 876 V. The Baliga’s figure of merit (BFOM) for the proposed structure is increased to ~319 MW·cm⁻². Our investigations also find that the pre-deposited Si₃N₄ layer helps suppress the electron capture and transport processes, which enables the reduced dynamic R_on,sp.

The unique structure and exceptional properties of two-dimensional (2D) materials offer significant potential for transformative advancements in semiconductor industry. Similar to the reliance on wafer-scale single-crystal ingots for silicon-based chips, practical applications of 2D materials at the chip level needs large-scale, high-quality production of 2D single crystals. Over the past two decades, the size of 2D single-crystals has been improved to wafer or meter scale, where the nucleation control during the growth process is particularly important. Therefore, it is essential to conduct a comprehensive review of nucleation control in 2D materials to gain fundamental insights into the growth of 2D single-crystal materials. This review mainly focuses on two aspects: controlling nucleation density to enable the growth from a single nucleus, and controlling nucleation position to achieve the unidirectionally aligned islands and subsequent seamless stitching. Finally, we provide an overview and forecast of the strategic pathways for emerging 2D materials.

Doping plays a pivotal role in enhancing the performance of organic semiconductors (OSCs) for advanced optoelectronic and thermoelectric applications. In this study, we systematically investigated the doping performance and applicability of the ionic dopant 4-isopropyl-4′-methyldiphenyliodonium tetrakis(penta-fluorophenyl-borate) (DPI-TPFB) as a p-dopant for OSCs. Using the p-type OSC PBBT-2T as a model system, we demonstrated that DPI-TPFB shows significant doping effect, as confirmed by ESR spectra, UV−vis−NIR absorption, and work function analysis, and enhances the electronic conductivity of PBBT-2T films by over four orders of magnitude. Furthermore, DPI-TPFB exhibited broad doping applicability, effectively doping various p-type OSCs and even imparting p-type characteristics to the n-type OSC N2200, transforming its intrinsic n-type behavior into p-type. The application of DPI-TPFB-doped PBBT-2T films in organic thermoelectric devices (OTEs) was also explored, achieving a power factor of approximately 10 μW∙m⁻¹∙K⁻². These findings highlight the potential of DPI-TPFB as a versatile and efficient dopant for integration into organic optoelectronic and thermoelectric devices.

In DSP-based SerDes application, it is essential for AFE to implement a pre-ADC equalization to provide a better signal for ADC and DSP. To meet the various equalization requirements of different channel and transmitter configurations, this paper presents a 112 Gbps DSP-Based PAM4 SerDes receiver with a wide band equalization tuning AFE. The AFE is realized by implementing source degeneration transconductance, feedforward high-pass branch and inductive feedback peaking TIA. The AFE offers a flexible equalization gain tuning of up to 17.5 dB at Nyquist frequency without affecting the DC gain. With the proposed AFE, the receiver demonstrates eye opening after digital FIR equalization and achieves 6 × 10⁻⁹ BER with a 29.6 dB insertion loss channel.

This paper introduces a high-precision bandgap reference (BGR) designed for battery management systems (BMS), featuring an ultra-low temperature coefficient (TC) and line sensitivity (LS). The BGR employs a current-mode scheme with chopped op-amps and internal clock generators to eliminate op-amp offset. A low dropout regulator (LDO) and a pre-regulator enhance output driving and LS, respectively. Curvature compensation enhances the TC by addressing higher-order nonlinearity. These approaches, effective near room temperature, employs trimming at both 20 and 60 °C. When combined with fixed curvature correction currents, it achieves an ultra-low TC for each chip. Implemented in a CMOS 180 nm process, the BGR occupies 0.548 mm² and operates at 2.5 V with 84 μA current draw from a 5 V supply. An average TC of 2.69 ppm/°C with two-point trimming and 0.81 ppm/°C with multi-point trimming are achieved over the temperature range of −40 to 125 °C. It accommodates a load current of 1 mA and an LS of 42 ppm/V, making it suitable for precise BMS applications.

In the applications such as food production, the environmental temperature should be measured continuously during the entire process, which requires an ultra-low-power temperature sensor for long-termly monitoring. Conventional temperature sensors trade the measurement accuracy with power consumption. In this work, we present a battery-free wireless temperature sensing chip for long-termly monitoring during food production. A calibrated oscillator-based CMOS temperature sensor is proposed instead of the ADC-based power-hungry circuits in conventional works. In addition, the sensor chip can harvest the power transferred by a remote reader to eliminate the use of battery. Meanwhile, the system conducts wireless bidirectional communication between the sensor chip and reader. In this way, the temperature sensor can realize both a high precision and battery-free operation. The temperature sensing chip is fabricated in 55 nm CMOS process, and the reader chip is implemented in 65 nm CMOS technology. Experimental results show that the temperature measurement error achieves ±1.6 °C from 25 to 50 °C, with battery-free readout by a remote reader.

A two-way K/Ka-band series-Doherty PA (SDPA) with a distributed impedance inverting network (IIN) for millimeter wave applications is presented in this article. The proposed distributed IIN contributes to achieve wideband linear and power back-off (PBO) efficiency enhancement. Implemented in 65 nm bulk CMOS technology, this work realizes a measured 3 dB bandwidth of 15.5 GHz with 21.2 dB peak small-signal gain at 34.2 GHz. Under 1-V power supply, it achieves OP_1dB over 13.4 dBm and P_sat over 16 dBm between 21 to 30 GHz. The measured maximum P_sat, OP_1dB, peak/OP_1dB/6dB_PBO PAE results are 17.5, 14.7 dBm, and 28.2%/23.2%/13.2%. Without digital pre-distortion (DPD) and equalization, EVMs are lower than −25.2 dB for 200 MHz 64-QAM signals. Besides, this work achieves −33.35, −23.52, and −20 dB EVMs for 100 MHz 256-QAM, 600 MHz 64-QAM and 2 GHz 16-QAM signals at 27 GHz without DPD and equalization.

As traditional von Neumann architectures face limitations in handling the demands of big data and complex computational tasks, neuromorphic computing has emerged as a promising alternative, inspired by the human brain's neural networks. Volatile memristors, particularly Mott and diffusive memristors, have garnered significant attention for their ability to emulate neuronal dynamics, such as spiking and firing patterns, enabling the development of reconfigurable and adaptive computing systems. Recent advancements include the implementation of leaky integrate-and-fire neurons, Hodgkin−Huxley neurons, optoelectronic neurons, and time-surface neurons, all utilizing volatile memristors to achieve efficient, low-power, and highly integrated neuromorphic systems. This paper reviews the latest progress in volatile memristor-based artificial neurons, highlighting their potential for energy-efficient computing and integration with artificial synapses. We conclude by addressing challenges such as improving memristor reliability and exploring new architectures to advance memristor-based neuromorphic computing.

In order to solve the problems of low overload power in MEMS cantilever beams and low sensitivity in traditional MEMS fixed beams, a novel MEMS microwave power detection chip based on the dual-guided fixed beam is designed. A gap between guiding beams and measuring electrodes is designed to accelerate the release of the sacrificial layer, effectively enhancing chip performance. A load sensing model for the MEMS fixed beam microwave power detection chip is proposed, and the mechanical characteristics are analyzed based on the uniform load applied. The overload power and sensitivity are investigated using the load sensing model, and experimental results are compared with theoretical results. The detection chip exhibits excellent microwave characteristic in the 9−11 GHz frequency band, with a return loss less than −10 dB. At a signal frequency of 10 GHz, the theoretical sensitivity is 13.8 fF/W, closely matching the measured value of 14.3 fF/W, with a relative error of only 3.5%. These results demonstrate that the proposed load sensing model provides significant theoretical support for the design and performance optimization of MEMS microwave power detection chips.

In the implementation of quantum key distribution, Security certification is a prerequisite for social deployment. Transmitters in decoy-BB84 systems typically employ gain-switched semiconductor lasers (GSSLs) to generate optical pulses for encoding quantum information. However, the working state of the laser may violate the assumption of pulse independence. Here, we explored the dependence of intensity fluctuation and high-order correlation distribution of optical pulses on driving currents at 2.5 GHz. We found the intensity correlation distribution had a significant dependence on the driving currents, which would affect the final key rate. By utilizing rate equations in our simulation, we confirmed the fluctuation and correlation originated from the instability of gain-switched laser driven at a GHz-repetitive frequency. Finally, we evaluated the impact of intensity fluctuation on the secure key rate. This work will provide valuable insights for assessing whether the transmitter is operating at optimal state in practice.

In this paper, a high-gain inductorless LNA (low-noise amplifier) compatible with multiple communication protocols from 0.1 to 5.1 GHz is proposed. A composite resistor−capacitor feedback structure is employed to achieve a wide bandwidth matching range and good gain flatness. A second stage with a Darlington pair is used to increase the overall gain of the amplifier, while the gain of the first stage is reduced to reduce the overall noise. The amplifier is based on a 0.25 μm SiGe BiCMOS process, and thanks to the inductorless circuit structure, the core circuit area is only 0.03 mm². Test results show that the lowest noise figure (NF) in the operating band is 1.99 dB, the power gain reaches 29.7 dB, the S₁₁ and S₂₂ are less than −10 dB, the S₁₂ is less than −30 dB, the IIP3 is 0.81dBm, and the OP_1dB is 10.27 dBm. The operating current is 31.18 mA at 3.8 V supply.

Infrared and terahertz waves constitute pivotal bands within the electromagnetic spectrum, distinguished by their robust penetration capabilities and non-ionizing nature. These wavebands offer the potential for achieving high-resolution and non-destructive detection methodologies, thereby possessing considerable research significance across diverse domains including communication technologies, biomedical applications, and security screening systems. Two-dimensional materials, owing to their distinctive optoelectronic attributes, have found widespread application in photodetection endeavors. Nonetheless, their efficacy diminishes when tasked with detecting lower photon energies. Furthermore, as the landscape of device integration evolves, two-dimensional materials struggle to align with the stringent demands for device superior performance. Topological materials, with their topologically protected electronic states and non-trivial topological invariants, exhibit quantum anomalous Hall effects and ultra-high carrier mobility, providing a new approach for seeking photosensitive materials for infrared and terahertz photodetectors. This article introduces various types of topological materials and their properties, followed by an explanation of the detection mechanism and performance parameters of photodetectors. Finally, it summarizes the current research status of near-infrared to far-infrared photodetectors and terahertz photodetectors based on topological materials, discussing the challenges faced and future prospects in their development.

In this study, we present the fabrication of vertical SnO/β-Ga₂O₃ heterojunction diode (HJD) via radio frequency (RF) reactive magnetron sputtering. The valence and conduction band offsets between β-Ga₂O₃ and SnO are determined to be 2.65 and 0.75 eV, respectively, through X-ray photoelectron spectroscopy, showing a type-II band alignment. Compared to its Schottky barrier diode (SBD) counterpart, the HJD presents a comparable specific ON-resistances (R_on,sp) of 2.8 mΩ·cm² and lower reverse leakage current (I_R), leading to an enhanced reverse blocking characteristics with breakdown voltage (BV) of 1675 V and power figure of merit (PFOM) of 1.0 GW/cm². This demonstrates the high quality of the SnO/β-Ga₂O₃ heterojunction interface. Silvaco TCAD simulation further reveals that electric field crowding at the edge of anode for the SBD was greatly depressed by the introduction of SnO film, revealing the potential application of SnO/β-Ga₂O₃ heterojunction in the future β-Ga₂O₃-based power devices.

The RADFET radiation dosimeter is a type of radiation detector based on the total dose effects of the PMOS transistor. The RADFET chip was fabricated in CUMEC 8-inch process with a six-layer photomask. The chip including two identical PMOS transistors, occupies a size of 610 µm×610 µm. Each PMOS has a W/L ratio of 300 µm/50 µm, and a 400 nm thick gate oxide, which is formed by a dry-wet-dry oxygen process. The wet oxygen-formed gate oxide with more traps can capture more holes during irradiation, thus significantly changing the PMOS threshold voltage. Pre-irradiation measurement results from ten test chips show that the initial average voltage of the PMOS is 1.961 V with a dispersion of 5.7%. The irradiation experiment is conducted in a cobalt source facility with a dose rate of 50 rad(Si)/s. During irradiation, a constant current source circuit of 10 µA was connected to monitoring the shift in threshold voltage under different total dose. When the total dose is 100 krad(Si), the shift in threshold voltage was approximately 1.37 V, which demonstrates that an excellent radiation function was achieved.

Silicon carbide offers distinct advantages in the field of power electronic devices. However, manufacturing processes remain a significant barrier to its widespread adoption. Polycrystalline SiC is less expensive and easier to produce than single crystal. But stabilizing and controlling its performance are critical challenges that must be addressed urgently. Due to its material properties and excellent performance in applications, 3C-SiC is gaining increasing attention in research. This article presents the electrical and material properties of a series of polycrystalline 3C-SiC samples and investigates their interrelationship. The samples were examined using TEM, which confirmed their polycrystalline structure. Combined with XRD and Raman spectroscopy, the grain orientations within the samples were analyzed, and the presence of stress was verified. EBSD was employed to statistically examine the grain structure and size across samples. For samples with similar doping levels, grain size is the most influential factor in determining electrical characteristics. Further EBSD measurements reveal the relationship between resistivity and grain size as log(ρ) = −1.93 + 8.67/d. These findings provide a foundation for the quantitative control and application of polycrystalline 3C-SiC. This work offers theoretical evidence for optimizing the performance tuning of 3C-SiC ceramics and enhancing their effectiveness in electronic applications.

This brief presents a cryogenic voltage reference circuit designed to operate effectively across a wide temperature range from 30 to 300 K. A key feature of the proposed design is utilizing a current subtraction technique for temperature compensation of the reference current, avoiding the deployment of bipolar transistors to reduce area and power consumption. Implemented with a 0.18-µm CMOS process, the circuit achieves a temperature coefficient (TC) of 67.5 ppm/K, which was not achieved in previous works. The design can also attain a power supply rejection (PSR) of 58 dB at 10 kHz. Meanwhile, the average reference voltage is 1.2 V within a 1.6% 3σ-accuracy spread. Additionally, the design is characterized by a minimal power dissipation of 1 µW at 30 K and a compact chip area of 0.0035 mm².

A 4H-SiC superjunction (SJ) MOSFET (SJMOS) with integrated high-K gate dielectric and split gate (HKSG−SJMOS) is proposed in this paper. The key features of HKSG−SJMOS involve the utilization of high-K (HK) dielectric as the gate dielectric, which surrounds the source-connected split gate (SG) and metal gate. The high-K gate dielectric optimizes the electric field distribution within the drift region, creating a low-resistance conductive channel. This enhancement leads to an increase in the breakdown voltage (BV) and a reduction in the specific on resistance (R_on,sp). The introduction of split gate surrounded by high-K dielectric reduces the gate−drain capacitance (C_gd) and gate−drain charge (Q_gd), which improves the switching characteristics. The simulation results indicate that compared to conventional 4H-SiC SJMOS, the HKSG−SJMOS exhibits a 110.5% enhancement in figure of merit (FOM, FOM = BV²/R_on,sp), a 93.6% reduction in the high frequency figure of merit (HFFOM) of R_on,sp·C_gd, and reductions in turn-on loss (E_on) and turn-off loss (E_off) by 38.3% and 31.6%, respectively. Furthermore, the reverse recovery characteristics of HKSG−SJMOS has also discussed, revealing superior performance compared to conventional 4H-SiC SJMOS.

Besides the common short-channel effect (SCE) of threshold voltage (V_th) roll-off during the channel length (L) downscaling of InGaZnO (IGZO) thin-film transistors (TFTs), an opposite V_th roll-up was reported in this work. Both roll-off and roll-up effects of V_th were comparatively investigated on IGZO transistors with varied gate insulator (GI), source/drain (S/D), and device architecture. For IGZO transistors with thinner GI, the SCE was attenuated due to the enhanced gate controllability over the variation of channel carrier concentration, while the V_th roll-up became more noteworthy. The latter was found to depend on the relative ratio of S/D series resistance (R_SD) over channel resistance (R_CH), as verified on transistors with different S/D. Thus, an ideal S/D engineering with small R_SD but weak dopant diffusion is highly expected during the downscaling of L and GI in IGZO transistors.

Minority carrier lifetimes τ are a fundamental parameter in semiconductor devices, representing the average time it takes for excess minority carriers to recombine. This characteristic is crucial for understanding and optimizing the performance of semiconductor materials, as it directly influences charge carrier dynamics and overall device efficiency. This work presents a development of PbS thin film deposited by thermal evaporation, at which the PbS thin film was further employed for structural, optical properties, and τ. Especially, the PbS film is probed with an in-house setup for identifying the τ. The procedure is to subject the PbS thin film with a flashlight from a light source with a middle rotating frequency. The derived τ in the in-house characterization setup agrees well with the value from the higher cost characterizing approach of photoluminescence. Therefore, the in-house setup provides additional tools for identifying the τ values for semiconductor devices.

With the rapid advancement of 5G communication technology, increasingly stringent demands are placed on the performance and functionality of phase change switches. Given that RF and microwave signals exhibit characteristics of high frequency, high speed, and high precision, it is imperative for phase change switches to possess fast, accurate, and reliable switching capabilities. Moreover, wafer-level compositional homogeneity and resistivity uniformity during semiconductor manufacturing are crucial for ensuring the yield and reliability of RF switches. By controlling magnetron sputter of GeTe through from four key parameters (power, Ar flow, pressure, and post-annealing) and incorporating elemental proportional compensation in the target, we achieved effective modulation over GeTe uniformity. Finally, we successfully demonstrated the process integration of GeTe phase-change RF switches on 6-inch scaled wafers.

Recently, self-powered ultraviolet photodetectors (UV PDs) based on SnO₂ have gained increasing interest due to its feature of working continuously without the need for external power sources. Nevertheless, the production of the majority of these existing UV PDs necessitates additional manufacturing stages or intricate processes. In this work, we present a facile, cost-effective approach for the fabrication of a self-powered UV PD based on p-Si/n-SnO₂ junction. The self-powered device was achieved simply by integrating a p-Si substrate with a n-type SnO₂ microbelt, which was synthesized via the chemical vapor deposition (CVD) method. The high-quality feature, coupled with the belt-like shape of the SnO₂ microbelt enables the favorable contact between the n-type SnO₂ and p-type silicon. The built-in electric field created at the interface endows the self-powered performance of the device. The p-Si/n-SnO₂ junction photodetector demonstrated a high responsivity (0.12 mA/W), high light/dark current ratio (>10³), and rapid response speed at zero bias. This method offers a practical way to develop cost-effective and high-performance self-powered UV PDs.

The emergence of cesium lead halide perovskite materials stable at air opened new prospects for the optoelectronic industry. In this work we present an approach to fabricating a flexible green perovskite light-emitting electrochemical cell (PeLEC) with a CsPbBr₃ perovskite active layer using a highly-ordered silicon nanowire (Si NW) array as a distributed electrode integrated within a thin polydimethylsiloxane film (PDMS). Numerical simulations reveal that Si NWs-based distributed electrode aids the improvement of carrier injection into the perovskite layer with an increased thickness and, therefore, the enhancement of light-emitting performance. The X-ray diffraction study shows that the perovskite layer synthesized on the PDMS membrane with Si NWs has a similar crystal structure to the ones synthesized on planar Si wafers. We perform a comparative analysis of the light-emitting devices’ properties fabricated on rigid silicon substrates and flexible Si NW-based membranes released from substrates. Due to possible potential barriers in a flexible PeLEC between the bottom electrode (made of a network of single-walled carbon nanotube film) and Si NWs, the electroluminescence performance and I ̶ V properties of flexible devices deteriorated compared to rigid devices. The developed PeLECs pave the way for further development of inorganic flexible uniformly light-emitting devices with improved properties.

The (010)-oriented substrates of β-Ga₂O₃ are endowed with the maximum thermal conductivity and fastest homoepitaxial rate, which is the preferred substrate direction for high-power devices. However, the size of (010) plane wafer is critically limited by die in the commercial edge-defined film-fed growth (EFG) method. It is difficult to grow the β-Ga₂O₃ crystal with (010) principal face due to the (100) and (001) are cleavage planes. Here, the 2-inch diameter (010) principal-face β-Ga₂O₃ single crystal is successfully designed and grown by improved EFG method. Unlike previous reported techniques, the single crystals are pulled with [001] direction, and in this way the (010) wafers can be obtained from the principal face. In our experiments, tree-like defects (TLDs) in (010) principal-face bulk crystals are easy to generate. The relationship between stability of growth interface and origin of TLDs are thoroughly discussed. The TLDs are successfully eliminated by optimizing growth conditions. The high crystalline quality of (010)-oriented substrates are comprehensive demonstrated by full width at half maximum (FWHM) with 50.4 arcsec, consistent orientation arrangement of (010) plane, respectively. This work shows that the (010)-oriented substrates can be obtained by EFG method, predicting the commercial prospects of large-scale (010)-oriented β-Ga₂O₃ substrates.

The transition of cobalt ions located at tetrahedral sites will produce strong absorption in the visible and near-infrared regions, and is expected to work in a passively Q-switched solid-state laser at the eye-safe wavelength of 1.5 µm. In this study, Co²⁺ ions were introduced into the wide bandgap semiconductor material ZnGa₂O₄, and large-sized and high-quality Co²⁺-doped ZnGa₂O₄ crystals with a volume of about 20 cm³ were grown using the vertical gradient freeze(VGF) method. Crystal structure and optical properties were analyzed using X-ray powder diffraction (XRD), X-ray photoelectron spectroscopy (XPS), and absorption spectroscopy. XRD results show that the Co²⁺-doped ZnGa₂O₄ crystal has a pure spinel phase without impurity phases and the rocking curve full width at half maximum (FWHM) is only 58 arcsec. The concentration of Co²⁺ in Co²⁺-doped ZnGa₂O₄ crystals was determined to be 0.2 at.% by the energy dispersive X-ray spectroscopy. The optical band gap of Co²⁺-doped ZnGa₂O₄ crystals is 4.44 eV. The optical absorption spectrum for Co²⁺-doped ZnGa₂O₄ reveals a prominent visible absorption band within 550−670 nm and a wide absorption band spanning from 1100 to 1700 nm. This suggests that the Co²⁺ ions have substituted the Zn²⁺ ions, which are typically tetrahedrally coordinated, within the lattice structure of ZnGa₂O₄. The visible region's absorption peak and the near-infrared broad absorption band are ascribed to the ⁴A₂(⁴F) → ⁴T₁(⁴P) and ⁴A₂(⁴F) → ⁴T₁(⁴F) transitions, respectively. The optimal ground state absorption cross section was determined to be 3.07 × 10⁻¹⁹ cm² in ZnGa₂O₄, a value that is comparatively large within the context of similar materials. This finding suggests that ZnGa₂O₄ is a promising candidate for use in near-infrared passive Q-switched solid-state lasers.

Two-dimensional (2D) chiral halide perovskites (CHPs) have attracted broad interest due to their distinct spin-dependent properties and promising applications in chiroptics and spintronics. Here, we report a new type of 2D CHP single crystals, namely R/S-3BrMBA₂PbBr₄. The chirality of the as-prepared samples is confirmed by exploiting circular dichroism spectroscopy, indicating a successful chirality transfer from chiral organic cations to their inorganic perovskite sublattices. Furthermore, we observed bright photoluminescence spanning from 380 to 750 nm in R/S-3BrMBA₂PbBr₄ crystals at room temperature. Such broad photoluminescence originates from free excitons and self-trapped excitons. In addition, efficient second-harmonic generation (SHG) performance was observed in chiral perovskite single crystals with high circular polarization ratios and non-linear optical circular dichroism. This demonstrates that R/S-3BrMBA₂PbBr₄ crystals can be used to detect and generate left- and right-handed circularly polarized light. Our study provides a new platform to develop high-performance chiroptical and spintronic devices.

Computing-in-memory (CIM) has been a promising candidate for artificial-intelligent applications thanks to the absence of data transfer between computation and storage blocks. Resistive random access memory (RRAM) based CIM has the advantage of high computing density, non-volatility as well as high energy efficiency. However, previous CIM research has predominantly focused on realizing high energy efficiency and high area efficiency for inference, while little attention has been devoted to addressing the challenges of on-chip programming speed, power consumption, and accuracy. In this paper, a fabricated 28 nm 576K RRAM-based CIM macro featuring optimized on-chip programming schemes is proposed to address the issues mentioned above. Different strategies of mapping weights to RRAM arrays are compared, and a novel direct-current ADC design is designed for both programming and inference stages. Utilizing the optimized hybrid programming scheme, 4.67× programming speed, 0.15× power saving and 4.31× compact weight distribution are realized. Besides, this macro achieves a normalized area efficiency of 2.82 TOPS/mm² and a normalized energy efficiency of 35.6 TOPS/W.

Complementary inverter is the basic unit for logic circuits, but the inverters based on full oxide thin-film transistors (TFTs) are still very limited. The next challenge is to realize complementary inverters using homogeneous oxide semiconductors. Herein, we propose the design of complementary inverter based on full ZnO TFTs. Li−N dual-doped ZnO (ZnO:(Li,N)) acts as the p-type channel and Al-doped ZnO (ZnO:Al) serves as the n-type channel for fabrication of TFTs, and then the complementary inverter is produced with p- and n-type ZnO TFTs. The homogeneous ZnO-based complementary inverter has typical voltage transfer characteristics with the voltage gain of 13.34 at the supply voltage of 40 V. This work may open the door for the development of oxide complementary inverters for logic circuits.

In recent years, as the dimensions of the conventional semiconductor technology is approaching the physical limits, while the multifunction circuits are restricted by the relatively fixed characteristics of the traditional metal−oxide−semiconductor field-effect transistors, reconfigurable devices that can realize reconfigurable characteristics and multiple functions at device level have been seen as a promising method to improve integration density and reduce power consumption. Owing to the ultrathin structure, effective control of the electronic characteristics and ability to modulate structural defects, two-dimensional (2D) materials have been widely used to fabricate reconfigurable devices. In this review, we summarize the working principles and related logic applications of reconfigurable devices based on 2D materials, including generating tunable anti-ambipolar responses and demonstrating nonvolatile operations. Furthermore, we discuss the analog signal processing applications of anti-ambipolar transistors and the artificial intelligence hardware implementations based on reconfigurable transistors and memristors, respectively, therefore highlighting the outstanding advantages of reconfigurable devices in footprint, energy consumption and performance. Finally, we discuss the challenges of the 2D materials-based reconfigurable devices.