Citation: |
Yang Min, Nan Qi, Yihan Chen, Minye Zhu, Guike Li, Yonghui Lin, Zhao Zhang, Jian Liu, Nanjian Wu, Jingbo Shi, Frank F. Shi, Liyuan Liu. A 32Gb/s digital-assisted PAM-4 DFB laser driver in 28-nm CMOS[J]. Journal of Semiconductors, 2025, In Press. doi: 10.1088/1674-4926/25020011
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Y Min, N Qi, Y H Chen, M Y Zhu, G K Li, Y H Lin, Z Zhang, J Liu, N J Wu, J B Shi, Frank F. Shi, and L Y Liu, A 32Gb/s digital-assisted PAM-4 DFB laser driver in 28-nm CMOS[J]. J. Semicond., 2025, accepted doi: 10.1088/1674-4926/25020011
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A 32Gb/s digital-assisted PAM-4 DFB laser driver in 28-nm CMOS
DOI: 10.1088/1674-4926/25020011
CSTR: 32376.14.1674-4926.25020011
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Abstract
This paper presents a 4-level pulse amplitude modulation (PAM-4) distributed feedback (DFB) laser driver. The driver adopts a digital slicing architecture to achieve high linearity by adjusting the weights of three thermometer-coded main paths. An efficient-biased output stage structure is proposed to reduce power consumption while avoiding the degradation of output node bandwidth typically induced by parasitic capacitance in high-current bias path. A two-tap linear and nonlinear feed-forward equalizer (FFE) is implemented in the digital domain to extend bandwidth limitations and compensate for the dynamic nonlinearity of the DFB laser. The nonlinear FFE is realized at the cost of lower power consumption and smaller area by utilizing the simultaneity of low-speed parallel data. The chip is fabricated in 28 nm CMOS process. Measurement results indicate that, with a laser bias current of 40 mA, a modulation current of 20 mApp, and an operating rate of 32 Gb/s PAM-4, the overall power consumption of the chip is 372 mW, corresponding to an energy efficiency of 11.6 pJ/b. -
References
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