Citation: |
Cai Li, Fu Zhongqian, Huang Lu. A low power high gain UWB LNA in 0.18-μm CMOS[J]. Journal of Semiconductors, 2009, 30(11): 115004. doi: 10.1088/1674-4926/30/11/115004
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Cai L, Fu Z Q, Huang L. A low power high gain UWB LNA in 0.18-μm CMOS[J]. J. Semicond., 2009, 30(11): 115004. doi: 10.1088/1674-4926/30/11/115004.
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Abstract
A low power high gain differential UWB low noise amplifier (LNA) operating at 3–5 GHz is presented. A common gate input stage is used for wideband input matching; capacitor cross coupling (CCC) and current reuse techniques are combined to achieve high gain under low power consumption. The prototypes fabricated in 0.18-μm CMOS achieve a peak power gain of 17.5 dB with a –3 dB bandwidth of 2.8–5 GHz, a measured minimum noise figure (NF) of 3.35 dB and –12.6 dBm input-referred compression point at 5 GHz, while drawing 4.4 mA from a 1.8 V supply. The peak power gain is 14 dB under a 4.5 mW power consumption (3 mA from a 1.5 V supply). The proposed differential LNA occupies an area of 1.01 mm2 including test pads.-
Keywords:
- UWB
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References
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Proportional views