| Citation: |
Gao Peijun, Oh N J, Min Hao. An enhanced close-in phase noise LC-VCO using parasitic V-NPN transistors in a CMOS process[J]. Journal of Semiconductors, 2009, 30(8): 085004. doi: 10.1088/1674-4926/30/8/085004
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Gao P J, Oh N J, Min H. An enhanced close-in phase noise LC-VCO using parasitic V-NPN transistors in a CMOS process[J]. J. Semicond., 2009, 30(8): 085004. doi: 10.1088/1674-4926/30/8/085004.
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An enhanced close-in phase noise LC-VCO using parasitic V-NPN transistors in a CMOS process
DOI: 10.1088/1674-4926/30/8/085004
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Abstract
A differential LC voltage controlled oscillator (VCO) employing parasitic vertical-NPN (V-NPN) transistors as a negative gm-cell is presented to improve the close-in phase noise. The V-NPN transistors have lower flicker noise compared to MOS transistors. DC and AC characteristics of the V-NPN transistors are measured to facilitate the VCO design. The proposed VCO is implemented in a 0.18 µm CMOS RF/mixed signal process, and the measurement results show the close-in phase noise is improved by 3.5–9.1 dB from 100 Hz to 10 kHz offset compared to that of a similar CMOS VCO. The proposed VCO consumes only 0.41 mA from a 1.5 V power supply-
Keywords:
- close-in phase noise,
- vertical-NPN,
- flicker noise,
- VCO
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References
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Proportional views
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