J. Semicond. > 2009, Volume 30 > Issue 9 > 095014
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SEMICONDUCTOR INTEGRATED CIRCUITS

A 2.8 ppm/℃ high PSRR BiCMOS bandgap voltage reference

Ming Xin, Lu Yang, Zhang Bo and Zhou Zekun

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DOI: 10.1088/1674-4926/30/9/095014

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Abstract: A high-order curvature-compensated and high power-supply rejection ratio (PSRR) BiCMOS bandgap reference is presented. The circuit utilizes positive temperature characteristics of the saturation current ISS and forward current gain of the bipolar transistors to realize a low temperature coefficient (TC) as well as filter capacitors and level-shift structures to improve the PSRR. Implemented in 0.6 μm BCD process, the proposed voltage reference consumes a supply current of 28 A at 3.6 V. A temperature coefficient of 2.8 ppm/℃, PSRR of more than 80 dB at low frequencies and a line regulation of 50 ppm/V from 3.6 to 5.5 V are easily achieved, which make it widely applicable in portable equipment.

Key words: saturation current,  current gain,  curvature compensation,  level shift,  ?lter capacitors

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    Received: 18 August 2015 Revised: 04 May 2009 Online: Published: 01 September 2009

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      Article Navigation >  Journal of Semiconductors  > 2009  >  30(9): 095014
      Ming Xin, Lu Yang, Zhang Bo, Zhou Zekun. A 2.8 ppm/℃ high PSRR BiCMOS bandgap voltage reference[J]. Journal of Semiconductors, 2009, 30(9): 095014. doi: 10.1088/1674-4926/30/9/095014 ****Ming X, Lu Y, Zhang B, Zhou Z K. A 2.8 ppm/℃ high PSRR BiCMOS bandgap voltage reference[J]. J. Semicond., 2009, 30(9): 095014. doi: 10.1088/1674-4926/30/9/095014.
      Citation:
      Ming Xin, Lu Yang, Zhang Bo, Zhou Zekun. A 2.8 ppm/℃ high PSRR BiCMOS bandgap voltage reference[J]. Journal of Semiconductors, 2009, 30(9): 095014. doi: 10.1088/1674-4926/30/9/095014 ****
      Ming X, Lu Y, Zhang B, Zhou Z K. A 2.8 ppm/℃ high PSRR BiCMOS bandgap voltage reference[J]. J. Semicond., 2009, 30(9): 095014. doi: 10.1088/1674-4926/30/9/095014.
      shu

      A 2.8 ppm/℃ high PSRR BiCMOS bandgap voltage reference

      DOI: 10.1088/1674-4926/30/9/095014

      • State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China

      • Electrical and Computer Engineering Department, Polytechnic Institute of New York University, New York 11201, USA

      • State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China

      • Received Date: 2015-08-18
      • Accepted Date: 2009-01-10
      • Revised Date: 2009-05-04
      • Published Date: 2009-08-28

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