SEMICONDUCTOR INTEGRATED CIRCUITS
Abstract: This paper describes the design and test of a novel custom driving circuit for multi-quantum-well (MQW) spatial light modulators (SLMs). Unlike previous solutions, we integrated all blocks in one chip to synchronize the control logic circuit and the driving circuits. Single-slope digital-to-analog converters (DACs) inside each pixel are not adopted because it is difficult to eliminate capacitor mismatch. 64 column-shared 8-bit resistor-string DACs are utilized to provide programmable output voltages from 0.5 to 3.8 V. They are located on the top of 64 × 64 driving pixels tightly to match each other with several dummies. Each DAC performs its conversion in 280 ns and draws 80 μA. For a high speed data transfer rate, the system adopts a 2-stage shift register that operates at 50 MHz and the modulating rate achieves 50 K frames/s while dissipating 302 mW from a 5-V supply. The die is fabricated in a 0.35 μm CMOS process and its area is 5.5 × 7 mm2.
Key words: spatial light modulator, driving circuit, high speed, low power
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Received: 20 August 2015 Revised: 19 September 2011 Online: Published: 01 February 2012
| Citation: |
Zhu Minghao, Zhu Congyi, Li Wenjiang, Zhang Yaohui. A low-power high-speed driving circuit for spatial light modulators[J]. Journal of Semiconductors, 2012, 33(2): 025013. doi: 10.1088/1674-4926/33/2/025013
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Zhu M H, Zhu C Y, Li W J, Zhang Y H. A low-power high-speed driving circuit for spatial light modulators[J]. J. Semicond., 2012, 33(2): 025013. doi: 10.1088/1674-4926/33/2/025013.
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