| Citation: |
Gu Gaowei, Zhu En, Lin Ye, Liu Wensong. A 10 Gb/s burst-mode clock and data recovery circuit[J]. Journal of Semiconductors, 2012, 33(7): 075011. doi: 10.1088/1674-4926/33/7/075011
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Gu G W, Zhu E, Lin Y, Liu W S. A 10 Gb/s burst-mode clock and data recovery circuit[J]. J. Semicond., 2012, 33(7): 075011. doi: 10.1088/1674-4926/33/7/075011.
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Abstract
We introduce a gated oscillator based on XONR/XOR cells and illustrate its working process. A half-rate BM-CDR circuit based on the proposed oscillator is designed, and the design is implemented in SMIC 0.13 μm CMOS technology occupying an area of 675 × 25 μm2. The measured results show that this circuit can recover clock and data from each 10 Gbit/s burst-mode data packet within 5 bits, and the recovered data pass eye-mask test defined in IEEE standard 802.3av. -
References
[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] -
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