Citation: |
Li Yuanqing, Yao Suying, Xu Jiangtao, Gao Jing. An SEU-hardened latch with a triple-interlocked structure[J]. Journal of Semiconductors, 2012, 33(8): 085002. doi: 10.1088/1674-4926/33/8/085002
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Li Y Q, Yao S Y, Xu J T, Gao J. An SEU-hardened latch with a triple-interlocked structure[J]. J. Semicond., 2012, 33(8): 085002. doi: 10.1088/1674-4926/33/8/085002.
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Abstract
A single event upset (SEU) tolerant latch with a triple-interlocked structure is presented. Its self-recovery mechanism is implemented by using three pairs of guard-gates and inverters to construct feedback lines inside the structure. This latch effectively suppresses the effects of charge deposition at any single internal node caused by particle strikes. Three recently reported SEU-hardened latches are chosen and compared with this latch in terms of reliability. The potential problems that these three latches could still get flipped due to single event effects or single event effects plus crosstalk coupling are pointed out, which can be mitigated by this proposed latch. The SEU tolerance of each latch design is evaluated through circuit-level SEU injection simulation. Furthermore, discussions on the crosstalk robustness and some other characteristics of these latches are also presented. -
References
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