J. Semicond. > 2013, Volume 34 > Issue 10 > 106002

SEMICONDUCTOR TECHNOLOGY

A novel OPC method to reduce mask volume with yield-aware dissection

Chunlei Xie, Ye Chen and Zheng Shi

+ Author Affiliations

 Corresponding author: Xie Chunlei, xiecl@vlsi.zju.edu.cn

DOI: 10.1088/1674-4926/34/10/106002

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Abstract: Growing data volume of masks tremendously increases manufacture cost. The cost increase is partially due to the complicated optical proximity corrections applied on mask design. In this paper, a yield-aware dissection method is presented. Based on the recognition of yield related mask context, the dissection result provides sufficient degrees of freedom to keep fidelity on critical sites while still retaining the frugality of modified designs. Experiments show that the final mask volume using the new method is reduced to about 50% of the conventional method.

Key words: optical proximity correction, dissection, mask cost, yield



[1]
Schellenberg F M. Resolution enhancement technology:the past, the present, and extensions for the future. SPIE Microlithography Plenary Session, Feb.23, 2004 doi: 10.1117/12.548923.pdf?SSO=1
[2]
Liebmann L W, Mansfield S M, Wong A K, et al. TCAD development for lithography resolution enhancement. IBM J Res & Dev, 2001, 45(5):651 http://ieeexplore.ieee.org/document/5389069/
[3]
Ladepus M. Analysis: photomask business model is broken. EETimes, 2008 http://eetimes.com/electronics-news/4079361/Analysis-Photomask-business-model-is-broken?pageNumber=0
[4]
Jhaveri T, Rovner V, Strojewas A, et al. OPC simplification and mask cost reduction using regular design fabrics. Proc SPIE, 2009, 7274:727417 doi: 10.1117/12.814406
[5]
Tsujita K, Arai T, Ishii H, et al. Supreme lithographic performance by simple mask layout based on lithography and layout co-optimization. Proc SPIE, 2011, 7973:79730D doi: 10.1117/12.878663.pdf
[6]
Zhang Y, Gray R, Chou S, et al. Mask cost analysis via write time estimation. Proc SPIE, 2005:5756 doi: 10.1117/12.598884.pdf
[7]
Jiao Hailong, Cheng Lan, Le Zhigang, et al. OPC reuse based on a reduced standard cell library. Journal of Semiconductors, 2008, 29(5):1016 http://www.jos.ac.cn/bdtxbcn/ch/reader/view_abstract.aspx?file_no=07092503&flag=1
[8]
Li Yanghuan, Shi Zheng, Geng Zhen, et al. A new algorithm of inverse lithography technology for mask complexity reduction. Journal of Semiconductors, 2012, 33(4):045009 doi: 10.1088/1674-4926/33/4/045009
[9]
Smayling M C, Axelrad V, Tsujita K, et al. Sub-20 nm logic lithography optimization with simple OPC and multiple pitch division. Proc SPIE, 2012, 8326:832613 doi: 10.1117/12.914916
[10]
Zhang H, Du Y, Wong M D F, et al. Mask cost reduction with circuit performance consideration for self-aligned double patterning. 16th Asia and South Pacific Design Automation Conference (ASP_DAC), 2011 http://ieeexplore.ieee.org/document/5722296/
[11]
Ma X, Jiang S, Zakhor A. A cost-driven heuristics to minimize external sliver length. Proc SPIE, 2011, 7973:79732O http://www-video.eecs.berkeley.edu/papers/xma/SPIE_xma.pdf
[12]
Mackay R S, Kamberian H, Zhang Y. Methods to reduce lithography cost by reticle engineering. Microelectron Eng, 2006, 83:914 doi: 10.1016/j.mee.2006.01.242
[13]
Word J, Torres A, LaCour P. Advanced layout fragmentation and simulation schemes for model based OPC. SPIE, 2005, 5754:1159 doi: 10.1117/12.598848.pdf
[14]
Hung M, Balasingam P. Hybrid optical proximity correction——concepts and results. SPIE, 2002, 4889:1173 doi: 10.1117/12.468204.short
[15]
Yang Yiwei, Shi Zheng, Yan Xiaolang. Model-based dynamic dissection in OPC. Journal of Semiconductors, 2008, 29(7):1422 http://www.jos.ac.cn/bdtxbcn/ch/reader/view_abstract.aspx?file_no=11061402&flag=1
[16]
Chen S Y, Lynn E C. Flexible fragmentation rules for next generation OPC-tag prior to fragmentation. SPIE, 2002, 4691:1221 doi: 10.1117/12.474503.pdf
[17]
Cobb N. Fast optical and process proximity correction algorithms for integrated circuit manufacturing. PhD Thesis, University of California, Berkeley, 1998 http://dl.acm.org/citation.cfm?id=927160
[18]
Ma Yue, Shi Zheng, Chen Ye, at el. A content-driven model-based OPC tool. International Conference on Solid-State and Integrated-Circuit Technology, 2004:1064 http://ieeexplore.ieee.org/document/1436690/?reload=true&arnumber=1436690
Fig. 1.  An example layout which is corrected without dissection.

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Fig. 2.  Dissection example[13].

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Fig. 3.  A transistor's layout with printed wafer image, and mask mis-alignments.

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Fig. 4.  Choose different strategy by different context.

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Fig. 5.  Line width and line corner control.

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Fig. 6.  Via enclosure control.

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Fig. 7.  AND operation of layers.

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Fig. 8.  Geometry shape recognition examples.

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Fig. 9.  Neighboring feature recognition examples.

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Fig. 10.  Whole flow of yield-aware dissection.

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Fig. 11.  Dissection example (black points are added vertices).

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Fig. 12.  Adaptive dissection.

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Table 1.   Different dissection concentrations for different layers.

Table 2.   Performance comparison of dissection algorithms.

Table 3.   Comparison with regular design fabrics.
[1]
Schellenberg F M. Resolution enhancement technology:the past, the present, and extensions for the future. SPIE Microlithography Plenary Session, Feb.23, 2004 doi: 10.1117/12.548923.pdf?SSO=1
[2]
Liebmann L W, Mansfield S M, Wong A K, et al. TCAD development for lithography resolution enhancement. IBM J Res & Dev, 2001, 45(5):651 http://ieeexplore.ieee.org/document/5389069/
[3]
Ladepus M. Analysis: photomask business model is broken. EETimes, 2008 http://eetimes.com/electronics-news/4079361/Analysis-Photomask-business-model-is-broken?pageNumber=0
[4]
Jhaveri T, Rovner V, Strojewas A, et al. OPC simplification and mask cost reduction using regular design fabrics. Proc SPIE, 2009, 7274:727417 doi: 10.1117/12.814406
[5]
Tsujita K, Arai T, Ishii H, et al. Supreme lithographic performance by simple mask layout based on lithography and layout co-optimization. Proc SPIE, 2011, 7973:79730D doi: 10.1117/12.878663.pdf
[6]
Zhang Y, Gray R, Chou S, et al. Mask cost analysis via write time estimation. Proc SPIE, 2005:5756 doi: 10.1117/12.598884.pdf
[7]
Jiao Hailong, Cheng Lan, Le Zhigang, et al. OPC reuse based on a reduced standard cell library. Journal of Semiconductors, 2008, 29(5):1016 http://www.jos.ac.cn/bdtxbcn/ch/reader/view_abstract.aspx?file_no=07092503&flag=1
[8]
Li Yanghuan, Shi Zheng, Geng Zhen, et al. A new algorithm of inverse lithography technology for mask complexity reduction. Journal of Semiconductors, 2012, 33(4):045009 doi: 10.1088/1674-4926/33/4/045009
[9]
Smayling M C, Axelrad V, Tsujita K, et al. Sub-20 nm logic lithography optimization with simple OPC and multiple pitch division. Proc SPIE, 2012, 8326:832613 doi: 10.1117/12.914916
[10]
Zhang H, Du Y, Wong M D F, et al. Mask cost reduction with circuit performance consideration for self-aligned double patterning. 16th Asia and South Pacific Design Automation Conference (ASP_DAC), 2011 http://ieeexplore.ieee.org/document/5722296/
[11]
Ma X, Jiang S, Zakhor A. A cost-driven heuristics to minimize external sliver length. Proc SPIE, 2011, 7973:79732O http://www-video.eecs.berkeley.edu/papers/xma/SPIE_xma.pdf
[12]
Mackay R S, Kamberian H, Zhang Y. Methods to reduce lithography cost by reticle engineering. Microelectron Eng, 2006, 83:914 doi: 10.1016/j.mee.2006.01.242
[13]
Word J, Torres A, LaCour P. Advanced layout fragmentation and simulation schemes for model based OPC. SPIE, 2005, 5754:1159 doi: 10.1117/12.598848.pdf
[14]
Hung M, Balasingam P. Hybrid optical proximity correction——concepts and results. SPIE, 2002, 4889:1173 doi: 10.1117/12.468204.short
[15]
Yang Yiwei, Shi Zheng, Yan Xiaolang. Model-based dynamic dissection in OPC. Journal of Semiconductors, 2008, 29(7):1422 http://www.jos.ac.cn/bdtxbcn/ch/reader/view_abstract.aspx?file_no=11061402&flag=1
[16]
Chen S Y, Lynn E C. Flexible fragmentation rules for next generation OPC-tag prior to fragmentation. SPIE, 2002, 4691:1221 doi: 10.1117/12.474503.pdf
[17]
Cobb N. Fast optical and process proximity correction algorithms for integrated circuit manufacturing. PhD Thesis, University of California, Berkeley, 1998 http://dl.acm.org/citation.cfm?id=927160
[18]
Ma Yue, Shi Zheng, Chen Ye, at el. A content-driven model-based OPC tool. International Conference on Solid-State and Integrated-Circuit Technology, 2004:1064 http://ieeexplore.ieee.org/document/1436690/?reload=true&arnumber=1436690

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    Received: 15 February 2013 Revised: 28 April 2013 Online: Published: 01 October 2013

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      Article Navigation >  Journal of Semiconductors  > 2013  >  34(10): 106002
      Chunlei Xie, Ye Chen, Zheng Shi. A novel OPC method to reduce mask volume with yield-aware dissection[J]. Journal of Semiconductors, 2013, 34(10): 106002. doi: 10.1088/1674-4926/34/10/106002 ****C L Xie, Y Chen, Z Shi. A novel OPC method to reduce mask volume with yield-aware dissection[J]. J. Semicond., 2013, 34(10): 106002. doi: 10.1088/1674-4926/34/10/106002.
      Citation:
      Chunlei Xie, Ye Chen, Zheng Shi. A novel OPC method to reduce mask volume with yield-aware dissection[J]. Journal of Semiconductors, 2013, 34(10): 106002. doi: 10.1088/1674-4926/34/10/106002 ****
      C L Xie, Y Chen, Z Shi. A novel OPC method to reduce mask volume with yield-aware dissection[J]. J. Semicond., 2013, 34(10): 106002. doi: 10.1088/1674-4926/34/10/106002.
      shu

      A novel OPC method to reduce mask volume with yield-aware dissection

      DOI: 10.1088/1674-4926/34/10/106002

      • Institute of VLSI Design, Zhejiang University, Hangzhou 310027, China

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      • Corresponding author: Xie Chunlei, xiecl@vlsi.zju.edu.cn
      • Received Date: 2013-02-15
      • Revised Date: 2013-04-28
      • Published Date: 2013-10-01

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