J. Semicond. > 2013, Volume 34 > Issue 9 > 096001

SEMICONDUCTOR TECHNOLOGY

Simulation of through via bottom-up copper plating with accelerator for the filling of TSVs

Heng Wu1, 2, Zhen'an Tang1, , Zhu Wang3, 4, Wan Cheng3, 4 and Daquan Yu2, 3, 4,

+ Author Affiliations

 Corresponding author: Tang Zhen'an, Email:tangza@dlut.edu.cn; Yu Daquan, Email:yudaquan@ime.ac.cn

DOI: 10.1088/1674-4926/34/9/096001

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Abstract: Filling high aspect ratio through silicon vias (TSVs) without voids and seams by copper plating is one of the technical challenges for 3D integration. Bottom-up copper plating is an effective solution for TSV filling. In this paper, a new numerical model was developed to simulate the electrochemical deposition (ECD) process, and the influence of an accelerator in the electrolyte was investigated. The arbitrary Lagrange-Eulerian (ALE) method for solving moving boundaries in the finite element method (FEM) was used to simulate the electrochemical process. In the model, diffusion coefficient and adsorption coefficient were considered, and then the time-resolved evolution of electroplating profiles was simulated with ion concentration distribution and the electric current density.

Key words: TSVs, copper plating, through via, bottom-up, accelerator



[1]
Vereecken F M, Binstead R A, Deligianni H, et al. The chemistry of additives in damascene copper plating. IBM J Res & Dev, 2005, 49:3
[2]
Beica R, Sharbono C, Ritzdorf T. Through silicon via copper electrodeposition for 3D integration. Proc IEEE ECTC, 2008:577
[3]
Song C, Wu H, Jing X, et al. Numerical simulation and experimental verification of copper plating with different additives for through silicon vias. Proc ESTC 2012:A1
[4]
Wu J, del Alamo J A. Fabrication and characterization of through-substrate interconnects. IEEE Trans Electron Devices, 2010, 57:1261 doi: 10.1109/TED.2010.2045671
[5]
Song C, Wang Z, Tan Z, et al. Moving boundary simulation and experimental verification of high aspect-ratio through-silicon-vias for 3-D integration. IEEE Trans Components, Packaging and Manufacturing Technology, 2012, 2(1):23 doi: 10.1109/TCPMT.2011.2167681
[6]
Wheeler D, Josell D, Moffat T P. Modeling superconformal electrodeposition using the level set method. J Electrochem Soc, 2003, 150:C302 doi: 10.1149/1.1562598
[7]
Zheng Z, Stephens R M, Braatz R D, et al. A hybrid multiscale kinetic Monte Carlo method for simulation of copper electrodepostion. J Comput Phys, 2008, 227:5184 doi: 10.1016/j.jcp.2008.01.056
[8]
Tenno R, Pohjoranta A. An ALE model for prediction and control of the microvia fill process with two additives. J Electrochem Soc, 2008, 155:D383 doi: 10.1149/1.2890413
Fig. 1.  The boundary conditions of the numerical model

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Fig. 2.  The simulation results of BCE process without accelerator. (a) 350 s. (b) 700 s. (c) 1400 s. (d) 2600 s

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Fig. 3.  The simulation results of BCE process with accelerator. (a) 350 s. (b) 700 s. (c) 1050 s. (d) 1400 s

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Fig. 4.  The accelerator coverage versus the concentration of accelerator

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Fig. 5.  The accelerator coverage versus the diffusion coefficient of accelerator

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Fig. 6.  The accelerator coverage versus the adsorption coefficient of accelerator

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Table 1.   The symbols and values of parameters used as reference parameters in model
[1]
Vereecken F M, Binstead R A, Deligianni H, et al. The chemistry of additives in damascene copper plating. IBM J Res & Dev, 2005, 49:3
[2]
Beica R, Sharbono C, Ritzdorf T. Through silicon via copper electrodeposition for 3D integration. Proc IEEE ECTC, 2008:577
[3]
Song C, Wu H, Jing X, et al. Numerical simulation and experimental verification of copper plating with different additives for through silicon vias. Proc ESTC 2012:A1
[4]
Wu J, del Alamo J A. Fabrication and characterization of through-substrate interconnects. IEEE Trans Electron Devices, 2010, 57:1261 doi: 10.1109/TED.2010.2045671
[5]
Song C, Wang Z, Tan Z, et al. Moving boundary simulation and experimental verification of high aspect-ratio through-silicon-vias for 3-D integration. IEEE Trans Components, Packaging and Manufacturing Technology, 2012, 2(1):23 doi: 10.1109/TCPMT.2011.2167681
[6]
Wheeler D, Josell D, Moffat T P. Modeling superconformal electrodeposition using the level set method. J Electrochem Soc, 2003, 150:C302 doi: 10.1149/1.1562598
[7]
Zheng Z, Stephens R M, Braatz R D, et al. A hybrid multiscale kinetic Monte Carlo method for simulation of copper electrodepostion. J Comput Phys, 2008, 227:5184 doi: 10.1016/j.jcp.2008.01.056
[8]
Tenno R, Pohjoranta A. An ALE model for prediction and control of the microvia fill process with two additives. J Electrochem Soc, 2008, 155:D383 doi: 10.1149/1.2890413

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    Received: 05 February 2013 Revised: 01 April 2013 Online: Published: 01 September 2013

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      Article Navigation >  Journal of Semiconductors  > 2013  >  34(9): 096001
      Heng Wu, Zhen'an Tang, Zhu Wang, Wan Cheng, Daquan Yu. Simulation of through via bottom-up copper plating with accelerator for the filling of TSVs[J]. Journal of Semiconductors, 2013, 34(9): 096001. doi: 10.1088/1674-4926/34/9/096001 ****H Wu, Z A Tang, Z Wang, W Cheng, D Q Yu. Simulation of through via bottom-up copper plating with accelerator for the filling of TSVs[J]. J. Semicond., 2013, 34(9): 096001. doi:  10.1088/1674-4926/34/9/096001.
      Citation:
      Heng Wu, Zhen'an Tang, Zhu Wang, Wan Cheng, Daquan Yu. Simulation of through via bottom-up copper plating with accelerator for the filling of TSVs[J]. Journal of Semiconductors, 2013, 34(9): 096001. doi: 10.1088/1674-4926/34/9/096001 ****
      H Wu, Z A Tang, Z Wang, W Cheng, D Q Yu. Simulation of through via bottom-up copper plating with accelerator for the filling of TSVs[J]. J. Semicond., 2013, 34(9): 096001. doi:  10.1088/1674-4926/34/9/096001.
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      Simulation of through via bottom-up copper plating with accelerator for the filling of TSVs

      DOI: 10.1088/1674-4926/34/9/096001
      • 1.

        Dalian University of Technology, Dalian 116024, China

      • 2.

        Jiangsu R & D Center for Internet of Things, Wuxi 214315, China

      • 3.

        Institute of Microelectronics, Chinese Academy of Sciences, Beijing 100029, China

      • 4.

        National Center for Advanced Packaging, Wuxi 214315, China

      Funds:

      Project supported by the National S & T Major Projects (No. 2011ZX02709-2)

      the National S & T Major Projects 2011ZX02709-2

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