J. Semicond. > 2017, Volume 38 > Issue 11 > 114001

SEMICONDUCTOR DEVICES

Electrical transport and current properties of rare-earth dysprosium Schottky electrode on p-type GaN at various annealing temperatures

G. Nagaraju1, K. Ravindranatha Reddy2 and V. Rajagopal Reddy1,

+ Author Affiliations

 Corresponding author: V. Rajagopal Reddy, E-mail: reddy_vrg@rediffmail.com (V.Rajagopal Reddy)

DOI: 10.1088/1674-4926/38/11/114001

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Abstract: The electrical and current transport properties of rapidly annealed Dy/p-GaN SBD are probed by I–V and C–V techniques. The estimated barrier heights (BH) of as-deposited and 200 °C annealed SBDs are 0.80 eV ( I–V)/0.93 eV (C–V) and 0.87 eV (I–V)/1.03 eV (C–V). However, the BH rises to 0.99 eV (I–V)/ 1.18 eV(C–V) and then slightly deceases to 0.92 eV (I–V)/1.03 eV (C–V) after annealing at 300 °C and 400 °C. The utmost BH is attained after annealing at 300 °C and thus the optimum annealing for SBD is 300 °C. By applying Cheung’s functions, the series resistance of the SBD is estimated. The BHs estimated by I–V, Cheung’s and ΨSV plot are closely matched; hence the techniques used here are consistency and validity. The interface state density of the as-deposited and annealed contacts are calculated and we found that the NSS decreases up to 300 °C annealing and then slightly increases after annealing at 400 °C. Analysis indicates that ohmic and space charge limited conduction mechanisms are found at low and higher voltages in forward-bias irrespective of annealing temperatures. Our experimental results demonstrate that the Poole–Frenkel emission is leading under the reverse bias of Dy/p-GaN SBD at all annealing temperatures.

Key words: p-GaNrare-earth Dy Schottky contactsannealing effectselectrical propertiesenergy distribution profilescarrier transport mechanism

III–V nitride semiconductors, especially GaN, are stimulating semiconductor material due to their exceptional properties such as wide direct band gap, high breakdown voltage, large electric field, good thermal conductivity and stability. Due to these interesting properties, they are extensively used in the fabrication of optoelectronic and microelectronic device applications. The applications include laser diodes (LDs), light emitting diodes (LEDs), ultraviolet photodetectors, high electron mobility transistors (HEMT) and metal–oxide–semiconductor field effect transistors (MOSFET)[16]. A high quality of ohmic and Schottky contacts are desirable with low leakage current and high barrier height (BH) for the development of GaN-based devices[7]. But, Mg-doped GaN films grown on a sapphire substrate consist of a high density of deep-level defects originating from the low activation efficiency of Mg-H complexes[8]. Hence, the development of reliable and thermally stable Schottky contacts with low leakage current and high BH on p-GaN is challenging.

A few reports have been reported with various kinds of metals on p-type GaN[924]. For instance, Jang et al.[21] examined the temperature-dependence of electrical properties of non-alloyed Ti/p-GaN Schottky diodes in the temperature of 293 to 443 K. Nagarajuet al.[22] demonstrated the electrical and structural properties of Ti/p-GaN Schottky diode and reported that the maximum BH was achieved as 0.98 eV for the annealed contact at 300 °C. Reddy et al.[23] demonstrated that the BH of Y/p-GaN Schottky diode increased after annealing at 400 and 500 °C compared to as-deposited contact. Recently, Jyothi et al.[24] demonstrated that the maximum BH of Au/Yb/p-GaN was achieved as 1.03 eV for 400 °C annealed contacts. It is well known that the electrical properties of Schottky diodes strongly depend on the work function of metal. For the p-type semiconductors, the Schottky diodes fabricated using the metal with low work function can be predicted to provide better device performance. Because rare-earth metals have low work function (Dy = 3.1 eV, Yb = 2.60 eV, Gd = 3.10 eV and Er = 3.12 eV), an unlikely alignment of energy band is expected i.e., a negative barrier for n-type or a higher barrier for p-type. For example, Fukushima et al.[17] revealed higher barrier height values of rare-earth metals’ (Dy, Er, and Gd) Schottky contacts to p-type GaN. Furthermore, the rare-earth dopant induced strain and a bulk concentration of even a dilute amount of rare-earth atoms, can substantially alter the surface chemistry and the surface enthalpy, leading to a means for tuning Schottky barrier heights that can accompany an engineering of the electrical and optical properties of GaN[24]. Therefore, the aim of the current work is to develop and characterize the dysprosium (Dy) Schottky electrode on p-type GaN at various annealing temperatures. Rare-earth metal dysprosium (Dy) is chosen owing to its low work function and expected high BH on p-GaN semiconductor as well as the fact that no one has studied its electrical and current transport properties as a function of annealing temperature so far. The electrical parameters of the Dy/p-GaN such as barrier height, series resistance, ideality factor and interface state density are estimated by current–voltage (I–V), capacitance– voltage (C–V), Cheung’s functions and ΨSV plot as a function of annealing temperature. Further, the forward and reverse current conduction mechanism of Dy/p-GaN Schottky diode at various annealing temperatures are described and discussed.

Mg-doped (1.5 μm thick) GaN films were employed to fabricate metal/semiconductor diode. Using metal organic chemical vapor deposition (MOCVD) technique, the p-GaN wafer was grown on c-plane sapphire substrate with the carrier concentration about 1.13 × 10 17 cm–3. The surface contaminants on GaN wafer were cleaned with warm acetone, methanol and ethanol for 5 min each step by means of ultrasonic agitation. After that, the GaN films were rinsed in deionized (DI) water. To remove the native oxides from the surface of GaN, the films were dipped in boiling aquaregia HNO3 : HCL (1 : 3) for 10 min and then the films were rinsed in deionized water followed by N2 flow. Ohmic contacts were formed on half portion of p-GaN films with the Ni/Au (30/50 nm) by electron beam evaporation technique and these contacts were annealed at 650 °C for 3 min in N 2 ambient. Finally, 50 nm thickness dysprosium (Dy) metal was deposited as Schottky contacts on other portion of the p-GaN by e-beam evaporation under a vacuum pressure of 1.2 × 10 –5 mbar. The Schottky contact area was 3.8465×10–3 cm2. The schematic diagram of a fabricated Dy/p-GaN Schottky barrier diode is shown in Fig. 1. To check the thermal stability of Schottky diodes, the diodes were subsequently annealed at 200, 300 and 400 °C for 1 min in ambient N 2. In order to characterize the surface morphology of Dy Schottky contacts, scanning electron microscopy (SEM) was performed before and after annealing temperature. By using a Keithley source measuring unit (Model No. 2400) and automated DLTS system (DLS-83D), the current–voltage (I–V) and capacitance–voltage (C–V) measurements of Dy/p-GaN Schottky diode were carried out at room temperature in the dark.

Figure  1.  (Color online) The schematic structure of a fabricated Dy/p-GaN Schottky barrier diode (SBD).

Fig. 2 represents the plane-view SEM images achieved from the as-deposited and contacts annealed at 200, 300, and 400 °C for 1 min in nitrogen atmosphere. It is noted that the surface morphology of the as-deposited and annealed at 200 °C contacts is somewhat smooth as shown in Figs. 2(a) and 2(b). However, an increasing annealing up to 300 °C ( Fig. 2(c)) leads to a rough surface, implying the degradation of the surface morphology of the Dy Schottky contact. Further, it is observed that the surface morphology of the contact annealed at 400 °C ( Fig. 2(d)) becomes slightly smooth compared with that of the 300 °C annealed contacts. These results indicate that the surface morphology of the Dy Schottky contact did not change significantly during annealing process.

Figure  2.  (Color online) Plane-view SEM images of the Dy Schottky contacts on p-GaN: (a) as-deposited, (b) annealed at 200 °C, (c) annealed at 300 °C, and (d) annealed at 400 °C.

The typical forward and reverse current–voltage (I–V) characteristics of the Dy/p-GaN Schottky barrier diode (SBD) as a function of annealing temperature are displayed in Fig. 3. The leakage current of as-deposited Dy/p-GaN SBD is 6.671 × 10 –5 A/cm2 at 1 V. On the other hand, the leakage current decreases for the SBD annealed at 200, 300, and 400 °C, and respective values are 4.971 × 10 –7, 1.414 × 10 –8, and 2.159 × 10 –7 A/cm2 at 1 V. Clearly, it is noticed that the measured leakage current decreases upon annealing at 300 °C and then slightly increases after annealing at 400 °C. This indicates that the electrical properties of Dy/p-GaN SBD are improved. Further, it is noted that the current increases exponentially under the forward bias and a low voltage dependence of current in the reverse bias in the as-deposited and annealed diodes. Therefore, the experimental I–V characteristics can be analyzed through the standard thermionic emission theory[25] and it is given by

I=Is[exp(qVnkT)1],
(1)

where V, T, q, n, and k represent the applied bias voltage, absolute temperature in Kelvin, charge of electron, ideality factor and Boltzmann’s constant, respectively. The saturation current Is can be evaluated from Eq. (1) as follows:

Is=AAT2exp(qΦbkT),
(2)

where Is is the saturation current, A is the Schottky contact area, and A* is the effective Richardson constant (72 A cm–2 K–2 for m* = 0.60 m0)[26]. The BH (Φb) is calculated by utilizing Is value by the following equation:

Φb=kTqlnAAT2Is.
(3)

The ideality factor values can be evaluated from the slope of the forward lnI–V plot. The ideality factor is defined by the relationship

n=qkTdVd(lnI).
(4)

The calculated barrier height (BH) values of Dy/p-GaN Schottky barrier diode (SBD) are 0.80, 0.87, 0.99, and 0.92 eV for the as-deposited, 200, 300, and 400 °C annealing contacts, respectively. It is noted that the BH increases up to 300 °C and then decreases to 0.92 eV at 400 °C annealed contacts. Hence, 300 °C annealing temperature is the optimum temperature for the Dy/p-GaN SBD. The calculated ideality factor values for the as-deposited, 200, 300 and 400 °C annealed contacts are 1.84, 1.43, 1.31, and 1.63. Our results indicate that the ideality factor is greater than one (>1) for the as-deposited, 200, 300, and 400 °C annealed contacts. This may be due to the existence of native oxide layer at the metal-semiconductor interface. Another possibility may be due to the different effects such as leakage current, series resistance, interface states, tunneling process and non-uniformity distribution of the interfacial charges. Higher ideality factors may also be due to the presence of a wide distribution of low Schottky barrier height patches caused by laterally inhomogeneous barrier at the interface. Other reasons may be the effect of image force at the interface, generation and recombination of current and tunneling current through the interface states [2729].

Figure  3.  (Color online) Typical forward and reverse current–voltage (I–V) characteristics of the Dy/p-GaN SBD at various annealing temperatures.

Moreover, the series resistance (RS) and shunt resistances (RSh) are extracted from the junction resistance (Rj = ∂V/∂I) from I–V characteristics of the Dy/p-GaN SBD at different annealing temperatures. The junction resistance Rj versus the bias voltage plot of the Dy/p-GaN SBD at various annealing is illustrated in Fig. 4. The values of RS and RSh for the as-deposited and annealed Dy/p-GaN SBDs are achieved from Fig. 4. From Fig. 4, it is noted that the forward voltage increases, the junction resistance decreases and reaches a certain value which gives RS. Conversely, reverse voltage increases, the junction resistance increases and approaches a constant value which is equal to the value of RSh. The RS and RSh values are estimated to be 142 kΩ and 4.26 × 10 8 Ω for the as-deposited, 150 kΩ and 4.33 × 10 9 Ω for 200 °C, 431 kΩ and 4.70 × 10 11 Ω for 300 °C, and 132 kΩ and 4.17 × 10 10 Ω for 400 °C respectively. Analysis demonstrates that both RS and RSh increases upon annealing at 300 °C and then slightly decreases after annealing at 400 °C.

Figure  4.  (Color online) Plot of the junction resistance between Dy and p-GaN as a function of annealing temperature.

Generally at low-voltage region, the forward bias I–V characteristics are linear, but at high-voltage region the I–V characteristics deviate from the linearity due to the effect of series resistance and interface states. To estimate the Schottky barrier height, ideality factor and series resistance, Cheung’s functions[30] were employed. The Cheung’s functions are defined as

dVd(lnI)=IRS+n(kTq),
(5)
H(I)=Vn(kTq)lnIAAT2,
(6)

where H(I) can be written as

H(I)=nΦb+IRS.
(7)

Fig. 5(a) shows the plot of dV/d(ln I) versus I for the Dy/p-GaN SBD at different annealing temperatures. This plot shows linear behavior for all SBDs from which series resistance (RS) and ideality factor (n) are estimated from the slope and y-intercept, respectively. The values of RS and n are calculated to be 169 kΩ and 2.81 for the as-deposited, 403 kΩ, 2.46 for 200 °C, 492 kΩ, 2.32 for 300 °C and 427 kΩ, 2.63 for 400 °C, respectively. Further, the plot of H(I) versus I (Fig. 5(b)) is drawn by substituting ‘n’ value which determined from Eq. (5) into Eq. (6) and it will be linear from which BH and RS are determined from y-intercept and the slope, respectively. From H(I)–I plot, the RS and BH values are estimated to be 201 kΩ, 0.83 eV for the as-deposited, 461 kΩ, 0.93 eV for 200 °C, 613 kΩ, 0.98 eV for 300 °C and 501 kΩ, 0.91 eV for 400 °C, respectively. The Rs values obtained from dV/d(ln I) versus I are closely matched with those values obtained from H(I) versus I, which can be predictable that there is a consistency in Cheung’s approach. It is also noted that there is a large discrepancy between ‘n’ values extracted from linear and nonlinear region of forward bias I–V characteristics. This may be due to the effects such as the bias dependence of BH along with the voltage drop across the interfacial layer and the interface states are changed with the bias and the existence of the series resistance.

Figure  5.  (Color online) (a) Plot of dV/d(ln I) versus I and (b) H(I) versus I of the Dy/p-GaN SBD at different annealing temperatures.

Further, when there is native insulating oxide layer between metal/semiconductor (MS), the current via such a junction is defined as[31]

I=AAT2exp(qΨSkT)exp(qVpnkT),
(8)

where A, A*, T, k and n are the area of the Schottky contact, Richardson constant (72 A cm–2 K–2 for m* = 0.60 m0), temperature in Kelvin, Boltzmann’s constant and ideality factor. The BH can also be determined from the method developed by Chattopadhyay[32], once the values of surface potential ΨS, critical voltage VC and n = 1/C2 are expe rimentally known. The surface potential (ΨS) is defined by

Ψs=kTqln(AAT2I)Vp,
(9)

here VP(Vp = kT/q ln(Nv/Na) represents the voltage difference between Fermi level and top of the valance band in the neutral region of p-GaN. The potential difference, ΨS, is determined using the values of VP for the as-deposited and annealed Dy/p-GaN SBD. The plot of ΨS versus forward bias voltage (V) at various annealing temperatures is shown in Fig. 6. The BH (Φb) can be described by

Φb=ΨS(Ic,Vc)+C2Vc+Vp.
(10)
Figure  6.  (Color online) Surface potential versus forward voltage curves of the Dy/p-GaN SBD at different annealing temperatures.

From Fig. 6, it can be perceived that the ΨS value gradually decreases linearly up to V reaching the critical value, VC, after that the voltage drop across the series resistance becomes comparable to the applied voltage. From ΨSV plot, the value of critical voltage VC and ΨS (IC, VC) are estimated at different annealing temperatures. Moreover, C2 value can be expressed as

C2=(ΨsV)(Ic,Vc).
(11)

Using Eqs. (10) and (11), the values of BH and ideality factor are estimated to be 0.89 eV and 2.39 for the as-deposited, 0.93 eV and 3.62 at 200 °C, 1.02 eV and 3.92 at 300 °C, and 0.97 eV and 2.86 at 400 °C. The BHs obtained from ΨSV plot are approximately equal to the values obtained from the I–V characteristics and Cheung’s function, implying the techniques used here have constancy and validity.

Fig. 7 shows the plot of 1/C2 versus V for the as-deposited and annealed Dy/p-GaN SBD. The depletion region capacitance under reverse bias is given by[25]

1C2=2(Vdo+V)qεsA2Na,
(12)

where A is the diode area, εS is the dielectric constant of the semiconductor (εS = 9.5εo for p-GaN[8]), q is the electron charge, Na is the acceptor concentration. The x-intercept of 1/C2 versus V plot gives V0, V0 is related to the diffusion potential Vdo which is given by Vdo = V0 + kT/q, T is absolute temperature. Then, the BH can be estimated by the following equation

Φb(CV)=Vdo+Vp.
(13)

Once the carrier concentration Na. is determined, the VP can be calculated from the following equation:

Vp=kTqlnNvNa,
(14)

where Nv = 1.79 × 10 19 cm–3 is the effective density of states in the valance band of p-GaN. The calculated BH values of the Dy/p-GaN SBD are 0.93, 1.03, 1.18, and 1.13 eV for the as-deposited, 200, 300, and 400 °C annealed contacts. It is noted that the inconsistent behavior of BHs is obtained from current-voltage ( I–V) and capacitance–voltage (C–V) measurements. This may be ascribed to the existence of native oxide layer at the metal/semiconductor interface, trap states in the band gap, inhomogeneity in BH or the image force lowering contributed to I–V measurements but have small effect on C–V measurements[28, 3335]. According to Fontaine et al.[36] the interface damage at metal/semiconductor interface can influence the I–V behavior since they may act as recombination centers for trap-assisted tunneling currents. According to Song et al.[37], the C–V measurements are small inclined to interface states, so that the estimated BH is advised more trustworthy, even if the depletion width can be changed by the interface defects if they are deeper into the space charge region. The BHs obtained from I–V are voltage sensitive because the current flows from semiconductor to metal and the transport mechanism is not purely thermionic emission in nature, but the BHs obtained from C–V are not voltage sensitive. Therefore, C–V method gives average BH over the total area of the diode[38].

Figure  7.  (Color online) Plot of 1/C2V characteristics of Dy/p-GaN SBD at different annealing temperatures.

At higher bias voltage (Fig. 3), the as-deposited and annealed Dy/p-GaN SBD shows nonlinear I–V characteristics, indicating a continuum of interface states that are in equilibrium with the semiconductor. The energy distribution profiles of the as-deposited and annealed Dy/p-GaN SBD can be estimated by considering the voltage-dependent ideality factor which is defined as n(V) = V/(kT/q)ln(I/Is)[39] and effective BH (Φe). Then, the interface state density (NSS) is defined as follows according to Card and Rhoderick[40]:

NSS=1q[εiδ(n(V)1)εsWD],
(15)

where WD, δ are the width of space charge region and thickness of interfacial layer, εS is the semiconductor permittivity, and εi is the interfacial layer permittivity. In p-type semiconductor, the energy of interface states ESS with regard to top of the valence band at the surface of the semiconductor is given by[41]

EssEv=q(ΦeV),
(16)

here, the effective BH (Φe) is given by

Φe=Φb+(11n(V))V.
(17)

The energy distribution curves of NSS are derived from the experimental data of the forward bias I–V characteristics. By substituting n(V) values and other parameters in Eq. (15), the NSS and ESSEv is achieved. The NSS against ESSEv plot of the as-deposited and annealed Dy/p-GaN SBD is shown in Fig. 8. It is observed from Fig. 8 that the NSS rises with bias from mid gap with respect to the top of the valence band. The calculated values of interface state density (NSS) are given in Table 1 as a function of annealing temperature. The experimental results elucidate that the density of interface states decreases up to 300 °C annealing temperature and then slightly rises when the diode is annealed at 400 °C. Results demonstrated that the interface state density ( NSS) and series resistance (Rs) play a prominent role in the estimation of Schottky diode parameters.

Figure  8.  (Color online) The interface state energy distribution curves of the Dy/p-GaN SBD at different annealing temperatures.
Table  1.  The estimated barrier height, ideality factor, series resistance and interface state density of the Dy/p-GaN SBD by I–V and C–V methods as a function of annealing.
Parameter As-dep. 200 °C 300 °C 400 °C
I–V characteristics
Barrier height, Φb (eV) 0.8 0.87 0.99 0.92
Ideality factor, n 1.84 1.43 1.31 1.63
Shunt Resistance, RSh (Ω) 4.26 × 10 8 4.33 × 10 9 4.70 × 10 11 4.17 × 10 10
Series resistance, RS (kΩ) 142 150 431 132
Cheung’s functions dV/d(ln I) versus I
Series resistance, RS (kΩ) 169 403 492 427
Ideality factor, n 2.81 2.46 2.32 2.63
H(I) versus I
Series resistance, RS (kΩ) 201 461 613 501
Barrier height, Φb (eV) 0.83 0.93 0.98 0.91
C–V characteristics
Barrier height, Φb (eV) 0.93 1.03 1.18 1.13
Built-in potential (V) 0.83 0.93 1.08 1.03
Interface state density (NSS) 2.8(0.77 eV–Ev) to 2.81(0.82 eV–Ev) to 1.99(0.98 eV–Ev) to 2.02(0.89 eV–Ev) to
ranges (1012 cm–2 eV–1) 4.32(0.54 eV–Ev) 3.51(0.57 eV–Ev) to 2.27(0.58 eV–Ev) 2.75(0.56 eV–Ev)
DownLoad: CSV  | Show Table

In order to find the charge transport mechanism under whole forward bias of Dy/p-GaN SBD, log I versus log V plot is drawn at various annealing temperature and is presented in Fig. 9. From Fig. 9, it can be noticed that the plot exhibits three different linear regions with different slope for the as-deposited and annealed contacts that obey power-law behavior IVm (where m represents the slope of log I versus log V [42]). In region I, the slope values are 1.35, 1.21, 1.11, and 1.33 for the as-deposited, 200, 300, and 400 °C annealed contacts. These values are nearer to unity, which implies the ohmic conduction is dominant at lower bias voltage. This nature can be ascribed as the insertion of charge carriers from the electrode into semiconductor material which is a bridged owing to the low-bias voltage [43]. At the intermediate bias voltage (in region II), the slope values are 4.16, 7.04, 8.2, and 5.80 for the as-deposited, 200, 300, and at 400 °C annealed contacts. That these slope values are greater than 2 represents that the space-charge-limited-current (SCLC) is dominant because the increasing number of injected electrons from the electrode causes filled trap states in the space charge region [44]. At higher voltage (in region III), the slope values are 2.47, 3.27, 3.94, and 3.97 for the as-deposited, 200, 300, and at 400 °C annealed contacts. It is observed that the slope values decreased, which indicates the device moves towards ‘trap-filled’ limit as insertion level is high, whose dependence is identical in the trap free SCLC [45].

Figure  9.  (Color online) The plot of forward bias log I versus log V curve of the Dy/p-GaN SBD at different annealing temperatures.

To analyze the reverse leakage current mechanism in the as-deposited and annealed Dy/p-GaN SBD, the Poole-Frenkel and Schottky emission mechanisms will be contemplated in the junction. Figs. 10(a) and 10(b) show the plots of ln(IR/E) versus E and ln(IR/T2) versus E for Poole-Frenkel and Schottky emission for the as-deposited and annealed Dy/p-GaN SBDs. The reverse current due to Poole-Frenkel emission is defined by[46]

IREexp(1kTqEπε).
(18)

The reverse current due to Schottky emission is given by[47]

IRT2exp(12kTqEπε),
(19)

where E is the maximum electric field in the Schottky diode. The plots of ln(IR/E) versus E and ln(IR/T2) versus E gives linear curves for the Poole-Frenkel and Schottky emissions and the slope is specified by

S=qnkTqπε,
(20)

here n = 1 for Poole-Frenkel emission and n = 2 for Schottky emission. As per the Eq. (20), the Poole-Frenkel emission coefficient (βPF) is forever double that of Schottky emission coefficient (βS). The theoretical and experimental values of Dy/p-GaN are achieved from the fit to the data of βPF and βS for the as deposited and annealed Dy/p-GaN SBDs and are presented in Table 2. As can be seen in Table 2, experimental slopes achieved are well matched with the theoretical values of the Poole-Frenkel emission. Therefore, the reverse current of Dy/p-GaN SBD is governed by Poole-Frenkel emission regardless of annealing temperature. This indicates that the current conduction of the Dy/p-GaN SBD is connected with the existence of a high density of structural defects or trap levels in the junctions. This may be accountable for trapping/detrapping of charge carriers[48, 49].

Figure  10.  (Color online) Plot of (a) ln (IR/E) versus E1/2 and (b) ln (IR/T2) versus E1/2 of the Dy/p-GaN SBD at different annealing temperatures.
Table  2.  The theoretical and experimental slope values of Poole-Frenkel emission and Schottky emission for the Dy/p-type GaN SBD as a function of annealing.
Sample Poole-Frenkel emission Schottky emission
Theoretical Experimental Theoretical Experimental
As-dep 0.0208 0.0234
200 °C 0.00951 0.0282 0.00475 0.0308
300 °C 0.038 0.0408
400 °C 0.0324 0.0352
DownLoad: CSV  | Show Table

The electrical and current mechanisms in the forward and reverse bias of a fabricated Dy/p-GaN SBD are analyzed at different annealing temperatures. Measurements showed that the barrier heights (BHs) of Dy/p-GaN SBD are 0.80 eV (I–V)/0.93 eV (C–V) for as-deposited, 0.87 eV (I–V)/1.03 eV (C–V) at 200 °C, 0.99 eV ( I–V)/1.18 eV (C–V) at 300 °C and 0.92 eV ( I–V)/1.13 eV (C–V) at 400 °C, respectively. Results showed that the highest BH is obtained at 300 °C annealing temperature; hence 300 °C annealing is the optimum temperature for Dy/p-GaN SBD. Cheung’s functions and ΨSV plot are also employed to evaluate the BHs for the as-deposited and annealed Dy/p-GaN SBDs. Further, the series resistance of Dy/p-GaN SBD is estimated at various annealing temperatures and found to be increased upon annealing at 300 °C and then somewhat decreased after annealing at 400 °C compared to the as-deposited. The BHs obtained from these methods are well matched with the values measured from I–V method and hence the methods employed here are reliable and valid. Further, the interface state density (NSS) is calculated at each annealing temperature and it can be seen that the NSS decreases up to 300 °C annealing and then slightly rises when contact is annealed at 400 °C. The current transport mechanism is investigated under forward bias, which reveals ohmic at low voltage and space charge limited conduction (SCLC) mechanisms at high voltage are identified at all annealing temperatures. The Poole-Frenkel emission is the dominant current conduction mechanism in reverse bias of Dy/p-GaN in the as-deposited and annealed contacts.



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Hibbard D L, Chuang R W, Zhao Y S, et al. Thermally induced variation in barrier height and ideality factor of Ni/Au contacts to p-GaN. J Electron Mater, 2000, 29(3): 291 doi: 10.1007/s11664-000-0065-9
[13]
Yu L S, Qiao D, Jia L, et al. Study of Schottky barrier of Ni on P-GaN. Appl Phys Lett, 2001, 79(27): 4536 doi: 10.1063/1.1428773
[14]
Hartlieb P J, Roskowski A, Davis R F, et al. Pd growth and subsequent Schottky barrier formation on chemical vapor cleaned p-type GaN surfaces. J Appl Phys, 2002, 91(2): 732 doi: 10.1063/1.1424060
[15]
Tan C K, Aziz A A, Yam F K. Schottky barrier properties of various metal (Zr, Ti, Cr, Pt) contact on p-GaN revealed from I–V–T measurement. Appl Surf Sci, 2006, 252(16): 5930 doi: 10.1016/j.apsusc.2005.08.018
[16]
Stafford L, Voss L F, Pearton S J, et al. Schottky barrier height of boride-based rectifying contacts to p-GaN. Appl Phys Lett, 2006, 89(13): 132110 doi: 10.1063/1.2357855
[17]
Fukushima Y, Ogisu K, Kuzuhara M, et al. I–V and C–V characteristics of rare-earth-metal/p-GaN Schottky contacts. Phys Stat Sol C, 2009, 6(S2): S856 doi: 10.1002/pssc.v6.5s2
[18]
Greco G, Prystawko P, Leszczynski M, et al. Electro-structural evolution and Schottky barrier height in annealed Au/Ni contacts onto p-GaN. J Appl Phys, 2011, 110(12): 123703 doi: 10.1063/1.3669407
[19]
Choi Y Y, Kim S, Oh M, et al. Investigation of Fermi level pinning at semipolar (11-22) p-type GaN surfaces. Superlattices Microstruct, 2015, 77: 76 doi: 10.1016/j.spmi.2014.10.031
[20]
Naganawa M, Aoki T, Son J S, et al. Electrical characteristics of a-plane low-Mg-doped p-GaN Schottky contacts. Phys Stat Sol B, 2015, 252(5): 1024 doi: 10.1002/pssb.v252.5
[21]
Jang S H, Jang J S. Electrical characteristics and carrier transport mechanism for Ti/p-GaN Schottky diodes. Electron Mater Lett, 2013, 9(2): 245 doi: 10.1007/s13391-012-2175-y
[22]
Nagaraju G, Dasaradha Rao L, Rajagopal Reddy V. Annealing effects on the electrical, structural and morphological properties of Ti/p-GaN/Ni/Au Schottky diode. Appl Phys A, 2015, 12(1): 131
[23]
Rajagopal Reddy V, Asha B, Choi C J. Effects of annealing on electrical characteristics and current transport mechanisms of the Y/p-GaN Schottky diode. J Electron Mater, 2016, 45(7): 3268 doi: 10.1007/s11664-016-4490-9
[24]
Jyothi I, Janardhanam V, Kim J H, et al. Electrical and structural properties of Au/Yb Schottky contact on p-type GaN as a function of the annealing temperature. J Alloys Compd, 2016, 688: 875 doi: 10.1016/j.jallcom.2016.07.292
[25]
Sze S M. Physics of semiconductor devices. 2nd ed. New York: Wiley, 1981
[26]
Lee K N, Cao X A, Abernathy C R, et al. Effects of thermal stability of GaN epi-layer on the Schottky diodes. Solid-State Electron, 2000, 44(7): 1203 doi: 10.1016/S0038-1101(00)00041-1
[27]
Rhoderick E H, Williams R H. Metal semiconductor contacts. 2nd ed. Oxford: Clarendon Press, 1988
[28]
Tung R T. Electron transport at metal –semiconductor interfaces: general theory. Phys Rev B, 1992, 45(23): 13509 doi: 10.1103/PhysRevB.45.13509
[29]
Crowell C R. The physical significance of the anomalies in Schottky barriers. Solid-State Electron, 1977, 20(3): 171 doi: 10.1016/0038-1101(77)90180-0
[30]
Cheung S K, Cheung N W. Extraction of Schottky diode parameters from forward current-voltage characteristics. Appl Phys Lett, 1986, 49(2): 85 doi: 10.1063/1.97359
[31]
Chattopadhyay S, Bera L K, Ray S K, et al. Extraction of interface state density of Pt/p-strained-Si Schottky diode. Thin Solid Films, 1998, 335(1/2): 142
[32]
Chattopadhyay P. A new technique for the determination of barrier height of Schottky barrier diodes. Solid-State Electron, 1995, 38(3): 739 doi: 10.1016/0038-1101(94)00167-E
[33]
Bouiadjra W B, Kadaoui M A, Saidane A, et al. Influence of annealing temperature on electrical characteristics of Ti/Au/GaAsN Schottky diode with 0.2% nitrogen incorporation. Mater Sci Semicond Process, 2014, 22: 92 doi: 10.1016/j.mssp.2014.01.041
[34]
Lien C D, So F C T, Nicolet M A. An improved forward I–V method for nonideal Schottky diodes with high series resistance. IEEE Trans Electron Dev, 1984, 31(10): 1502 doi: 10.1109/T-ED.1984.21739
[35]
Aubry V, Meyer F. Schottky diodes with high series resistance: limitations of forward I-V methods. J Appl Phys, 1994, 76(12): 7973 doi: 10.1063/1.357909
[36]
Fontaine C, Okumura T, Tu K N. Interfacial reaction and Schottky barrier between Pt and GaAs. J Appl Phys, 1983, 54(3): 1404 doi: 10.1063/1.332165
[37]
Song Y P, Van Meirhaeghe R L, Laflere W H, et al. On the difference in apparent barrier height as obtained from capacitance–voltage and current–voltage–temperature measurements on Al/p-InP Schottky barriers. Solid-State Electron, 1986, 29(6): 633 doi: 10.1016/0038-1101(86)90145-0
[38]
Werner J H, Guttler H. Barrier inhomogeneities at Schottky contacts. J Appl Phys, 1991, 69(3): 1522 doi: 10.1063/1.347243
[39]
Gullu O, Turut A. Electrical analysis of organic interlayer based metal/interlayer/semiconductor diode structures. J Appl Phys, 2009, 106(10): 103717 doi: 10.1063/1.3261835
[40]
Card H C, Rhoderick E H. Studies of tunnel MOS diodes I. Interface effects in silicon Schottky diodes. J Phys D, 1971, 4(29): 1589
[41]
Kolnik J, Ozvold M. The influence of inversion surface layers on the evaluation of the interface state energy distribution from Schottky diode I-V characteristics. Phys Stat Sol A, 1990, 122: 583 doi: 10.1002/(ISSN)1521-396X
[42]
Kar S, Dahlke W E. Interface states in MOS structures with 20-40 Å thick SiO2 films on nondegenerate Si. Solid-State Electron, 1972, 15(2): 221 doi: 10.1016/0038-1101(72)90056-1
[43]
Aydogan S, Saglam M, Turut A. The effects of the temperature on the some parameters obtained from current-voltage and capacitance-voltage characteristics of polypyrrole/n-Si structure. Polymer, 2005, 46(2): 563 doi: 10.1016/j.polymer.2004.11.006
[44]
Forrest S R. Ultrathin organic films grown by organic molecular beam deposition and related techniques. Chem Rev, 1997, 97(6): 1793 doi: 10.1021/cr941014o
[45]
Yeargan J R, Taylor H L. The Poole-Frenkel effect with compensation present. J Appl Phys, 1968, 39(12): 5600 doi: 10.1063/1.1656022
[46]
Lee H D. Characterization of shallow silicided junctions for sub-quarter micron ULSI technology-extraction of silicidation induced Schottky contact area. IEEE Trans Electron Devices, 2000, 47(4): 762 doi: 10.1109/16.830991
[47]
Janardhanam V, Lee H K, Shim K H, et al. Temperature dependency and carrier transport mechanisms of Ti/p-type InP Schottky rectifiers. J Alloys Compd, 2010, 504 (1): 146 doi: 10.1016/j.jallcom.2010.05.074
[48]
Ashok Kumar A, Rajagopal Reddy V, Janardhanam V, et al. Electrical properties of Pt/n-type Ge Schottky contact with PEDOT: PSS interlayer. J Alloys Compd, 2013, 549: 18 doi: 10.1016/j.jallcom.2012.09.085
[49]
Rajagopal Reddy V, Janardhanam V, Ju J W, et al. Electrical properties of Au/Bi0.5Na0.5TiO3-BaTiO3/n-GaN metal–insulator–semiconductor (MIS) structure. Semicond Sci Technol, 2014, 29(7): 075001 doi: 10.1088/0268-1242/29/7/075001
Fig. 1.  (Color online) The schematic structure of a fabricated Dy/p-GaN Schottky barrier diode (SBD).

Fig. 2.  (Color online) Plane-view SEM images of the Dy Schottky contacts on p-GaN: (a) as-deposited, (b) annealed at 200 °C, (c) annealed at 300 °C, and (d) annealed at 400 °C.

Fig. 3.  (Color online) Typical forward and reverse current–voltage (I–V) characteristics of the Dy/p-GaN SBD at various annealing temperatures.

Fig. 4.  (Color online) Plot of the junction resistance between Dy and p-GaN as a function of annealing temperature.

Fig. 5.  (Color online) (a) Plot of dV/d(ln I) versus I and (b) H(I) versus I of the Dy/p-GaN SBD at different annealing temperatures.

Fig. 6.  (Color online) Surface potential versus forward voltage curves of the Dy/p-GaN SBD at different annealing temperatures.

Fig. 7.  (Color online) Plot of 1/C2V characteristics of Dy/p-GaN SBD at different annealing temperatures.

Fig. 8.  (Color online) The interface state energy distribution curves of the Dy/p-GaN SBD at different annealing temperatures.

Fig. 9.  (Color online) The plot of forward bias log I versus log V curve of the Dy/p-GaN SBD at different annealing temperatures.

Fig. 10.  (Color online) Plot of (a) ln (IR/E) versus E1/2 and (b) ln (IR/T2) versus E1/2 of the Dy/p-GaN SBD at different annealing temperatures.

Table 1.   The estimated barrier height, ideality factor, series resistance and interface state density of the Dy/p-GaN SBD by I–V and C–V methods as a function of annealing.

Parameter As-dep. 200 °C 300 °C 400 °C
I–V characteristics
Barrier height, Φb (eV) 0.8 0.87 0.99 0.92
Ideality factor, n 1.84 1.43 1.31 1.63
Shunt Resistance, RSh (Ω) 4.26 × 10 8 4.33 × 10 9 4.70 × 10 11 4.17 × 10 10
Series resistance, RS (kΩ) 142 150 431 132
Cheung’s functions dV/d(ln I) versus I
Series resistance, RS (kΩ) 169 403 492 427
Ideality factor, n 2.81 2.46 2.32 2.63
H(I) versus I
Series resistance, RS (kΩ) 201 461 613 501
Barrier height, Φb (eV) 0.83 0.93 0.98 0.91
C–V characteristics
Barrier height, Φb (eV) 0.93 1.03 1.18 1.13
Built-in potential (V) 0.83 0.93 1.08 1.03
Interface state density (NSS) 2.8(0.77 eV–Ev) to 2.81(0.82 eV–Ev) to 1.99(0.98 eV–Ev) to 2.02(0.89 eV–Ev) to
ranges (1012 cm–2 eV–1) 4.32(0.54 eV–Ev) 3.51(0.57 eV–Ev) to 2.27(0.58 eV–Ev) 2.75(0.56 eV–Ev)
DownLoad: CSV

Table 2.   The theoretical and experimental slope values of Poole-Frenkel emission and Schottky emission for the Dy/p-type GaN SBD as a function of annealing.

Sample Poole-Frenkel emission Schottky emission
Theoretical Experimental Theoretical Experimental
As-dep 0.0208 0.0234
200 °C 0.00951 0.0282 0.00475 0.0308
300 °C 0.038 0.0408
400 °C 0.0324 0.0352
DownLoad: CSV
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Yu L S, Qiao D, Jia L, et al. Study of Schottky barrier of Ni on P-GaN. Appl Phys Lett, 2001, 79(27): 4536 doi: 10.1063/1.1428773
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[15]
Tan C K, Aziz A A, Yam F K. Schottky barrier properties of various metal (Zr, Ti, Cr, Pt) contact on p-GaN revealed from I–V–T measurement. Appl Surf Sci, 2006, 252(16): 5930 doi: 10.1016/j.apsusc.2005.08.018
[16]
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[17]
Fukushima Y, Ogisu K, Kuzuhara M, et al. I–V and C–V characteristics of rare-earth-metal/p-GaN Schottky contacts. Phys Stat Sol C, 2009, 6(S2): S856 doi: 10.1002/pssc.v6.5s2
[18]
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[19]
Choi Y Y, Kim S, Oh M, et al. Investigation of Fermi level pinning at semipolar (11-22) p-type GaN surfaces. Superlattices Microstruct, 2015, 77: 76 doi: 10.1016/j.spmi.2014.10.031
[20]
Naganawa M, Aoki T, Son J S, et al. Electrical characteristics of a-plane low-Mg-doped p-GaN Schottky contacts. Phys Stat Sol B, 2015, 252(5): 1024 doi: 10.1002/pssb.v252.5
[21]
Jang S H, Jang J S. Electrical characteristics and carrier transport mechanism for Ti/p-GaN Schottky diodes. Electron Mater Lett, 2013, 9(2): 245 doi: 10.1007/s13391-012-2175-y
[22]
Nagaraju G, Dasaradha Rao L, Rajagopal Reddy V. Annealing effects on the electrical, structural and morphological properties of Ti/p-GaN/Ni/Au Schottky diode. Appl Phys A, 2015, 12(1): 131
[23]
Rajagopal Reddy V, Asha B, Choi C J. Effects of annealing on electrical characteristics and current transport mechanisms of the Y/p-GaN Schottky diode. J Electron Mater, 2016, 45(7): 3268 doi: 10.1007/s11664-016-4490-9
[24]
Jyothi I, Janardhanam V, Kim J H, et al. Electrical and structural properties of Au/Yb Schottky contact on p-type GaN as a function of the annealing temperature. J Alloys Compd, 2016, 688: 875 doi: 10.1016/j.jallcom.2016.07.292
[25]
Sze S M. Physics of semiconductor devices. 2nd ed. New York: Wiley, 1981
[26]
Lee K N, Cao X A, Abernathy C R, et al. Effects of thermal stability of GaN epi-layer on the Schottky diodes. Solid-State Electron, 2000, 44(7): 1203 doi: 10.1016/S0038-1101(00)00041-1
[27]
Rhoderick E H, Williams R H. Metal semiconductor contacts. 2nd ed. Oxford: Clarendon Press, 1988
[28]
Tung R T. Electron transport at metal –semiconductor interfaces: general theory. Phys Rev B, 1992, 45(23): 13509 doi: 10.1103/PhysRevB.45.13509
[29]
Crowell C R. The physical significance of the anomalies in Schottky barriers. Solid-State Electron, 1977, 20(3): 171 doi: 10.1016/0038-1101(77)90180-0
[30]
Cheung S K, Cheung N W. Extraction of Schottky diode parameters from forward current-voltage characteristics. Appl Phys Lett, 1986, 49(2): 85 doi: 10.1063/1.97359
[31]
Chattopadhyay S, Bera L K, Ray S K, et al. Extraction of interface state density of Pt/p-strained-Si Schottky diode. Thin Solid Films, 1998, 335(1/2): 142
[32]
Chattopadhyay P. A new technique for the determination of barrier height of Schottky barrier diodes. Solid-State Electron, 1995, 38(3): 739 doi: 10.1016/0038-1101(94)00167-E
[33]
Bouiadjra W B, Kadaoui M A, Saidane A, et al. Influence of annealing temperature on electrical characteristics of Ti/Au/GaAsN Schottky diode with 0.2% nitrogen incorporation. Mater Sci Semicond Process, 2014, 22: 92 doi: 10.1016/j.mssp.2014.01.041
[34]
Lien C D, So F C T, Nicolet M A. An improved forward I–V method for nonideal Schottky diodes with high series resistance. IEEE Trans Electron Dev, 1984, 31(10): 1502 doi: 10.1109/T-ED.1984.21739
[35]
Aubry V, Meyer F. Schottky diodes with high series resistance: limitations of forward I-V methods. J Appl Phys, 1994, 76(12): 7973 doi: 10.1063/1.357909
[36]
Fontaine C, Okumura T, Tu K N. Interfacial reaction and Schottky barrier between Pt and GaAs. J Appl Phys, 1983, 54(3): 1404 doi: 10.1063/1.332165
[37]
Song Y P, Van Meirhaeghe R L, Laflere W H, et al. On the difference in apparent barrier height as obtained from capacitance–voltage and current–voltage–temperature measurements on Al/p-InP Schottky barriers. Solid-State Electron, 1986, 29(6): 633 doi: 10.1016/0038-1101(86)90145-0
[38]
Werner J H, Guttler H. Barrier inhomogeneities at Schottky contacts. J Appl Phys, 1991, 69(3): 1522 doi: 10.1063/1.347243
[39]
Gullu O, Turut A. Electrical analysis of organic interlayer based metal/interlayer/semiconductor diode structures. J Appl Phys, 2009, 106(10): 103717 doi: 10.1063/1.3261835
[40]
Card H C, Rhoderick E H. Studies of tunnel MOS diodes I. Interface effects in silicon Schottky diodes. J Phys D, 1971, 4(29): 1589
[41]
Kolnik J, Ozvold M. The influence of inversion surface layers on the evaluation of the interface state energy distribution from Schottky diode I-V characteristics. Phys Stat Sol A, 1990, 122: 583 doi: 10.1002/(ISSN)1521-396X
[42]
Kar S, Dahlke W E. Interface states in MOS structures with 20-40 Å thick SiO2 films on nondegenerate Si. Solid-State Electron, 1972, 15(2): 221 doi: 10.1016/0038-1101(72)90056-1
[43]
Aydogan S, Saglam M, Turut A. The effects of the temperature on the some parameters obtained from current-voltage and capacitance-voltage characteristics of polypyrrole/n-Si structure. Polymer, 2005, 46(2): 563 doi: 10.1016/j.polymer.2004.11.006
[44]
Forrest S R. Ultrathin organic films grown by organic molecular beam deposition and related techniques. Chem Rev, 1997, 97(6): 1793 doi: 10.1021/cr941014o
[45]
Yeargan J R, Taylor H L. The Poole-Frenkel effect with compensation present. J Appl Phys, 1968, 39(12): 5600 doi: 10.1063/1.1656022
[46]
Lee H D. Characterization of shallow silicided junctions for sub-quarter micron ULSI technology-extraction of silicidation induced Schottky contact area. IEEE Trans Electron Devices, 2000, 47(4): 762 doi: 10.1109/16.830991
[47]
Janardhanam V, Lee H K, Shim K H, et al. Temperature dependency and carrier transport mechanisms of Ti/p-type InP Schottky rectifiers. J Alloys Compd, 2010, 504 (1): 146 doi: 10.1016/j.jallcom.2010.05.074
[48]
Ashok Kumar A, Rajagopal Reddy V, Janardhanam V, et al. Electrical properties of Pt/n-type Ge Schottky contact with PEDOT: PSS interlayer. J Alloys Compd, 2013, 549: 18 doi: 10.1016/j.jallcom.2012.09.085
[49]
Rajagopal Reddy V, Janardhanam V, Ju J W, et al. Electrical properties of Au/Bi0.5Na0.5TiO3-BaTiO3/n-GaN metal–insulator–semiconductor (MIS) structure. Semicond Sci Technol, 2014, 29(7): 075001 doi: 10.1088/0268-1242/29/7/075001
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    G. Nagaraju, K. Ravindranatha Reddy, V. Rajagopal Reddy. Electrical transport and current properties of rare-earth dysprosium Schottky electrode on p-type GaN at various annealing temperatures[J]. Journal of Semiconductors, 2017, 38(11): 114001. doi: 10.1088/1674-4926/38/11/114001
    G. Nagaraju, K. R. Reddy, V. R. Reddy. Electrical transport and current properties of rare-earth dysprosium Schottky electrode on p-type GaN at various annealing temperatures[J]. J. Semicond., 2017, 38(11): 114001. doi:  10.1088/1674-4926/38/11/114001.
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    Received: 27 January 2017 Revised: 04 May 2017 Online: Uncorrected proof: 30 October 2017Accepted Manuscript: 13 November 2017Published: 01 November 2017

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      G. Nagaraju, K. Ravindranatha Reddy, V. Rajagopal Reddy. Electrical transport and current properties of rare-earth dysprosium Schottky electrode on p-type GaN at various annealing temperatures[J]. Journal of Semiconductors, 2017, 38(11): 114001. doi: 10.1088/1674-4926/38/11/114001 ****G. Nagaraju, K. R. Reddy, V. R. Reddy. Electrical transport and current properties of rare-earth dysprosium Schottky electrode on p-type GaN at various annealing temperatures[J]. J. Semicond., 2017, 38(11): 114001. doi:  10.1088/1674-4926/38/11/114001.
      Citation:
      G. Nagaraju, K. Ravindranatha Reddy, V. Rajagopal Reddy. Electrical transport and current properties of rare-earth dysprosium Schottky electrode on p-type GaN at various annealing temperatures[J]. Journal of Semiconductors, 2017, 38(11): 114001. doi: 10.1088/1674-4926/38/11/114001 ****
      G. Nagaraju, K. R. Reddy, V. R. Reddy. Electrical transport and current properties of rare-earth dysprosium Schottky electrode on p-type GaN at various annealing temperatures[J]. J. Semicond., 2017, 38(11): 114001. doi:  10.1088/1674-4926/38/11/114001.

      Electrical transport and current properties of rare-earth dysprosium Schottky electrode on p-type GaN at various annealing temperatures

      DOI: 10.1088/1674-4926/38/11/114001
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      • Corresponding author: E-mail: reddy_vrg@rediffmail.com (V.Rajagopal Reddy)
      • Received Date: 2017-01-27
      • Revised Date: 2017-05-04
      • Published Date: 2017-11-01

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