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J. Semicond. > 2017, Volume 38 > Issue 8 > 084001

SEMICONDUCTOR DEVICES

30 nm T-gate enhancement-mode InAlN/AlN/GaN HEMT on SiC substrates for future high power RF applications

P. Murugapandiyan1, , S. Ravimaran2 and J. William3

+ Author Affiliations

 Corresponding author: P.Murugapandiyan, Email:murugavlsi@gmail.com

DOI: 10.1088/1674-4926/38/8/084001

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Abstract: The DC and RF performance of 30 nm gate length enhancement mode (E-mode) InAlN/AlN/GaN high electron mobility transistor (HEMT) on SiC substrate with heavily doped source and drain region have been investigated using the Synopsys TCAD tool. The proposed device has the features of a recessed T-gate structure, InGaN back barrier and Al2O3 passivated device surface. The proposed HEMT exhibits a maximum drain current density of 2.1 A/mm, transconductance gm of 1050 mS/mm, current gain cut-off frequency ft of 350 GHz and power gain cut-off frequency fmax of 340 GHz. At room temperature the measured carrier mobility (μ), sheet charge carrier density (ns) and breakdown voltage are 1580 cm2/(V·s), 1.9×1013 cm-2, and 10.7 V respectively. The superlatives of the proposed HEMTs are bewitching competitor or future sub-millimeter wave high power RF VLSI circuit applications.

Key words: HEMTback-barrierrecessed gatecut-off frequencyregrown ohmic contactshort channel effects

The preeminent physical property of GaN such as larger band gap (3.44 eV), breakdown field $(3.3\times{10}^{6}$ V/cm), higher saturation velocity $(2.7\times{10}^{7} $ cm/s), good thermal conductivity (1.95 Wcm$^{-1}$K$^{-1})$ and higher mobility $(\mu_{\rm n}=2000$ and $ \mu_{\rm h}=200 $ cm$^{2}$/(V$\cdot$s)) has captivated the attentions of researchers to develop high power with high frequency very large scale integration (VLSI) circuits for next generation RF applications such as high power amplifiers for space research, remote sensing, imaging systems and low noise wide bandwidth amplifiers design. In the last two decades several research progresses have been made to improve the DC and microwave characteristics of GaN based HEMT[1-37]. Initially the AlGaN/GaN based HEMTs are developed for high power applications such as solid state power amplifiers and high power switching applications[1-6]. To extend the operating frequency of the GaN based HEMTs for sub milli-meter wave applications it is necessary to scale down the device dimension, sub 50 nm gate length ($L_{\rm g}$), very thin barrier thickness ( < 15 nm), and less than 1 $\mu$m drain to space separation. The thinner barrier layer with Al-rich AlGaN/GaN HEMTs are induced strain related issues at the interface between AlGaN/GaN due to lattice mismatch[7-10] and the ultra-scaled (below 50 nm) AlGaN/GaN HEMTs failed to mitigate the short channel effects[10] due to poor aspect ratio $L_{\rm g}/d$ where $d$ is the gate to channel distance.

The nearly lattice matched In$_{\rm 0.17}$Al$_{\rm 0.83}$N/GaN quantum well, reduced the strain related defects and achieved the drain current density of 3.3 A/mm, which is 205% higher than the Al$_{\rm 0.2}$Ga$_{\rm 0.8}$N/GaN [11], because of its larger polarization induced charge carrier density (in the order of ${10}^{13}$ cm$^{-2})$ in the two dimensional electron gas (2DEG) region. In recent years InAlN/GaN HEMTs have captivated a lot of attention for high power sub-millimetre wave RF applications because of their good thermal stability, high current gain cut-off frequency & power gain cut-off frequency, minimum short channel effects and low leakage current with high drain current on/off ratio[15-26]. The higher cut-off frequencies ($f_{\rm t}$ and $ f_{\rm max})$ are achieved in InAlN/GaN based HEMTs by empowering aggressive scaling of device dimension with minimum gate leakage current, suppressed short channel effects (SCEs) and higher carrier mobility[15-26]. The key factors to improve the RF performances of HEMTs with high power are minimum gate access resistance $(R_{\rm g})$, gate capacitances $(C_{\rm gd}$ and $ C_{\rm gs}$ and fringing capacitances), low contact resistances, improved sheet resistance $(R_{\rm sh}$) and high electron mobility in the channel. The aforementioned factors are achieved by various techniques such as ultra-scaled device dimension[21], recessed T-gate[23], regrown ohmic contacts[12], back barrier[19], spacer layer[20], and surface passivation[23].

An 80 nm gate length SiN passivated T gate InAlN/GaN HEMT on SiC manifested a maximum $ f_{\rm t}/f_{\rm max}$ of 114/177 GHz[18]. The ultra scaled 30 nm gate length conventional rectangular gate InAlN/GaN HEMT with InGaN back barrier demonstrated a record current gain cut-off frequency of 300 GHZ with minimum short channel effects (SCEs)[19]. The Al$_{\rm 2}$O$_{\rm 3}$ passivated 30 nm conventional rectangular gate length InAlN/GaN HEMTs had shown a cut-off frequency of 245 GHz, further the gate leakage current is reduced by oxygen plasma treatment[33]. The heavily doped source/drain region n$^+$ GaN regrown ohmic contacts with 30 nm conventional rectangular gate InAlN/GaN HEMTs obtained a cut-off frequency $(f_{\rm \mathrm{t}})$ of 370 GHz with improved drain current density of 1.5 A/mm and on/off ratio of more than six orders of magnitude, however high SCEs (DIBL) is observed[20]. A 25 nm thickness Al$_{\rm 2}$O$_{\rm 3}$ passivated T-shaped recessed gate length of 0.15 $\mu $m InAlN/GaN HEMTs grown on SiC substrate and it demonstrated a maximum transconductance of 675 mS/mm, current density of 1.5 A/mm, and $f_{\rm t}/f_{\rm max}$ of 65/87 GHz[23]. Gate recessed SiN passivated 150 nm length T shaped gate enhancement mode InAlN/AlN/GaN had shown a maximum drain current density of 1.9 A/mm and $g_{\rm m}$ of 800 mS/mm with high on/off of 107[24]. The enhanced carrier confinement, higher mobility 1300 cm$^{2}$/(V$\cdot$s), improved sheet resistance $R_{\rm sh}$ of 420 $\Omega /\square$ with reduced buffer leakage is demonstrated by using 3 nm InGaN back barrier in Ref. [18].

In this work, we have proposed and investigated the DC and RF characteristics of a novel 30 nm heavily doped (n$^+$ GaN & n$^+$ InGaN) regrown ohmic source/drain regions with recessed T-gate InAlN/AlN/GaN HEMT. To obtain the superior carrier confinement in 2DEG with enhanced carrier mobility In$_{\rm 0.15}$Ga$_{\rm 0.85}$N is used as the back barrier in our model. The parasitic gate capacitances are majorly suppressed by Al$_{\rm 2}$O$_{\rm 3}$ passivation. The higher aspect ratio is maintained ($L_{\rm g}/d$) by recessed gate structure to effectively reduce the short channel effects. The proposed novel $L_{\rm g}=30$ nm InAlN/GaN HEMT device shows an excellent improvement in DC and RF characteristics. The peak drain current density $I_{\rm d}$ of 2.1 A/mm, a record $g_{\rm m}$ of 1050 mS/mm, $ f_{\rm t}$ of 350 GHz and $f_{\rm max}$ of 340 GHz recorded. The gate leakage current and SCEs are majorly suppressed and an improved on/off ratio is achieved. These high DC and RF performances of the HEMT were obtained because of extreme reduction in the device parasitic resistances and capacitances with high sheet charge carrier density and mobility in the 2DEG channel.

The InAlN/AlN/ AlN HEMT device structure is depicted in Fig. 1. The HEMT device is grown on SiC substrate for good thermal stability and a lattice matched 10 nm In$_{\rm 0.17}$Al$_{\rm 0.83}$N layer is used as the barrier layer. The induced spontaneous and piezoelectric polarization electric field provides an improved sheet charge carrier density of ${1.9\times10}^{13}$ cm$^{-2}$ in the 2DEG and also the higher band gap of the barrier limits the gate leakage current and mitigates the short channel effects in the device. The source and regions are formed by heavily doped GaN (40 nm) followed by In$_{\rm 0.15}$Ga$_{\rm 0.85}$N (40 nm) with Si in the order of $\sim {10}^{20}$ cm$^{-3}$ to reduce the total contact resistance to less than 0.1 $\Omega $ · mm and the ohmic contacts are formed by Si/Ge/Ti/Al/Mo/Au metal stack. A T shaped gate structure having the head size of 400 nm, stem height of 140 nm with 30 nm footprint is designed, which lifts off a wide cross sectional gate area with a smaller gate length, and the Schottky contact is formed by a Ni/Pt/Au metal stack. The drain to source spacing is 160 nm. A very thin 1 nm AlN spacer layer is placed between the barrier and channel, which improves the electron mobility in the 2DEG by reducing the interface roughness and alloy disorder scattering at the interface of InAlN/GaN. A 30 nm GaN is used for the channel region and 3.5 nm InGaN is used as a back barrier, which helps to confine more electrons in the channel due its effective conduction band notch at the interface with the GaN channel and also it contributed for higher carrier mobility in the 2DEG ($\sim 1500$ cm$^{2}$/(V$\cdot$s)). Moreover the buffer leakage current is mitigated by the InGaN back barrier. The Fe doped 1450 nm GaN used as the buffer layer is grown on SiC substrate. In order to reduce the parasitic capacitances of the device, the device surface is fully passivated by the 10 nm Al$_{\rm 2}$O$_{\rm 3}$ layer, which greatly helped the device for high frequency operation. Usually Si$_{\rm 3}$N$_{\rm 4}$ is the commonly used passivation layer to avoid the current collapses, but a larger thickness of passivation layer is needed, which will increases the gate capacitance particularly gate-drain capacitance ($C_{\rm gd}$). In this model a 10 nm Al$_{\rm 2}$O$_{\rm 3}$ is used as the passivation layer, which assists to unfasten the dispersion effects and it provides a route to good transport property in the 2DEG.

Figure  1.  30 nm InAlN/AlN/GaN HEMT with InGaN back-barrier.

The polarization charge distribution and conduction band offset diagram of InAlN/AlN/GaN/InGaN are depicted in Figs. 2(a)and 2(b)respectively. Due to induced piezoelectric polarization between InGaN and GaN there will be a sharp raised potential barrier that is formed at the back of the 2DEG channel. Such a sharp notch helps to confine the electron in a better manner in the channel region and also it mitigates the buffer leakage current. A very thin 1 nm wide bangap (6.01 eV) AlN spacer is placed between barrier and channel to offer large effective conduction band offset and also it helps to reduce the gate leakage current.

Figure  2.  Polarization charge distribution and energy band structure of InAlN/AlN/GaN HEMT with InGaN back barrier.

Enhancement mode HEMT offers many more benefits for circuit designers than depletion mode HEMT in terms of flexibility in design and integration. The depletion mode HEMT circuits dissipated more power due to large threshold voltage, while the low threshold E-HEMT circuit dissipates low power. Moreover the simplicity in the circuit design makes high package density with high speed VLSI circuits. Another highlight of E-HEMT is that, it will not conduct under zero voltage which helps to intercept the device from damage due to accidental switching on the device. However, high speed direct coupled field effect transistor logic uses both D-mode HEMT and H-mode HEMT to attain the low power dissipation as well as high speed VLSI circuits.

Fig. 3 shows the sheet charge carrier density variation with InAlN barrier thickness. The higher the thickness of barrier layer gives better sheet charge density. In our work a 10 nm barrier layer offered a sheet carrier density of ${1.9\times10}^{13}$ cm$^{-2} $ and the measured mobility of electron in the 2DEG is 1580 cm$^{2}$/(V$\cdot$s).

Figure  3.  Sheet charge density dependency on InAlN barrier layer thickness.

Fig. 4 shows the $I$-$V$ current characteristics of $L_{\rm g} = 30$ nm and $w=2\times20\thinspace \mu$m E-mode InAlN/AlN/GaN HEMT. The simulation result gives a supreme current density of 2.1 A/mm at $V_{\rm gs}=2$ V and the device is pinched off perfectly at $V_{\rm gs}=-1$ V. This higher current density is achieved mainly because of the enhanced mobility with greater sheet charge carrier density in 2DEG channel. The lattice matched InAlN/GaN with 1 nm SiN spacer provides effective conduction band offset and it reduces strain induced surface defects at the interface. Moreover, the InGaN notch helps to provide the better confinement of charge carrier in the channel and also it suppressed the buffer leakage current in the device. A 10.6 V off state breakdown voltage is measured by varying the gate-source voltage depicted in Fig. 5 for $I_{\rm ds}=10$ mA/mm.

Figure  4.  $I$-$V$ characteristics of $L_{\rm g} = 30$ nm and $w=2\times20$ $\mu $m E-mode InAlN/AlN/GaN HEMT.
Figure  5.  $V_{\rm gs}$-$V_{\rm ds}$ breakdown sweeps with fixed drain current 10 mA/mm of $L_{\rm g} = 30$ nm and $w=2\times20$ $\mu $m E-mode InAlN/AlN/GaN HEMT.

The subthreshold and gate leakage current characteristics of $L_{\rm g} =30$ nm and $w=2\times20$ $\mu $m E-mode InAlN/AlN/GaN HEMT are shown in Fig. 8. The gate leakage current depends on the band gap of the barrier and channel materials. The higher band gap InAlN with AlN space layer effectively suppressed the gate leakage current in the order of $1\times{10}^{-13}$ A/mm. The drain current on/off ratio is observed as ${10}^{7}$ at $V_{\rm ds}=3$ V.

Figure  8.  Cut-off frequencies versus gate bias of $L_{\rm g} =30$ nm and $w=2\times20\thinspace \mu $m E-mode InAlN/AlN/GaN HEMT for $V_{\rm ds}=2$ V.

The transfer characteristic of the HEMT device is shown in Fig. 6. A peak transconductance ($g_{\rm m})$ of 1050 mS/mm is obtained at $V_{\rm gs}=1.5$ V for fixed $V_{\rm ds}=2$ V. The measured current gain cut-off frequency ($f_{\rm t}$) and power gain cut-off frequency ($f_{\rm max}$) of $L_{\rm g}=30$ nm InAlN/AlN/GaN E-HEMT are 350 and 340 GHz, respectively. The obtained values are the best cut-off frequencies of Enhancement mode InAlN/GaN HEMTs with high current density of 2.1 A/mm and low gate leakage current among any materials so far from the best of authors knowledge. The higher $f_{\rm t}$ and $f_{\rm max}$ is obtained because of the low ohmic contacts resistance achieved by heavily doped (n$^+$ GaN followed by n$^+$ InGaN) source/drain regions has direct contacts with the channel, combined with $\sim 55$ nm drain and source access region. The features of the recessed T-gate structure suppress the short channel effects (SCEs), escalate transconductance ($g_{\rm m}$) and the attenuated drain conductance also contributes to achieve this higher $f_{\rm t}$ and $f_{\rm max}$. The cut-off frequency variation with gate source voltage is depicted in Fig. 7. The expression for $f_{\rm t}$ and $f_{\rm max}$ are written as follows:

Figure  6.  Dependences of $g_{\rm m }$ and $I_{\rm d}$ on the gate bias of $L_{\rm g} = 30$ nm and $w=2\times20$ $\mu $m E-mode InAlN/AlN/GaN HEMT.
Figure  7.  Subthreshold and gate leakage current characteristics of $L_{\rm g} = 30$ nm and $w=2\times20$ $\mu $m E-mode InAlN/AlN/GaN HEMT.

Current gain cut-off frequency:

ft=gm/gds2π[Cgs+Cgd+1gds+Rs+Rd+Cgdgmgds(Rs+Rd)],

(1)

Power gain cut-off frequency:

fmax=ft2(Rs+Rg)gds+2πftRgCgd,

(2)

where the source resistance $R_{\rm s}=\frac{R_{\rm c}}{w} + \frac{R_{\rm sh} L_{\rm GS}}{w} $ and drain resistance $R_{\rm d}=\frac{R_{\rm c}}{w} +\frac{R_{\rm sh} L_{\rm SD}}{w} $. $R_{\rm c}$ and $R_{\rm sh}$ are the contact resistance and channel sheet resistance respectively. $L_{\rm GS}$ and $L_{\rm SD}$ are gate to source and gate to drain spacing respectively. $w$ is the width of the gate. $R_{\rm g} $ is the gate access resistance and $g_{\rm ds}$ represents drain conductance. The gate to drain capacitance is $C_{\rm gd}$ which is an essential parameter for high frequency operation of the device. A 10 nm Al$_{\rm 2}$O$_{\rm 3}$ passivated device surface reduces the overall gate capacitance in our proposed device model. The measured transconductance $g_{\rm m}$, drain conductance $g_{\rm ds}$, gate-source capacitance $C_{\rm gs}$, gate-drain capacitance $C_{\rm gd}$, source resistance $R_{\rm s}$, drain resistance $R_{\rm d}$, subthreshold slope (SS), sheet resistance ($R_{\rm sh}$) and on resistance $(R_{\rm on}$) of the 30 nm recessed T gate InAlN/AlN/GaN HEMT device with heavily doped source and regions are 1.05 S/mm, 0.2 S/mm, 410 fF/mm, 115 fF/mm, 0.03 $\Omega \cdot $mm, 0.5 $\Omega \cdot $mm, 85 mV/dec, 420 $\Omega /\square$ and 0.23 $\Omega \cdot $mm respectively. To compare our proposed device performance with the experimental result, we listed all possible InAlN/GaN based HEMTs details in Table 1. InAlN/GaN MOSHEMT[21] exhibits an $f_{\rm t}$ of 400 GHz but the obtained power gain cut-off frequency is 33 GHz only. In this work the proposed novel 30 nm InAlN/GaN HEMT has shown an $f_{\rm t}$, $\thinspace f_{\rm max}$ of 350 and 340 GHz respectively. These high cut-off frequencies with improved drain current density (2.1 A/mm), record transconductance ${(g}_{\rm m})$ of 1050 mS/mm, high on/off ratio ${10}^{7}$ and low gate leakage current ${10}^{-12}$ A/mm have shown that the proposed InAlN/AlN/GaN HEMT will be a promising candidate for future forerunner of high speed and high power millimetre wave RF applications. In future the gate leakage current of the device will be further reduced by using a high dielectric insulator between the gate and barrier (MOSHEMT/MISHEMT).

Table  1.  $I_{\rm d}, g_{\rm m}, f_{\rm max}, f_{\rm t}, $gate leakage current and on/off ratio for various gate length InAlN/GaN HEMTs.
DownLoad: CSV  | Show Table

In this article, we have proposed and demonstrated the DC and RF characteristics of a novel 30 nm recessed T-gate InAlN/AlN/GaN HEMT with InGaN back barrier. The device features are heavily doped (n$^+$ GaN and n$^+$ InGaN) source/drain regions with Al$_{\rm 2}$O$_{\rm 3}$ passivated device surface, which helped us to reduce contact resistances and gate capacitances of the device to uplift the RF characteristics of the HEMTs. $L_{\rm g}$ of 30 nm HEMT shows a current gain cut-off frequency $f_{\rm t}$ of 350 GHz and power gain cut-off frequency $f_{\rm max}$ of 340 GHz. The peak drain current density of 2.1 A/mm is achieved by offering effective conduction band offset by using AlN spacer and InGaN back barrier to enhance the sheet charge carrier density in the 2DEG region $({1.9\times10}^{13}$ cm$^{-2})$ with higher carrier mobility of 1580 cm$^{2}$/(V$\cdot$s). The recessed T-gate structure reduced the short channel effects (86 mV/dec) by minimizing the gate to channel separation. The superior DC and RF performance of the proposed HEMT device is expected to be the most optimistic applicant for future high power millimetre wave RF applications.

Acknowledgement: The authors acknowledge the Nanoelectron Devices and Circuits Laboratory of Electronics and Communication Engineering Department at M.A.M College of Engineering, Trichy-India for providing the facilities to carry out this research work.


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Fig. 1.  30 nm InAlN/AlN/GaN HEMT with InGaN back-barrier.

Fig. 2.  Polarization charge distribution and energy band structure of InAlN/AlN/GaN HEMT with InGaN back barrier.

Fig. 3.  Sheet charge density dependency on InAlN barrier layer thickness.

Fig. 4.  $I$-$V$ characteristics of $L_{\rm g} = 30$ nm and $w=2\times20$ $\mu $m E-mode InAlN/AlN/GaN HEMT.

Fig. 5.  $V_{\rm gs}$-$V_{\rm ds}$ breakdown sweeps with fixed drain current 10 mA/mm of $L_{\rm g} = 30$ nm and $w=2\times20$ $\mu $m E-mode InAlN/AlN/GaN HEMT.

Fig. 8.  Cut-off frequencies versus gate bias of $L_{\rm g} =30$ nm and $w=2\times20\thinspace \mu $m E-mode InAlN/AlN/GaN HEMT for $V_{\rm ds}=2$ V.

Fig. 6.  Dependences of $g_{\rm m }$ and $I_{\rm d}$ on the gate bias of $L_{\rm g} = 30$ nm and $w=2\times20$ $\mu $m E-mode InAlN/AlN/GaN HEMT.

Fig. 7.  Subthreshold and gate leakage current characteristics of $L_{\rm g} = 30$ nm and $w=2\times20$ $\mu $m E-mode InAlN/AlN/GaN HEMT.

Table 1.   $I_{\rm d}, g_{\rm m}, f_{\rm max}, f_{\rm t}, $gate leakage current and on/off ratio for various gate length InAlN/GaN HEMTs.

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    P. Murugapandiyan, S. Ravimaran, J. William. 30 nm T-gate enhancement-mode InAlN/AlN/GaN HEMT on SiC substrates for future high power RF applications[J]. Journal of Semiconductors, 2017, 38(8): 084001. doi: 10.1088/1674-4926/38/8/084001
    P. Murugapandiyan, S. Ravimaran, J. William. 30 nm T-gate enhancement-mode InAlN/AlN/GaN HEMT on SiC substrates for future high power RF applications[J]. J. Semicond., 2017, 38(8): 084001. doi: 10.1088/1674-4926/38/8/084001.
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    Received: 07 September 2016 Revised: 07 February 2017 Online: Published: 01 August 2017

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      P. Murugapandiyan, S. Ravimaran, J. William. 30 nm T-gate enhancement-mode InAlN/AlN/GaN HEMT on SiC substrates for future high power RF applications[J]. Journal of Semiconductors, 2017, 38(8): 084001. doi: 10.1088/1674-4926/38/8/084001 ****P. Murugapandiyan, S. Ravimaran, J. William. 30 nm T-gate enhancement-mode InAlN/AlN/GaN HEMT on SiC substrates for future high power RF applications[J]. J. Semicond., 2017, 38(8): 084001. doi: 10.1088/1674-4926/38/8/084001.
      Citation:
      P. Murugapandiyan, S. Ravimaran, J. William. 30 nm T-gate enhancement-mode InAlN/AlN/GaN HEMT on SiC substrates for future high power RF applications[J]. Journal of Semiconductors, 2017, 38(8): 084001. doi: 10.1088/1674-4926/38/8/084001 ****
      P. Murugapandiyan, S. Ravimaran, J. William. 30 nm T-gate enhancement-mode InAlN/AlN/GaN HEMT on SiC substrates for future high power RF applications[J]. J. Semicond., 2017, 38(8): 084001. doi: 10.1088/1674-4926/38/8/084001.

      30 nm T-gate enhancement-mode InAlN/AlN/GaN HEMT on SiC substrates for future high power RF applications

      DOI: 10.1088/1674-4926/38/8/084001
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      • Corresponding author: P.Murugapandiyan, Email:murugavlsi@gmail.com
      • Received Date: 2016-09-07
      • Revised Date: 2017-02-07
      • Published Date: 2017-08-01

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