Fig. 1.
(Color online) Yield loss map induced by the CT open issue.
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| Citation: |
Zhangli Liu, Bingkui He, Fei Meng, Qiang Bao, Yuhong Sun, Shaojun Sun, Guangwei Zhou, Xiuliang Cao, Haiwei Xin. Contact etch process optimization for RF process wafer edge yield improvement[J]. Journal of Semiconductors, 2019, 40(12): 122402. doi: 10.1088/1674-4926/40/12/122402
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Z L Liu, B K He, F Meng, Q Bao, Y H Sun, S J Sun, G W Zhou, X L Cao, H W Xin, Contact etch process optimization for RF process wafer edge yield improvement[J]. J. Semicond., 2019, 40(12): 122402. doi: 10.1088/1674-4926/40/12/122402.
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Contact etch process optimization for RF process wafer edge yield improvement
DOI: 10.1088/1674-4926/40/12/122402
More Information
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Abstract
Radio-frequency (RF) process products suffer from a wafer edge low yield issue, which is induced by contact opening. A failure mechanism has been proposed that is based on the characteristics of a wafer edge film stack. The large step height at the wafer’s edge leads to worse planarization for the sparse poly-pattern region during the inter-layer dielectric (ILD) chemical mechanical polishing (CMP) process. A thicker bottom anti-reflect coating (BARC) layer was introduced for a sparse poly-pattern at the wafer edge region. The contact open issue was solved by increasing the break through (BT) time to get a large enough window. Well profile and resistance uniformity were obtained by contact etch recipe optimization.-
Keywords:
- bottom anti-reflect coating,
- break through,
- wafer edge,
- planarization
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References
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