1. Introduction

Power devices have been widely used in switch control and high-power circuit driving, which play an essential role in multiple applications. With the fast development of electric automobiles, fifth-generation (5G) networks, and the internet of things (IoT), silicon material has generally reached its physical limit, and traditional silicon-based power electronics have been hard to satisfy the demand for many ultra-high power applications. Wide bandgap semiconductor materials such as silicon carbide (SiC), gallium nitride (GaN), diamond, and gallium oxide (Ga₂O₃) possess attractive properties and are considered potential candidates for next-generation power devices^{[1, 2]}. Among these, Ga₂O₃ has attracted significant attention due to its large critical electric field of 8 MV/cm and the high Baliga’s figure of merit (BFOM) of more than 3000^[3-5]. The BFOM of Ga₂O₃ is much higher than that of Si, SiC, and GaN, indicating that Ga₂O₃-based devices can achieve higher breakdown voltage (BV) and lower specific on-resistance (R_on,sp) simultaneously. Table 1 compares the critical material parameters of several competing power electronics semiconductors. There are five phases of Ga₂O₃ labeled as α, β, γ, δ and ε. The monoclinic β-Ga₂O₃ is the most stable^[6] and is commonly studied in fabricating power devices. Large-size β-Ga₂O₃ bulk substrates can be synthesized by the low-coat melt-growth methods, such as floating zone (FZ) and edge-defined film-fed growth (EFG)^{[7, 8]}, providing significant benefits for future mass production of electronic devices. Furthermore, high-quality homoepitaxy of β-Ga₂O₃ thin films can be realized by halide vapor phase epitaxy (HVPE), metal-organic chemical vapor deposition (MOCVD), and molecular beam epitaxy (MBE)^[9-14].

N-type conduction in β-Ga₂O₃ with a tunable doping concentration ranging from 10¹⁵ to 10¹⁹ cm⁻³ has been demonstrated by Si and Sn doping^{[8, 15, 16]}. However, due to the large activation energy of acceptors and the large self-trapping energy of holes^{[17, 18]}, p-type conduction in β-Ga₂O₃ is proven difficult. The absence of p-type β-Ga₂O₃ is a major obstacle limiting the design of β-Ga₂O₃-based bipolar devices. A bipolar structure usually possesses low leakage current, high thermal stability, and good surge handling capability, which is much preferred over the unipolar configuration for power electronics. However, due to the lack of p-type doping, the studies of β-Ga₂O₃ power devices are mainly focused on unipolar devices such as Schottky barrier diodes (SBDs) and metal–oxide–semiconductor field effect transistors (MOSFETs)^[19-22]. To overcome the obstacle, one possible solution is employing other p-type semiconductors and forming heterojunctions with β-Ga₂O₃. Abundant investigations have been demonstrated on β-Ga₂O₃ heterojunctions using various p-type semiconductors such as SiC, GaN, SnO, Cu₂O, CuI, and NiO^[23-30]. Among these, NiO is considered the most promising choice owing to its wide bandgap of 3.6-4.0 eV and controllable p-type doping with decent mobility^{[25-27, 31]}. Very recently, the first kilovolt-class NiO/β-Ga₂O₃ heterojunction pn diodes (HJDs) were successfully demonstrated by sputtering a p-NiO layer on β-Ga₂O₃, which opened up a route toward future bipolar operation of β-Ga₂O₃ power electronics^[27]. Following that, remarkable progress has been made by many researchers in improving the BFOM of the NiO/β-Ga₂O₃ HJDs. Furthermore, the NiO/β-Ga₂O₃ heterojunction has been adopted into other device architectures such as junction barrier Schottky diodes (JBSs)^[32], junction field effect transistors (JFETs)^[33] and edge termination structures^{[34, 35]}.

This paper presents a detailed overview of the recent progress in NiO/β-Ga₂O₃ heterojunction power devices. Section 2 discusses the construction and characterization of the sputtered NiO/β-Ga₂O₃ heterojunction, focusing on its crystallinity, band structure, and carrier transport property. Section 3 and section 4 deal with the device technologies, including the NiO/β-Ga₂O₃ HJDs, JBSs, and JFETs, as well as the edge terminations and super-junctions based on the NiO/β-Ga₂O₃ heterojunction.

2. Construction and characterization of NiO/β-Ga₂O₃ heterojunction

2.1 Construction of high-voltage NiO/β-Ga₂O₃ heterojunction

NiO thin films can be grown by several techniques such as sol-gel spin coating, radio frequency (RF) sputtering, pulsed laser deposition (PLD), atomic layer deposition (ALD), MBE, and thermal oxidation of Ni^{[31, 36-42]}. The initial study of NiO/β-Ga₂O₃ heterojunction was reported by Kokubun et al. in 2016^[26]. A Li-doped NiO layer was grown on a 0.4-mm-thick (100) β-Ga₂O₃ single-crystal substrate (n = 5 × 10¹⁷ cm⁻³) by the sol-gel spin coating technique. The device schematic and current–voltage (I–V) characteristics of the sol-gel NiO/β-Ga₂O₃ HJD are shown in Fig. 1. The device exhibited a high rectifying ratio of over 10⁸ at ±3 V. However, the large R_on,sp of approximate 1 Ω·cm² and low BV of 46 V indicated a suboptimal device performance for power applications. Tadjer et al.^[41] reported the construction of NiO/β-Ga₂O₃ HJDs using sputtered and ALD-deposited NiO thin films. However, the fabricated devices showed either a very low forward current or a high reverse leakage current, which failed to satisfy the demand for power electronics. The NiO/β-Ga₂O₃ heterojunctions have also been fabricated by PLD for UV detection applications^[43-46], yet the problem of high reverse current still existed.

In 2020, the first kilovolt-class NiO/β-Ga₂O₃ HJD was successfully demonstrated by sputtering a p-NiO thin film onto an epitaxial n⁻-β-Ga₂O₃ drift layer^[27], as shown in Fig. 2. The NiO films were sputtered from a NiO target at room temperature and 3 mTorr pressure in a mixture of Ar/O₂ ambient with RF power of 150 W. According to the Hall measurement, the hole concentration and hall mobility of the NiO were 1 ×10¹⁹ cm⁻³ and 0.24 cm²/(V·s), respectively. The fabricated NiO/β-Ga₂O₃ HJDs featured a high BV of over 1 kV with an ultra-low leakage current of below 1 μA/cm², representing a key milestone for the development of NiO/β-Ga₂O₃ heterojunction-based power devices. So far, RF sputtering has become the optimal method for depositing NiO on β-Ga₂O₃, and continuous breakthrough has been achieved in the NiO/β-Ga₂O₃ heterojunction-based power devices.

2.2 Crystallinity and band structure of sputtered NiO/β-Ga₂O₃ heterojunction

X-ray diffraction (XRD) measurements and high-resolution transmission electron microscopy (HRTEM) observations have been used to investigate the crystallinity of the sputtered NiO/β-Ga₂O₃ heterojunction. Several reports have identified that the sputtered NiO films were polycrystalline even after a post-deposition annealing (PDA) process^{[25, 27, 47-49]}. As shown in Fig. 3(a), three diffraction peaks located at around 37.3°, 43.2° and 63.1° could be observed in the XRD patterns of the sputtered NiO films, which corresponded to the (111), (200), and (220) planes of NiO, respectively^[48]. The HRTEM image in Fig. 3(b) also revealed that the sputtered NiO film was generally polycrystalline with fine nanocrystalline grains and a seamless contact was formed at the NiO/β-Ga₂O₃ heterojunction interface. By comparing the XRD patterns and HRTEM images of the NiO films sputtered on ($\bar201$), (001), and (010) oriented β-Ga₂O₃ substrates, a very recent study pointed out that the crystallinity of sputtered NiO showed no strong dependency on the β-Ga₂O₃ substrate orientations^[47].

It is known that the band structure of a heterojunction is crucial for device design and application. The band alignment of the heterojunction greatly influences its carrier transport properties. Thus it is essential to characterize the band offset at the heterojunction interface accurately. Gong et al.^[50] reported a type-II band alignment of the sputtered NiO/β-Ga₂O₃ heterojunction with a valence band offset (VBO) of 3.60 eV and conduction band offset (CBO) of 2.68 eV. In comparison, Zhang et al.^[45] reported a VBO value of 2.1 eV and CBO value of 0.9 eV for a similar sputtered NiO/β-Ga₂O₃ heterojunction. The band alignment of the sputtered NiO/β-Ga₂O₃ heterojunctions varies from each other, which could be determined by many factors, such as the strain, defects/vacancies, interfacial contamination, crystal orientation, and so on. Due to the crystalline anisotropy, β-Ga₂O₃ possesses anisotropic material properties and devices with different orientations show different performances^{[14, 51-56]}. The substrate orientation-dependent band alignment of the NiO/β-Ga₂O₃ heterojunctions was investigated by an X-ray photoelectron spectroscopy (XPS) analysis^[47]. The VBO values of the NiO/β-Ga₂O₃ heterojunctions were extracted to be 2.12 ± 0.06, 2.44 ± 0.07, and 2.66 ± 0.07 eV for ($\bar201$), (001) and (010) β-Ga₂O₃ substrates, respectively. The determined energy band diagrams of the NiO/β-Ga₂O₃ heterojunctions with different β-Ga₂O₃ orientations are shown in Fig. 4. The influence of a PDA process on the band alignment of the NiO/β-Ga₂O₃ heterojunction was studied by Xia et al.^[57]. As shown in Fig. 5, the band offsets monotonically increased while the bandgap of NiO decreased with the elevated annealing temperature up to 600 °C. The results also indicated a possible unstable performance of the NiO/β-Ga₂O₃ heterojunction device at high temperatures.

2.3 Carrier transport mechanisms in the sputtered NiO/β-Ga₂O₃ heterojunction

Several groups have identified different forward conduction mechanisms rather than the conventional diffusion theory in the NiO/β-Ga₂O₃ heterojunction^{[48, 50, 58]}. Due to the high barrier height against carriers in the type-II band structure, the diffusion and emission currents in the NiO/β-Ga₂O₃ heterojunction are negligible at a low forward bias. When the low forward bias is below 1.6 V, interface recombination has been revealed to be the dominant forward conduction mechanism of the NiO/β-Ga₂O₃ heterojunctions^{[48, 50]}, in which the electrons and holes recombined once they meet at the heterojunction interface by overcoming the barrier of the depletion region. For an asymmetric heterojunction, the interface recombination current can be expressed as the following equation according to Grundmann et al.^[59]

$${J}_{\mathrm{r}\mathrm{e}\mathrm{c}\mathrm{o}}\left(V\right)=\zeta \frac{qV}{kT}\sqrt{\frac{2kT}{{\epsilon }_{\mathrm{s}}}{\sigma }_{\mathrm{n}}{\sigma }_{\mathrm{p}}{n}_{0}}\mathrm{e}\mathrm{x}\mathrm{p}\left(\frac{-q{V}_{\mathrm{b}\mathrm{i}}}{2kT}\right)\mathrm{e}\mathrm{x}\mathrm{p}\left(\frac{qV}{2kT}\right) ,$$

where $k$ and $T$ are the Boltzmann’s constant and the temperature, ${\epsilon }_{\mathrm{s}}$ and ${n}_{0}$ are the dielectric constant and electron concentration of the β-Ga₂O₃, ${V}_{\mathrm{b}\mathrm{i}}$ is the build-in potential in the NiO/β-Ga₂O₃ heterojunction, and ${\sigma }_{\mathrm{n}}$ and ${\sigma }_{\mathrm{p}}$ are the conductivities of β-Ga₂O₃ and NiO, respectively. The coefficient ${\zeta }=1$ or ${\zeta }\to 0$ represents the fast or low recombination occurring at the heterojunction interface. A near-zero ${\zeta }$ of ~0.008 was obtained for the sputtered NiO/β-Ga₂O₃ heterojunction at room temperature, indicating a relatively slow recombination. Given ${V}_{\mathrm{b}\mathrm{i}}=1.9\;\mathrm{V}$ from C–V measurement, Gong et al.^[50] also revealed a small ${\zeta }$ which decreased from 5.4 × 10⁻⁴ to 3.4 × 10⁻⁶ when the applied bias varied from ${V}_{\mathrm{b}\mathrm{i}}/2$ to ${V}_{\mathrm{b}\mathrm{i}}$. Due to the large VBO (> 2 eV) of the NiO/β-Ga₂O₃ heterojunction, the holes in NiO can hardly be injected across the barrier at a low forward bias. Instead, the electrons contributed by β-Ga₂O₃ recombine with the holes in the valence band of NiO through interfacial states, which forms the interface recombination current.

When the forward bias increased (>1.6 V), a trap-assisted multistep tunneling model became the dominant conduction mechanism in the NiO/β-Ga₂O₃ heterojunction^[48]. The model can be described by the following equation^{[60, 61]}

$${J}_{\mathrm{t}\mathrm{u}\mathrm{n}\mathrm{n}\mathrm{e}\mathrm{l}}\left(V\right)={J}_{\mathrm{t}0}\mathrm{e}\mathrm{x}\mathrm{p}\left(\alpha {\theta }^{\tfrac{1}{2}}V\right) ,$$

$${J}_{\mathrm{t}0}=B{N}_{\mathrm{T}}\mathrm{e}\mathrm{x}\mathrm{p}\left(-\alpha {\theta }^{\tfrac{1}{2}}{V}_{\mathrm{b}\mathrm{i}}\right) ,$$

where $\alpha =\left(4/3\hslash \right)\sqrt{{m}^{*}{\epsilon }_{\mathrm{s}}/{N}_{\mathrm{D}}}$, ${N}_{\mathrm{D}}$ is the doping concentration of β-Ga₂O₃, $\theta$ is the number of steps of the tunneling, and $B$ is a constant. Fig. 6(a) shows the fitting result of the two models, as mentioned above, with the experimental forward I–V characteristics of the NiO/β-Ga₂O₃ heterojunction diodes at different temperatures, which exhibits a good agreement. The extracted $\mathrm{l}\mathrm{n}\left({J}_{\mathrm{t}0}\right)$ as a function of temperature showing good linearity further confirmed the multistep tunneling mechanism, as shown in Fig. 6(b). It is speculated that the grain boundaries in the sputtered NiO films act as trap states^[48] and facilitate electron tunneling^[62]. In addition, according to the deep-level transient spectroscopy (DLTS) measurements carried out at a fixed reverse voltage of –6 V, a pulse filling voltage of +1 V, a pulse filling time of 0.02 ms, and a frequency of 1 Hz^[63], an electron trap corresponded to the forward trap-assisted tunneling was observed in the spectra for the NiO/β-Ga₂O₃ heterojunction. This electron trap (E_T) exhibited an energy level of E_C – 0.67 eV, which is related to Fe substituting for Ga on a tetrahedral site (Fe_GaI)^[64]. It has been confirmed that Fe impurities unintentionally doped in the EFG bulk β-Ga₂O₃ during the crystal growth^[65], which might be the possible origination of the E_T. Fig. 7 shows the energy band diagrams and carrier dynamics of the NiO/β-Ga₂O₃ heterojunction.

When the forward bias went beyond 3.5 V, a high-level injection phenomenon and corresponding conductivity modulation effect were observed^[62]. This is because the energy band of NiO is pulled down at a very high forward bias, which leads to a significantly reduced hole barrier height at the Fermi tail; thus, the holes in NiO can travel across the heterojunction interface and diffuse into β-Ga₂O₃. DLTS spectra performed at the same condition in Ref. [63] but with frequency of 1200 Hz exhibited two positive peaks, which are the distinctive contribution by hole traps (H_T). The detection of H_T further confirmed the hole injection from p-NiO to β-Ga₂O₃ in the heterojunction.

3. Device technology based on the NiO/β-Ga₂O₃ heterojunction

Possessing the advantages of low leakage current, high thermal stability, and good surge handling capability, bipolar power devices based on pn junctions have always attracted great attention, which promotes the blossoming of the NiO/β-Ga₂O₃ heterojunction-based power electronics. Very recently, a high BFOM of 13.21 GW/cm² was successfully demonstrated in an 8-kV class sputtered NiO/β-Ga₂O₃ HJD, representing the highest BFOM value among all the reported β-Ga₂O₃ power devices^[62]. Besides, high-performance JBSs^[32] and JFETs^[33] based on the NiO/β-Ga₂O₃ heterojunctions have been developed by several groups. Implementation of the NiO/β-Ga₂O₃ heterojunctions as edge terminations and super-junctions in various types of β-Ga₂O₃ power devices has been promised^{[34, 35]}. Fig. 8 lists some milestones in developing state-of-the-art NiO/β-Ga₂O₃ heterojunction based power devices.

3.1 NiO/β-Ga₂O₃ heterojunction diodes

As previously mentioned, the first 1 kV NiO/β-Ga₂O₃ HJDs^[27] were fabricated using an 8-μm thick lightly doped (n = 4 × 10¹⁶ cm⁻³) β-Ga₂O₃ drift layer grown on a conductive (n = 2.6 × 10¹⁸ cm⁻³) (001) substrate with a 200-nm thick sputtered p-NiO layer (p = 1 × 10¹⁹ cm⁻³) on top. The device yielded a BV of 1059 V with an ultra-low leakage current of below 10⁻⁶ A/cm² before breakdown and a low R_on,sp of 3.5 mΩ·cm², leading to a BFOM of 0.32 GW/cm². The results pave the way for developing high-performance bipolar power devices based on the NiO/β-Ga₂O₃ heterojunctions.

The trap states located within the sputtered NiO and at the heterojunction interface significantly affect the device performance of a NiO/β-Ga₂O₃ HJD. A PDA process has been proven as an effective method to improve the crystallinity of the sputtered NiO and reduce the defects density at the hetero-interface^{[48, 49, 66]}. Moreover, the PDA process could also improve the metal-to-NiO Ohmic contact. Through a precisely controlled PDA process, Hao et al.^[66] demonstrated the performance improved NiO/β-Ga₂O₃ HJDs. After annealing at 350 °C for 3 min in a nitrogen atmosphere, the R_on,sp of the HJD was reduced from 5.4 to 4.1 mΩ·cm² while the BV increased from 900 to 1630 V, leading to an improved BFOM from 0.16 to 0.65 GW/cm² as shown in Fig. 9. The ideality factor was extracted to be 3.02 and 1.27 for devices without and with annealing, and the calculated interface trap density (N_t) were about 1.04 × 10¹² and 1.33 × 10¹¹ eV⁻¹, respectively.

Various field plate (FP) structures have been implemented in the NiO/β-Ga₂O₃ HJDs to manage the electric field. Gong et al.^[67] reported a double-layered insulating FP structure. The first layer insulator was a 350-nm-thick SiN_x layer deposited by plasma enhanced chemical vapor deposition (PECVD) at 300 °C and the second layer insulator was a 40-nm-thick Al₂O₃ layer grown by ALD at 300 °C. Subsequently, a 300 nm NiO layer with a length of field plate (L_FP) of 10 μm was deposited by RF sputtering. A PDA process was carried out at 300 °C in air for 1 h. The device demonstrated a BV of 1036 V and a R_on,sp of 5.4 mΩ·cm². A small-angle bevel FP structure was proposed for the NiO/β-Ga₂O₃ HJDs by Wang et al.^[25], as shown in Fig. 10. To realize the small-angel bevel FP, a 1-μm thick SiO₂ was deposited by PECVD and dry etched using a photoresist mask formed by a variable-temperature photoresist reflow technique. The device featured a BV of up to 2410 V with a low R_on,sp of 1.12 mΩ·cm², yielding a high BFOM of 5.18 GW/cm². The bevel angle of the FP, the dielectric layer thickness, and the dimension of the FP are the critical parameters. With well-optimized parameters, this FP structure can offer great potential for fabricating high-voltage β-Ga₂O₃ power devices.

Another approach to improve the performance of the NiO/β-Ga₂O₃ HJDs is using a double-layered NiO film^[68]. As shown in Fig. 11(a), the sputtered NiO film was composed of a 350-nm-thick lower-side lightly doped layer (p = 5.1 × 10¹⁷ cm⁻³) and a 100-nm-thick upper-side heavily doped layer (p = 3.6 × 10¹⁹ cm⁻³). Compared with the single-layered device (S2), the double-layered device (S1) demonstrated an enhanced BV from 0.94 to 1.86 kV, as shown in Fig. 11(b). Liao et al.^[49] thoroughly optimized the double-layered NiO/β-Ga₂O₃ HJDs by performing both experimental study and technology computer-aided design (TCAD) simulation. It was revealed that the bottom lightly doped NiO layer could smoothen the electric field, while the upper heavily doped NiO layer can reduce the R_on,sp by lowering the metal-to-NiO contact resistance. In addition, verified by the TCAD simulation, the electric field peak of the double-layered NiO/β-Ga₂O₃ HJDs located at the edge of the p⁺-NiO layer rather than the p⁻-NiO layer, and enlarging the dimension of the bottom p⁻-NiO layer can effectively suppress the electric field peak, as shown in Fig. 12. The influence of the bottom NiO layer thickness was studied by Li et al.^[69]. The device schematic is shown in Fig. 13(a). The upper NiO layer (p = 2.6 × 10¹⁹ cm⁻³) was fixed at 10 nm, while the thickness of the bottom NiO layer (p = 3 × 10¹⁸ cm⁻³) ranged from 10 nm to 80 nm. The BV showed a negative correlation with the thickness of the bottom NiO layer, as shown in Fig. 13(b).

Zhou et al.^[70] demonstrated a novel beveled-mesa NiO/β-Ga₂O₃ HJD, as shown in Fig. 14. By precisely adjusting the gap between the mask and β-Ga₂O₃ wafer as well as the declination angle of the NiO target with respect to the substrate surface normal, the double-layered NiO film with a small beveled angle was formed. The fabricated large-area (1 mm²) HJDs performed a low R_on,sp of 2.26 mΩ·cm² and a high BV of 2.04 kV, leading to a BFOM of 1.84 GW/cm². A remarkable BV of 8.32 kV was achieved in the NiO/β-Ga₂O₃ HJD^[62] by employing the double-layered NiO structure and advanced edge terminations of an FP and an Mg-implanted guard ring. Ion implantation in the device periphery to form a high-resistivity region can effectively relieve the electric field crowing effect and improve the breakdown voltage in power devices. Fig. 15 shows the schematic and I–V characteristics of the device. A low R_on,sp of 5.24 mΩ·cm² was obtained for the 8.32 kV HJD, and the BFOM of 13.21 GW/cm² was the highest value among all the reported β-Ga₂O₃ power devices so far.

3.2 NiO/β-Ga₂O₃ heterojunction JBS

Schottky barrier diodes (SBDs) possess properties of low turn-on voltage and fast switching speed. Meanwhile, p–n diodes have the advantages of low leakage current and good surge handling capability. The JBS devices can combine the advantages of SBDs and p–n diodes.

The first NiO/β-Ga₂O₃ heterojunction JBS was demonstrated by Lv et al.^[32]. Fig. 16 shows the schematic and the I–V characteristics of the JBS device. The NiO layer (p = 1 × 10¹⁸ cm⁻³) with a thickness of 60 nm was formed by thermally oxidizing Ni metal. The fabricated JBS showed a low V_on of ~1 V, slightly higher than the reference SBD (~0.7 V). The BV of the JBS was as high as 1715 V, far superior to that of the reference SBD (655 V). However, these JBSs suffered from a huge reverse leakage current under a high electric field, and the leakage mechanism was determined to be a Pool-Frenkel (PF) emission, which refers to the electric-field-enhanced thermal excitation of electrons from a trapped state into a continuum of electronic states^[71]. According to the Arrhenius plots of the reverse leakage current vs. 1000/T measured at various reverse biases, the emission barrier height was determined to be E_C – 0.72 eV below the conduction band, which is consistent with the energy level of gallium vacancies (V_Ga)^[72]. It indicated that in such a JBS structure, the NiO/β-Ga₂O₃ heterojunction failed to suppress the reverse leakage current through the Schottky contact region. To address this issue, the NiO/β-Ga₂O₃ heterojunction JBSs with etched fin structures were developed^[73]. The fin structures on the β-Ga₂O₃ drift layer were firstly formed by reactive ion etching (RIE), and then the trenches between the fins were filled with sputtered p-NiO, as schematically shown in Fig. 17(a). With the fin structures, the pn heterojunction depleted laterally at the reverse bias, which lowered the density of free carriers left in the β-Ga₂O₃ channel; thus, the fin structures would help to suppress the leakage current through the Schottky contact region. Three JBSs with different fin widths were fabricated. The V_on and R_on,sp of the JBSs were measured to be 1.7 V/2.45 mΩ·cm², 1.5 V/1.94 mΩ·cm², and 1.45 V/1.91 mΩ·cm², for the fin width of 1.5, 3, and 5 μm, respectively. Since the forward I–V characteristics of a JBS should be mainly determined by its Schottky contact region, the device had a greater proportion of Schottky contact area showed a closer value of V_on and R_on,sp to an SBD. However, the measured BV of the JBSs did not show a strong dependence on the fin width. Though the reverse leakage current was partially suppressed by using the fin structures, the dry etching process produced high-density deep-level traps at the β-Ga₂O₃ surface, which might introduce excess leakage current^{[74, 75]}. A post-etching treatment process would be helpful to remove the defects from the etched β-Ga₂O₃ surface, for example, surface treatment using a hot tetramethylammonium hydroxide (TMAH) solution^[76]. At present, high reverse leakage current is still the remaining issue that hinders the development of the NiO/β-Ga₂O₃ heterojunction JBSs.

3.3 NiO/β-Ga₂O₃ heterojunction JFET

The development of lateral β-Ga₂O₃ field-effect transistors (FETs) has achieved remarkable progress^[77-80]. However, the reported device performance is still far from the projected material limitation of β-Ga₂O₃. The channel doping level and thickness must be carefully designed to ensure an effective channel pinch-off in a lateral FET and obtain a good balance between the R_on,sp and BV. The β-Ga₂O₃ JFETs based on the NiO/β-Ga₂O₃ heterojunctions have been proposed by Wang et al. for the first time^[33], as shown in Fig. 18(a). The employed p-NiO gate provided a vertical depletion to the β-Ga₂O₃ channel and facilitated the channel pinch-off. Therefore, a relatively thicker channel and higher channel doping concentration could be used in the device to minimize the R_on,sp without sacrificing the BV. On the other hand, the lateral depletion of the heterojunction in the channel could help smooth the electric field at the drain-side-gate-edge and boost the BV of the JFETs. The fabricated devices exhibited a low R_on,sp of 3.19 mΩ·cm² and a high BV of 1115 V, yielding a BFOM of 0.39 GW/cm². Using a gate-recessed architecture, a normally-off operation has been realized in the NiO/β-Ga₂O₃ heterojunction JFETs^[81]. As schematically shown in Fig. 18(b), the 200 nm channel was recessed down to 80 nm in the gate region by an inductively coupled plasma (ICP) etching process, and a 50 nm p-NiO gate was sputtered. A positive threshold voltage (V_th) of +0.9 V was achieved.

4. NiO/β-Ga₂O₃ heterojunction-based edge terminations and super-junctions

Various edge termination techniques, such as FP^{[19, 82]}, ion-implanted GR^{[20, 83, 84]}, and thermally oxidized terminations^[85], have been developed to relieve the electric field crowding and enhance the BV of the β-Ga₂O₃ power device.

The field limiting ring (FLR) using p–n junctions is an effective structure to suppress the electric field peak at the device edge, which is commonly used in SiC power devices^[86]. An improved BV has been reported in β-Ga₂O₃ SBDs by adopting a NiO/β-Ga₂O₃ heterojunction-based FLR^[71], as shown in Fig. 19(a). Compared to the device without the FLR, the average BV was increased from 0.43 to 0.75 kV. A TCAD simulation was carried out to investigate the influence of the NiO/β-Ga₂O₃ heterojunction FLR on the electric field distribution of the devices under a reverse bias. As shown in Fig. 19(b), the electric field spread out into the FLR structures, and the crowding of the electric field at the device edge was effectively mitigated.

The p-NiO guard ring has also been employed in β-Ga₂O₃ SBDs^[34]. As shown in Fig. 20, a 300-nm trench was etched in the β-Ga₂O₃ drift layer and subsequently filled with sputtered p-NiO (p = 1 × 10¹⁸ cm⁻³) to construct the guard ring. The SBDs showed an improved BV of 1130 V by introducing the p-NiO guard ring compared to a BV of 300 V for SBDs without the guard ring. By further implementation of an FP structure, the BV was boosted to 1860 V.

Super-junction (SJ) is a promising technique to manage the electric field in power devices^[87-90], which has been successfully commercialized in Si devices^{[91, 92]} and also introduced in GaN and SiC devices^[93-95]. With an alternative arrangement of p-type and n-type stripes, the SJ structure can uniform the electric field distribution in the drift layer, relying on the charge balance principle^[96]. Wang et al.^[35] demonstrated a novel super-junction β-Ga₂O₃ MOSFET based on the NiO/β-Ga₂O₃ heterojunctions, as shown in Fig. 21. Trenches in the β-Ga₂O₃ drift layer were formed using ICP etching and then filled with sputtered NiO (p = 1 × 10¹⁸ cm⁻³). Compared with a co-fabricated conventional MOSFET, the SJ MOSFETs exhibited an improved BFOM by 4.86 times.

5. Summary and prospects

Still at the very early stage of development, the NiO/β-Ga₂O₃ heterojunction has shown great potential for application in β-Ga₂O₃ power electronics. In this review, we summarized the state-of-the-art device technology and development of NiO/β-Ga₂O₃ heterojunction power devices. Despite the encouraging progress, some crucial issues still exist for practical application.

First, developing high-quality β-Ga₂O₃ material, including both the substrate and the epi film, is the cornerstone for future improvement of the power devices. The unintentional impurities, defects, and dislocations within the β-Ga₂O₃ crystal can significantly affect the device performances regarding leakage current, electrical conductivity, device reliability, etc.

The device structure optimization is essential to further enhance the device voltage blocking capability. As mentioned, the double NiO layers, FP structures, and ion-implanted GRs are all feasible solutions. Still, further improvements in the details of these structures remain. For example, the dielectric layer’s materials, thickness, and deposition process are critical factors for an FP structure. As for the ion-implanted GRs, more investigation is needed on different implanted ions, the profiles of the implanted region, and the post-implantation annealing conditions.

Trap states at the NiO/β-Ga₂O₃ heterojunction interface can cause large hysteresis and excess reverse leakage current. As mentioned, a PDA process is an effective method to improve the heterojunction interface quality. However, the forward conduction can be degraded by annealing since the hole concentration of the NiO layer decreases. Surface treatment using solutions or a plasma process is also a practical method to remove the defects at the β-Ga₂O₃ surface and realize a high-quality hetero-interface.

Device reliability is very important for the commercial application of the NiO/β-Ga₂O₃ heterojunction power devices, especially at high temperatures. The sputtered NiO layer usually faces a thermal stability issue, whose hole concentration usually reduces at high temperatures. The reliability verifications for the NiO/β-Ga₂O₃ heterojunction devices are still lacking and awaiting future exploration.

Acknowledgements

This work was supported by the Guangdong Basic and Applied Basic Research Foundation under Grant No. 2022A1515012163.