Abstract: A coupled level shift structure is designed and implemented.Compared with conventional S level shift structures,the two high electric fields of an LDMOS and a high voltage junction termination (HVJT) introduced by a high voltage interconnection (HVI) are avoided. The HV level shift and isolation of the high side and low side are directly coupled,so the chip size is reduced.The isolated resistor in the C level shift structure can be increased by a JFET consisting of a Pwell,Nepi,and P-sub,and the short of a poly field plate (PFP) in the LDMOS and HVJT is avoided by use of a metal field plate (MFP).Using HV single poly single metal (SPSM) CMOS DMOS (CD) technology developed by us,we experiment on a 1000V 3-phase power MOS gate driver circuit with C level shift structure successfully.The experimental results show that the maximal breakdown voltage of the C level shift structure is 1040V,which is 62.5% higher than that of a conventional S structure.The 1000V HVIC can be used for the HV application of AC220V and AC380V.

Key words: coupled,  level shift,  HVI,  HVIC