| Citation: |
Xie Weifu, Li Yongming, Zhang Chun, Wang Zhihua. CMOS Implementation of an RF PLL Synthesizer for Use in RFID Systems[J]. Journal of Semiconductors, 2008, 29(8): 1595-1601.
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Xie W F, Li Y M, Zhang C, Wang Z H. CMOS Implementation of an RF PLL Synthesizer for Use in RFID Systems[J]. J. Semicond., 2008, 29(8): 1595.
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CMOS Implementation of an RF PLL Synthesizer for Use in RFID Systems
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Abstract
An integrated RF PLL frequency synthesizer for use in RFID systems is presented.It integrates a voltage-controlled oscillator,phase frequency detector,charge pump,high-frequency dual-modulus divider,and digital programmable divider.The frequency synthesizer was implemented in a 0.18μm CMOS process.It uses a 13MHz crystal oscillator as input.The output range is from 860 to 960MHz,the phase margin is -123dBc/1MHz,the frequency step is 200kHz,and the change frequency is within 150μs.-
Keywords:
- RFID,
- PLL,
- frequency synthesizer,
- RF,
- CMOS
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References
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Proportional views
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