| Citation: |
Gao Yong, Yu Ningmei, Chen Lijie, Tang Shanqiang. Design and Implementation of a Novel Chip for Full Digital Three-Phase SPWM Signal Generation[J]. Journal of Semiconductors, 2006, 27(1): 126-131.
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Gao Y, Yu N M, Chen L J, Tang S Q. Design and Implementation of a Novel Chip for Full Digital Three-Phase SPWM Signal Generation[J]. Chin. J. Semicond., 2006, 27(1): 126.
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Design and Implementation of a Novel Chip for Full Digital Three-Phase SPWM Signal Generation
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Abstract
A novel full digital three-phase sinusoidal pulse width modulation (SPWM) signal generation chip is presented for power electronics.A modified direct digital frequency synthesis(DDS),pipelined structure,and time-sharing ROM are adopted in the chip,for saving chip area and ensuring high performance and speed.The system clock is set at 24MHz,the output signals defined in 65536 equal steps cover a bandwidth from DC to 4kHz,and the multifunction is designed for control.The chip is fabricated by using charted 0.35μm COMS technology.The test results show that the chip achieves the design specification-
Keywords:
- DDS,
- SPWM,
- look-up table,
- COMS
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References
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Proportional views
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