Chin. J. Semicond. > 2004, Volume 25 > Issue 11 > 1409-1415
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精确时延模型下满足时延约束的缓冲器数目最小化的算法(英文)

张轶谦 , 洪先龙 , 周强 and 蔡懿慈

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Key words: 缓冲器插入, 互连优化, 布图, VLST

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    Received: 19 August 2015 Revised: Online: Published: 01 November 2004

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      Article Navigation >  Journal of Semiconductors  > 2004  >  25(11): 1409-1415
      张轶谦, 洪先龙, 周强, 蔡懿慈. 精确时延模型下满足时延约束的缓冲器数目最小化的算法(英文)[J]. 半导体学报(英文版), 2004, 25(11): 1409-1415.
      Citation:
      张轶谦, 洪先龙, 周强, 蔡懿慈. 精确时延模型下满足时延约束的缓冲器数目最小化的算法(英文)[J]. 半导体学报(英文版), 2004, 25(11): 1409-1415.
      shu

      • Received Date: 2015-08-19

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