| Citation: |
Wu Dinghe, Shen Meng, Shao Xuefeng, Yu Hongkun. EOS Failure Analysis and Die Attach Optimization[J]. Journal of Semiconductors, 2008, 29(2): 381-386.
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Wu D H, Shen M, Shao X F, Yu H K. EOS Failure Analysis and Die Attach Optimization[J]. J. Semicond., 2008, 29(2): 381.
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EOS Failure Analysis and Die Attach Optimization
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Abstract
To investigate the influence of electrical overstress (EOS) on the reliability of power MOSFETs, failure analysis is employed to assess the reliability of devices, including defects related to solder void, gate openings, and die cracks.After using finite element analysis, a circuit simulation, and a reliability accelerated test, the root cause of EOS is confirmed.EOS resistance of the devices after optimizing the die attach temperature-time curve is compared with that of the devices before the optimization using unclamped inductive loading test.The volume of solder void is observably decreased and EOS resistance is improved after optimization.-
Keywords:
- EOS,
- failure analysis,
- MOSFET,
- die attach,
- process optimization
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References
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Proportional views
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