Homojunction structure amorphous oxide thin film transistors with ultra-high mobility

Rongkai Lu; Siqin Li; Jianguo Lu; Bojing Lu; Ruqi Yang; Yangdan Lu; Wenyi Shao; Yi Zhao; Liping Zhu; Fei Zhuge; Zhizhen Ye

doi:10.1088/1674-4926/44/5/052101

J. Semicond. > 2023, Volume 44 > Issue 5 > 052101

ARTICLES

Homojunction structure amorphous oxide thin film transistors with ultra-high mobility

Rongkai Lu^{1, §}, Siqin Li^{1, §}, Jianguo Lu^{1, 2,}, Bojing Lu¹, Ruqi Yang¹, Yangdan Lu¹, Wenyi Shao¹, Yi Zhao^3,, Liping Zhu^{1, 2}, Fei Zhuge⁴ and Zhizhen Ye^{1, 2,}

+ Author Affiliations

1. State Key Laboratory of Silicon Materials, Key Laboratory for Biomedical Engineering of Ministry of Education, School of Materials Science and Engineering, Zhejiang University, Hangzhou 310027, China
2. Wenzhou Key Laboratory of Novel Optoelectronic and Nano Materials, Institute of Wenzhou, Zhejiang University, Wenzhou 325006, China
3. Department of Electronic Science and Technology, College of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China
4. Ningbo Institute of Materials Technology and Engineering, Chinese Academy of Sciences, Ningbo 315201, China
^§Rongkai Lu and Siqin Li contributed equally to this work.

Author Bio:

Rongkai Lu received his bachelor’s degree and doctor’s degree at State Key Laboratory of Silicon Materials, School of Materials Science and Engineering, Zhejiang University, China. His current research focuses on amorphous oxide semiconductor, flexible thin film transistor and exploring the possibilities of applications for high-performance TFTs in multiple fields.

Siqin Li received his Master’s degree at State Key Laboratory of Silicon Materials, School of Materials Science and Engineering, Zhejiang University, China. His current research focuses on amorphous oxide semiconductor, memristor, thin film transistor and their applications for artificial synapses.

Jianguo Lu has been an associate professor at State Key Laboratory of Silicon Materials, School of Materials Science and Engineering, Zhejiang University, China. His current research focuses on Semiconductor films and transparent electronics, Nanoscale materials and new energies, Coating & biomimetic materials for marine applications. He is Distinguished Young Scholars of Zhejiang Province, China. He is the Member of IEEE. He is the Editorial Board Member of Chinese Chemical Letters and Tungsten. He was awarded 1 Second Prize of National Natural Science Award of China and 3 First Prizes of Science and Technology Award of Zhejiang Province. He was authorized over 50 national invention patents. He published 2 books in Chinese and 1 book chapter in English. He published over 200 SCI papers with citation times over 9000 and H-index of 48. He is the Highly Cited Chinese Researcher.

Yi Zhao received a bachelor’s degree from Nanjing University of Astronautics and Aeronautics, Nanjing, China, in 2000, a master's degree from Zhejiang University, Hangzhou, China, in 2003, and a Ph.D. from the University of Tokyo, Tokyo, Japan, in 2007, all in materials science and engineering. He currently works with Zhejiang University as a full professor. His recent research interests have mainly focused upon advanced-CMOS devices using new channel materials (strained Si/Ge, SiGe, Ge, and III-V materials) and new structures (SOI, FinFET, UTB, and nanowire).

Zhizhen Ye has been an Academician of Chinese Academy of Sciences; Professor at State Key Laboratory of Silicon Materials, School of Materials Science and Engineering, Zhejiang University, China. His current research focuses on Compound semiconductor and optoelectronic materials, Transparent conductive materials, and Semiconductor sensing materials. He is Distinguished Young Scholars of Zhejiang Province, China. He was awarded 1 Second Prize of National Natural Science Award of China, 3 First Prizes of Science and Technology Award of Zhejiang Province, and 2 First Prizes of Science and Technology Award of Ministry of Education of China. He was authorized more than 100 national invention patents. He published 2 books in Chinese and 1 book in English. He published more than 500 papers, cited by over 13000 times with H-index of 63.

Corresponding author: Jianguo Lu, lujianguo@zju.edu.cn; Yi Zhao, yizhao@zju.edu.cn; Zhizhen Ye, yezz@zju.edu.cn

DOI: 10.1088/1674-4926/44/5/052101

Abstract: Amorphous oxide semiconductors (AOS) have unique advantages in transparent and flexible thin film transistors (TFTs) applications, compared to low-temperature polycrystalline-Si (LTPS). However, intrinsic AOS TFTs are difficult to obtain field-effect mobility (μ_FE) higher than LTPS (100 cm²/(V·s)). Here, we design ZnAlSnO (ZATO) homojunction structure TFTs to obtain μ_FE = 113.8 cm²/(V·s). The device demonstrates optimized comprehensive electrical properties with an off-current of about 1.5 × 10^–11 A, a threshold voltage of –1.71 V, and a subthreshold swing of 0.372 V/dec. There are two kinds of gradient coupled in the homojunction active layer, which are micro-crystallization and carrier suppressor concentration gradient distribution so that the device can reduce off-current and shift the threshold voltage positively while maintaining high field-effect mobility. Our research in the homojunction active layer points to a promising direction for obtaining excellent-performance AOS TFTs.

Key words: thin film transistors, homojunction, carrier mobility, amorphous oxides

1. Introduction

In the past decade, amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) have become intensively attractive for the next generation of electronics^[1-3]. In the field of large-area flat panel displays (FPDs), amorphous silicon (a-Si) as an active layer is gradually replaced by AOSs, due to the low field-effect mobility (μ_FE), generally less than (1 cm²/(V·s))^[4]. With the use of n-type AOSs, the higher electrical performance of TFT devices could be achieved, of which practical μ_FE exceeds 5 cm²/(V·s). However, low-temperature poly-silicon (LTPS) TFTs with μ_FE of over 100 cm²/(V·s) are widely used in active-matrix organic light-emitting diode (AMOLED) displays, which are difficult to be replaced by AOS TFTs due to the high field-effect mobility despite serious disadvantages of high cost and non-uniform device properties over large areas^[5]. Accordingly, the need for AOS TFTs with high field-effect mobility is very urgent.

Amorphous indium–gallium–zinc–oxide (a-IGZO) was first reported as a channel material for thin-film transistors in 2004^[6]. For a period of time afterward, the reported μ_FE of AOS TFTs was (5–30 cm²/(V·s))^[7-9]. The dual active layer for TFTs was found to achieve high field-effect mobility effectively. In 2012, Kim et al.^[10]. reported the double-layer structure of HfInZnO/InZnO, with the μ_FE reaching 48 cm²/(V·s). In 2014, Song et al.^[11] reported ZnO/graphene hybrid structure, the device exhibited strikingly high mobility of 329.7 cm²/(V·s), but the other device properties were unsatisfactory. In 2016 and 2018, Choi et al.^[12] and Yang et al.^[13] reported the double-layer structure of AlSnInZnO/InZnO, with the increase of the thickness of InZnO thin layer, the μ_FE of devices increased significantly to 50–60 cm²/(V·s). However, for TFTs with homogeneous uniform AOS active layers, μ_FE of more than 100 cm²/(V·s) has almost not been reported, and most of the reported AOS TFTs with high field-effect mobility exhibited high off-currents (I_off), poor on/off current ratios (I_on/I_off) and excessively negative threshold voltages (V_th).

To solve the problem, we designed a homojunction AOS active layer for TFT device. Although a-IGZO has been widely studied and shown excellent performance^{[14, 15]}, due to insufficient global reserves and the high cost of In and Ga, we chose amorphous ZnSnO (ZTO) instead of InZnO (IZO) based material in this work. It is mainly for the reason that In³⁺ and Sn⁴⁺ have similar electron configurations of 4d¹⁰5s⁰ as the route of carrier transportation in the AOSs, which are the key factor to ensure high field-effect mobility^{[16, 17]}. Aluminum was selected to be the carrier suppressor in amorphous ZnAlSnO (ZATO), because of Al³⁺ with a low standard electrode potential (SEP, –1.66 V), large reserves and strong Al–O bonding energy (512 kJ/mol)^[18]. We successfully prepared TFT devices’ homojunction active layer with the physical manufacturing process of ZATO (unannealed) / ZATO (annealed) / ZTO. The microstructure and electrical properties of the homojunction layer were studied in detail. With the distribution difference of micro-crystallization extent and carrier suppressor concentration in the homojunction layer, the carrier concentration would present distinctive throughout the layer correspondingly. The electrical performance of the homojunction structure TFTs was investigated in detail. The devices achieve μ_FE more than 100 cm²/(V·s), ameliorating other electrical properties including I_off, I_on/I_off ratio and V_th at the same time. A unique carrier transport mechanism through the low carrier suppressor region of the homojunction structure was proposed to explore the high field-effect mobility. The homojunction active layer made of AOS will greatly promote the application of high-performance transparent and flexible electronics.

2. Experimental section

2.1 Preparation of homojunction ZATO active layer TFTs

Bottom-gate, top-contact structure TFTs were fabricated on 300 nm SiO₂/n++Si wafers. The substrates were ultrasonically cleaned respectively with acetone, ethanol, de-ionized water and ethanol for 30 min, and then dried in flowing nitrogen gas before being used. The homojunction channel of ZATO (unannealed) / ZATO (annealed) / ZTO (annealed) was fabricated by Magnetron sputtering (Kurt J. Lesker PVD-75). The targets were prepared from high purity of ZnO (99.99%), SnO₂ (99.99%), and Al₂O₃ (99.99%) powders with the molar ratios of Zn : Sn : Al= 4 : 9 : 0 and Zn : Sn : Al = 3 : 10 : 0.5. The ZTO film was deposited by RF magnetron sputtering with a total Ar&O₂ pressure of 1.5 mTorr (Ar : O₂ = 100 : 30) at 100 W at room temperature for 10 min and annealed at 900 ºC in Ar atmosphere for 1 h. Then, the ZTO film was treated with a pressure 20 mTorr Ar&O₂ plasma (Ar : O₂ = 50 : 50) at 20 W for 10 min. Above the ZTO film, the ZATO film was deposited by RF magnetron sputtering with a total Ar+O₂ pressure of 7.52 mTorr (Ar : O₂ = 100 : 40) at 120 W at room temperature for 10 min and annealed at 500 ºC in Ar atmosphere for 1 h. Then, the ZATO film was cured with a pressure 20 mTorr Ar&O₂ plasma (Ar : O₂ = 50 : 50) at 20 W for 10 min. Afterward, another layer of ZATO was sputtered by RF magnetron sputtering with the same process for 5 min without thermal post-annealing. Finally, 100-nm-thick Al source and drain electrodes were evaporated by electron beam evaporation at room temperature with a metal mask to avoid error of overestimation due to the absence of patterns^[19]. The channel width (W) and length (L) dimensions were patterned W/L = 1000 μm / 200 μm. The 300-nm-thickness SiO₂ and heavily doped n-type Si were used as the gate insulator layer and the gate electrode, respectively. The corresponding process of uniform ZATO thin films deposited on SiO₂/n++Si substrates for the comparative study were also consistent as shown above.

2.2 Characterization of the homojunction structure and device properties

The EDS mapping of the films was carried out by EDAX-Team attached to field-emission scanning electron microscopy (FE-SEM Hitachi S-4800). The cross-sectional microstructure, crystal properties and energy dispersive X-ray (EDX) line profile of the homojunction active layer were obtained by high-resolution transmission electron microscopy (HR-TEM, Tecnai G2 F20 S-Twin). The carrier concentration and electrical resistivity of the films was measured by a Bio-Rad HL5500PC Hall system. The chemical bonding states were investigated by X-ray photoelectron spectroscopy (XPS, Thermo ESCALAB 250Xi). The electrical performances of the TFTs were measured in the dark by an Agilent E5270B semiconductor parameter analyzer.

3. Results and discussion

The elemental distribution of Zn, Sn, Al and O of a ZTO thin film annealed at 900 °C and a ZATO thin film annealed at 500 °C are shown in Fig. S1 of the Supporting Information, as obtained from EDS mapping attached to FE-SEM. The chemical composition in these films measured by EDS is Zn : Sn = 4.35 : 9.12 and Zn : Sn : Al = 6.90 : 20.5 : 1 (in atomic ratio), which are nearly consistent with ratios in the targets. The microstructure of the homojunction layer, as shown in the schematic diagram in Fig. 1(a), can be observed by transmission electron microscopy (TEM). The cross-sectional HRTEM images of the same sample with a 10 nm scale bar and 2 nm scale bar are illustrated in Figs. 1(b) and 1(c), respectively. The inset in Fig. 1(b) illustrates the selected area electron diffraction (SAED) result of the homojunction layer, showing a pattern of mixing polycrystalline (rings) and amorphous (diffuse rings). The thickness of the homojunction layer measured from the HRTEM images is approximately 20 nm. Clearly, there is a transition from amorphous to polycrystalline, from the top to the bottom of the homojunction layer, in which the thickness of the amorphous region is about 5 nm corresponding to the unannealed ZATO films. It is worth emphasizing that the 900 °C annealing only acts on the ZTO layer, which is the main factor for the generation of the polycrystalline structure at the bottom of channel. However, the annealed ZATO layer and the ZTO layer are practically indistinguishable due to the diffusion effect of high-temperature annealing which also leads to a gradient distribution of Al as a carrier suppressor. It is worth emphasizing that an Al-deficient layer is formed in the ZTO part after the diffusion, compared to as-deposited ZATO. Meanwhile, the polycrystalline formation in the active layer could result in high field-effect mobility of TFTs, which were repeatedly demonstrated in previous reports^[20-22].

Fig. 1. (Color online) HRTEM cross-sectional images of the homojunction layer on a SiO₂/Si substrate. (a) Schematic diagram of the TFT device with homojunction amorphous ZnAlSnO active layer. (b) Scale bar, 10 nm, inset: SAED pattern; (c) scale bar, 2 nm. (d, e) Energy dispersive X-ray (EDX) line profile of the homojunction layer.

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Fig. 1(d) exhibits the corresponding energy dispersive X-ray (EDX) line profile of the homojunction layer. Aluminum element is much less than other elements, which makes it not easy to discriminate the distribution of aluminum in Fig. 1(d). Hence, Al is shown separately in Fig. 1(e). Zn, Sn and O elements exhibit stable distributions in the homojunction layer, and the final sharp increase of O ratio is because of SiO₂ insulator. The Al element first stabilizes and then gradually decreases with increasing depth, probably owing to the Al diffusion during high-temperature treatment, which results in that Al³⁺ as carrier suppressor exhibits a decreasing gradient distribution from the top to the bottom layer through the whole layer. This is also the reason why it is named the homojunction active layer. In general, there are two trends in the homojunction layer with depth. One is the increase of micro-crystallization extent, and the other is the decrease of carrier suppressor concentration. It would profoundly affect the electrical performance of the device.

The oxygen vacancies (V_O) are dominant defects of AOSs, which are related to the generation of carriers for charge transport^[23]. To investigate the relative V_O concentration of each film deposited on a SiO₂/Si substrate, X-ray photoelectron spectroscopy (XPS) was used. As shown in Figs. 2(a)–2(c), the O 1s XPS spectra of the ZTO (annealed at 900 °C), ZATO (annealed at 500 °C) and unannealed ZATO thin film were typically divided into three peaks by using a mixed Gaussian-Lorentz function, labeled as O_Ⅰ, O_Ⅱ and O_Ⅲ peaks, respectively, while the other Zn 2p_3/2, Sn 3d_5/2 and Al 2p_3/2 XPS spectra are depicted in Fig. S2 of the Supporting Information. All binding energy data have been calibrated by taking C 1s reference at 284.8 eV for compensation of any charge-induced shifts. The Zn 2p_3/2, Sn 3d_5/2 and Al 2p_3/2 XPS spectra are centered at approximately 1021.6, 486.5, and 73.90 eV, indicating Zn–O, Sn–O and Al–O bonds, respectively. Whereas, the O_Ⅰ peak, located at about 530.3 eV, is conventionally related to O^2– anions surrounded by metallic elements forming metal-O bonds^{[24, 25]}, such as Zn–O, Sn–O and Al–O bonds. The O_Ⅱ peak, located at approximately 531.4 eV, is generally attributed to O^2– anions in oxygen-deficient regions, which is proportional to the concentration of V_O. Although some studies have shown that surface defects such as adsorbed oxygen and hydroxyl (-OH) also generate signals at 531.4 eV, oxygen vacancies dominate for amorphous oxides^{[26, 27]}. The O_Ⅲ peak, located at closely 532.3 eV, is assigned to weakly bound oxygen impurities on the surface^[28], such as CO₂.

Fig. 2. (Color online) XPS spectra of O 1s. (a) ZTO film annealed at 900 °C. (b) ZATO film annealed at 500 °C. (c) ZATO film unannealed. (d) Areal ratios of the three O sub-peaks (O_Ⅰ, O_Ⅱ and O_Ⅲ).

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Therefore, it is veritable to reflect the V_O concentration by means of the area ratio of O_Ⅱ/(O_Ⅰ+O_Ⅱ+O_Ⅲ). The relative fraction of O_Ⅰ, O_Ⅱ and O_Ⅲ peak is compared in terms of their area ratio with different film samples, as indicated in Fig. 2(d). The V_O percentage of ZTO, ZATO annealed and ZATO unannealed are 36.6%, 28.2% and 20.4%, respectively. Considering that the annealed ZTO films and the ZATO films are protected by the unannealed ZATO films at the surface, the total gas adsorption of the surface is reduced (less O_Ⅲ), which indicates that the O_II composition should actually be larger than the measured values. The V_O percentage of ZATO films increases, while the fraction of metal–O bonds (O_Ⅰ area ratio) slightly decreases after annealing, mainly for the reason that the thermal treatment ameliorates the microstructure of ZATO by reducing metal–O bonds (O_Ⅰ)^{[28, 29]} through the formation of grain boundaries. In contact with the source and drain electrodes, the ZATO unannealed at the top of the homojunction layer holds a low V_O concentration comparatively leading to a limited carrier concentration, which may move the Fermi level downward^[30], reduce off-state current and shift the V_th towards the positive direction. In addition, it is worth noting that oxygen deficiencies can mainly form shallow donors and a small amount of deep electron-trap^[31]. The shallow donor states can simultaneously enhance carrier transport capabilities, which is positively related to field-effect mobility, while the deep trap states may cause degradation in carrier transport by an excess of charge trapping after prolonged operation of devices at a certain bias voltage^[32].

Fig. S3 of the Supporting Information lists the carrier concentration and resistivity of the ZATO film unannealed, the ZATO film annealed at 500 °C and the ZTO film annealed at 900 °C. Each sample in Hall measurement is individually deposited on a SiO₂/Si substrate with the same corresponding process parameters for the homojunction layer. The carrier concentration rises by over three orders of magnitude, from 2.4 × 10¹⁶ to 3.7 × 10¹⁹ cm⁻³, after the ZATO film is processed by 500 °C annealing. Thus, the amorphous ZATO film annealed at 500 °C itself shows great potential that it is suitable for preparing TFT devices even as a uniform active layer. However, the ZTO film annealed at 900 °C has a quite high carrier concentration of 1.2 × 10²⁰ cm⁻³, compared to the ZATO films, which could not bring about a proper off-state current or accessible transfer characteristic. Meanwhile, Hall measurement reveals that the heightened carrier conductivity originates from the enhanced carrier concentration, reflecting that the resistivity of the films is inversely proportional to carrier concentration. The high conductivity of ZTO or Al-deficient region results in the fast transport of the gathered electrons away under positive bias. In summary, the gradient increase of carrier concentration is achieved by the decrease of carrier suppressor concentration and micro-crystallization extent increase in the homojunction layer.

To investigate the electrical performance of TFTs with the homojunction layer, bottom-gate TFT devices were fabricated incorporating with unannealed ZATO, in contrast with uniform ZATO (annealed at 500 °C) device. The representative output characteristics of which are shown in Figs. 3(a) and 3(d), respectively. Obvious current saturation is exhibited in the curves. Moreover, there is no current crowding at a low drain–source voltage (V_DS), indicating ohmic contacts at the electrode interface. Homojunction device and homogeneous ZATO device exhibit the same degree of charge trapping. It may be related to gas adsorption on the channel surface, which could be mitigated by encapsulation. Figs. 3(b) and 3(e) exhibit the transfer characteristics of the TFTs at V_DS = 20 V. All the devices illustrate typical n-type features and favorable switching properties. The key characteristics of TFTs are summarized in Table 1. Both TFTs show off-current (I_off) of less than 10^–9 A. Among them, the device with a homojunction structure possesses an order of magnitude lower off-current of about 1.5 × 10⁻¹¹ A than another device due to low carrier concentration at the electrode interface, agreeing with the results of Hall measurements and XPS analysis. The devices fabricated by the homojunction layer have a larger on-current (I_on) at the same time, thus, resulting in better switching performance and higher on/off current ratios (I_on/I_off) of approximately 10⁷. The V_th and saturation mobility (μ_sat) is calculated from drain-source current (I_DS) versus gate bias (V_GS) according to the following Eq. (1):

Fig. 3. (Color online) Electrical characteristics of TFTs with different active layers. (a) Output characteristics, (b) transfer curve at V_DS = 20 V and (c) the corresponding curve of I_DS^1/2 versus V_GS of the TFT device constituted by the homojunction layer. (d–f) TFT with uniform ZATO active layer.

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Table 1. Key electrical parameters of TFT devices with distinct active layer.

Layer structure	I_off (A)	I_on/I_off	V_th (V)	μ_sat (cm²/(V·s))	SS (V/dec)
Homojunction	~1.5 × 10^-11	8.53 × 10⁷	–1.71	113.8	0.372
Uniform ZATO	~4.9 × 10^-10	6.59 × 10⁵	–2.91	22.9	0.896

DownLoad: CSV | Show Table

${I}_{\text{DS}}=\frac{W}{2L}{C}_{\text{i}}{\mu }_{\text{FE}}{\left({V}_{\text{GS}}-{V}_{\text{th}}\right)}^{2},\quad {V}_{\text{DS}}\geqslant {V}_{\text{GS}}-{V}_{\text{th}} ,$

(1)

where C_i is the capacitance per unit area of gate insulator (C_i = ε₀ε_r/d). W and L are the width and length of channel. The curves of I_DS^1/2 versus V_GS are depicted in Figs. 3(c) and 3(f). The V_th of TFT containing the homojunction layer is –1.71 V, while device with uniform ZATO active layer gets a more negative V_th of –2.91 V. The V_th shifts positively due to the lower V_O concentration at the electrode interface. Moreover, devices with the homojunction layer exhibit extremely high saturation mobility of 113.8 cm²/(V·s), compared to the TFT incorporating uniform ZATO with a μ_sat of 22.9 cm²/(V·s), an order of magnitude lower than the former. In parallel device tests, as shown in Table S1, the excellent performance of homojunction TFTs can be reproduced with little fluctuations.

Generally, there are three factors dominating the field-effect mobility of AOS TFTs. The first is the magnitude of 4d¹⁰5s⁰ orbitals overlap for the carrier transport, which could be improved by thermal-related processes such as annealing. The second is the concentration of carrier suppressor, such as Ga, Zr, Nb, Al, etc.^[33-37]. Insufficient carrier suppressor would make V_th unduly negative, while excessive carrier suppressor would exacerbate the carrier scattering effect resulting in mobility decrease. Therefore, it is quite difficult to obtain mobility higher than 100 cm²/(V·s) for TFTs with uniform AOS active layer. The third point is grain boundary concentration. For covalent semiconductors such as polysilicon, carriers need to overcome the potential barrier at the grain boundary through thermal excitation, resulting in increased charge scattering^[38]. The charge scattering in covalent semiconductors intensifies as the grain boundary concentration increases, limiting mobility. However, when it comes to ionic semiconductors dominated by percolation conduction, such as ZTO and ZATO, carriers are able to bypass the barrier at the grain boundary rather than overcome it. In this case, the adverse effect of grain boundaries on mobility will be greatly reduced. The TFT devices using the homojunction active layer break this intrinsic limitation by designing micro crystallization extent and carrier suppression concentration gradient with depth, decoupling channel opening from carrier transport to achieve high field-effect mobility. It provides a new carrier transport mechanism for the channel, which is detailed below. All these make the field-effect mobility of the TFT devices with the homojunction layer improved by an order of magnitude, compared to traditional AOS TFTs^[39-41].

The subthreshold swing (SS) is calculated by the Eq. (2) below^[42]:

$\mathrm{S}\mathrm{S}={\left[\frac{\mathrm{d}\mathrm{log}\left({I}_{\text{DS}}\right)}{\mathrm{d}{V}_{\text{GS}}}\right]}^{-1} .$

(2)

The subthreshold swing (SS) is related to the interfacial trap states of the channel-insulator interface, reflecting the required voltage span of the device from off to on. The SS values of the TFT devices incorporating the homojunction layer and with a uniform ZATO active layer are 0.372 and 0.896 V/dec, respectively. The SS values suggest the homojunction layer has less trap density at the channel-SiO₂ interface than annealed uniform ZATO active layer, probably due to the lack of Al element^[43]. In general, the TFT with the homojunction layer has high field-effect mobility of over 100 cm²/(V·s), and exhibits optimized comprehensive electrical properties with lower I_off, higher I_on/I_off ratio, smaller absolute V_th value and slightly smaller SS value.

To further explain the high field-effect mobility, schematic diagrams of the conducting path of charge carriers in the uniform active layer and the homojunction layer are shown in Fig. 4. In a traditional TFT device, the shape of the "conductive channel" is influenced by the gate voltage. With the increase of a positive V_GS applied on the gate terminal, the majority of carriers begin to accumulate at the interface between the active layer and gate insulator. Meanwhile, the channel resistance from source to drain decreases, until carriers could flow easily. The conducting path of carriers during saturation mode are illustrated in Fig. 4(a). Therefore, saturation mobility (μ_sat) is affected by two processes, not only the carrier velocity conducting in the channel but also the rate of majority carrier accumulation. The carriers conducting path in the homojunction layer differs from the uniform active layer, due to the low resistivity of the Al-deficient bottom layer contacted with the gate insulator.

Fig. 4. (Color online) Conduction mechanism through the homojunction layer. (a) Schematic diagram of the carrier conducting path of a traditional TFT with uniform active layer during saturation mode. (b) Carrier transport model of homojunction structured amorphous oxide TFT.

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We established an applicable model, as shown in Fig. 4(b). The carriers conducting path of the homojunction layer could be summarized as “unannealed ZATO”–“Al-deficient region”–“unannealed ZATO”, which improves the mobility of carriers greatly. According to the existence of micro crystallization and carrier suppression concentration gradient distribution in the homojunction layer, there is a gradient distribution of carrier concentration, which makes it easier and faster for the majority of carriers to accumulate at the gate interface than the device with the uniform active layer. Once the carriers gather, there is unnecessary to form a channel for transmission since carriers would be transported away through the low-resistance Al-deficient region under drain-to-source voltage. It is the main reason for drastically increasing μ_sat by an order of magnitude than the control device. Additionally, the thickness of the active layer has to be limited to a certain range, according to Thomas−Fermi screening^[43]. As the thickness of the unannealed ZATO increases, the effects of trapped charges become shielded, which reduces carrier scattering and therefore increases field-effect mobility. However, further increasing the thickness will increase the resistance^[44]. The charge injection mainly happens in the unannealed ZATO region so that field-effect mobility will be limited by the carrier vertical transport from the electrode interface to the gate interface. The field-effect mobility begins to decrease when further increasing the thickness of the active layer^[45]. Therefore, to maintain high field-effect mobility, the thickness of the homojunction layer has to be suitable.

To verify the above analysis, the overall thickness of the homojunction layer is increased by controlling the sputtering time of unannealed ZATO (0, 5, 7.5, and 10 min). The overall active layer thickness of samples corresponding to 7.5 and 10 min has increased by 13.9% and 27.8% compared to the 5 min sample. The transfer characteristics of the corresponding TFTs at V_DS = 20 V are shown in Fig. S4 of the Supporting Information. With the increase in thickness, the μ_sat decreases to 80.8 cm²/(V·s) (7.5 min) and 10.9 cm²/(V·s) (10 min), which reveals that the overall thickness of the homojunction layer should not exceed a certain limit. This model could be used to explain the mechanism of some other reported TFTs with high field-effect mobility^[46] and provide theoretical support for further improving TFT performance.

4. Conclusion

In summary, we designed amorphous oxide thin-film transistors with the homojunction structure to obtain high field-effect mobility of more than 100 cm²/(V·s). The homojunction active layer is manufactured in the following order: 3 nm ZTO annealed at 900 °C, 10 nm ZATO annealed at 500 °C, and 5 nm ZATO unannealed. It is worth emphasizing that a gradient of the micro-crystallization extent and carrier suppressor concentration is formed in the homojunction layer with depth, which causes the carrier concentration to gradually increase from the electrode interface to the gate interface. Therefore, the device with the homojunction layer demonstrates optimized comprehensive electrical properties with a low I_off of about 1.5 × 10^-11 A, a high I_on/I_off ratio of approximately 8.53 × 10⁷, a V_th of –1.71 V, a high μ_sat of 113.8 cm²/(V·s) and a small SS of 0.372 V/dec. The lower carrier concentration near the electrode interface could reduce off-state current effectively and shift the V_th positively. Moreover, the accumulated carriers could be transported away immediately at V_DS through the low-resistance Al-deficient layer without traditional channel formation resulting in high mobility. Notably, the homojunction active layer opens new opportunities for AOS TFTs with excellent device performance, especially high field-effect mobility.

Acknowledgements

This work was supported by National Natural Science Foundation of China (No. U20A20209), Zhejiang Provincial Natural Science Foundation of China (LD19E020001), Zhejiang Provincial Key Research and Development Program (2021C01030), and "Pioneer" and "Leading Goose" R&D Program of Zhejiang Province (2021C01SA301612).

Appendix A. Supplementary materials

Supplementary materials to this article can be found online at https://doi.org/10.1088/1674-4926/44/052101.

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[5]	Park J S, Maeng W J, Kim H S, et al. Review of recent developments in amorphous oxide semiconductor thin-film transistor devices. Thin Solid Films, 2012, 520, 1679 doi: 10.1016/j.tsf.2011.07.018
[6]	Nomura K, Ohta H, Takagi A, et al. Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors. Nature, 2004, 432, 488 doi: 10.1038/nature03090
[7]	Kamiya T, Nomura K, Hosono H. Origins of high mobility and low operation voltage of amorphous oxide TFTs: Electronic structure, electron transport, defects and doping. J Disp Technol, 2009, 5, 273 doi: 10.1109/JDT.2009.2021582
[8]	Kim J I, Ji K H, Jung H Y, et al. Improvement in both mobility and bias stability of ZnSnO transistors by inserting ultra-thin InSnO layer at the gate insulator/channel interface. Appl Phys Lett, 2011, 99, 122102 doi: 10.1063/1.3643054
[9]	Park S Y, Song J H, Lee C K, et al. Improvement in photo-bias stability of high-mobility indium zinc oxide thin-film transistors by oxygen high-pressure annealing. IEEE Electron Device Lett, 2013, 34, 894 doi: 10.1109/LED.2013.2259574
[10]	Kim H S, Park J S, Jeong H K, et al. Density of states-based design of metal oxide thin-film transistors for high mobility and superior photostability. ACS Appl Mater Interfaces, 2012, 4, 5416 doi: 10.1021/am301342x
[11]	Song W, Kwon S Y, Myung S, et al. High-mobility ambipolar ZnO-graphene hybrid thin film transistors. Sci Rep, 2014, 4, 4064 doi: 10.1038/srep04064
[12]	Choi J H, Yang J H, Nam S, et al. InZnO/AlSnZnInO bilayer oxide thin-film transistors with high mobility and high uniformity. IEEE Electron Device Lett, 2016, 37, 1295 doi: 10.1109/LED.2016.2602284
[13]	Yang J H, Choi J H, Cho S H, et al. Highly stable AlInZnSnO and InZnO double-layer oxide thin-film transistors with mobility over 50 cm²/(V·s) for high-speed operation. IEEE Electron Device Lett, 2018, 39, 508 doi: 10.1109/LED.2018.2805705
[14]	Tari A, Wong W S. Effect of dual-dielectric hydrogen-diffusion barrier layers on the performance of low-temperature processed transparent InGaZnO thin-film transistors. Appl Phys Lett, 2018, 112, 073506 doi: 10.1063/1.5000362
[15]	Zheng Z W, Chen Y C. Improved performances in low-voltage-driven InGaZnO thin film transistors using a SiO₂ buffer layer insertion. Appl Phys A, 2014, 115, 937 doi: 10.1007/s00339-013-7900-3
[16]	Chiang H Q, Wager J F, Hoffman R L, et al. High mobility transparent thin-film transistors with amorphous zinc tin oxide channel layer. Appl Phys Lett, 2004, 86, 013503 doi: 10.1063/1.1843286
[17]	Feng L S, Yu G Y, Li X F, et al. Solution processed amorphous ZnSnO thin-film phototransistors. IEEE Trans Electron Devices, 2017, 64, 206 doi: 10.1109/TED.2016.2632742
[18]	Lu R K, Lu J G, Wei X S, et al. Two-step plasma treatment designed for high-performance flexible amorphous ZnAlSnO thin-film transistors replacing thermal annealing. Adv Electron Mater, 2020, 6, 2000233 doi: 10.1002/aelm.202000233
[19]	Hong D, Yerubandi G, Chiang H Q, et al. Electrical modeling of thin-film transistors. Crit Rev Solid State Mater Sci, 2008, 33, 101 doi: 10.1080/10408430701384808
[20]	Kim G H, Shin H S, Du Ahn B, et al. Formation mechanism of solution-processed nanocrystalline InGaZnO thin film as active channel layer in thin-film transistor. J Electrochem Soc, 2009, 156, H7 doi: 10.1149/1.2976027
[21]	Yeom H I, Ko J B, Mun G, et al. High mobility polycrystalline indium oxide thin-film transistors by means of plasma-enhanced atomic layer deposition. J Mater Chem C, 2016, 4, 6873 doi: 10.1039/C6TC00580B
[22]	Buchholz D B, Ma Q, Alducin D, et al. The structure and properties of amorphous indium oxide. Chem Mater, 2014, 26, 5401 doi: 10.1021/cm502689x
[23]	Kim Y S, Park C H. Rich variety of defects in ZnO via an attractive interaction between O vacancies and Zn interstitials: Origin of n-type doping. Phys Rev Lett, 2009, 102, 086403 doi: 10.1103/PhysRevLett.102.086403
[24]	Cho D H, Yang S, Byun C, et al. Transparent Al–Zn–Sn–O thin film transistors prepared at low temperature. Appl Phys Lett, 2008, 93, 142111 doi: 10.1063/1.2998612
[25]	Rim Y S, Kim D L, Jeong W H, et al. Effect of Zr addition on ZnSnO thin-film transistors using a solution process. Appl Phys Lett, 2010, 97, 233502 doi: 10.1063/1.3524514
[26]	Zhang X J, Zhao H, Song Z X, et al. Insight into the effect of oxygen species and Mn chemical valence over MnO_x on the catalytic oxidation of toluene. Appl Surf Sci, 2019, 493, 9 doi: 10.1016/j.apsusc.2019.06.255
[27]	Wang L B, Cheng B, Zhang L Y, et al. In situ irradiated XPS investigation on S-scheme TiO₂@ZnIn₂S₄ photocatalyst for efficient photocatalytic CO₂ reduction. Small, 2021, 17, 2103447 doi: 10.1002/smll.202103447
[28]	Jiang Q J, Lu J G, Cheng J P, et al. Combustion-process derived comparable performances of Zn-(In:Sn)-O thin-film transistors with a complete miscibility. Appl Phys Lett, 2014, 105, 132105 doi: 10.1063/1.4896990
[29]	Chong E, Jo K C, Lee S Y. High stability of amorphous hafnium-indium-zinc-oxide thin film transistor. Appl Phys Lett, 2010, 96, 152102 doi: 10.1063/1.3387819
[30]	Sheng J Z, Lee H J, Oh S, et al. Flexible and high-performance amorphous indium zinc oxide thin-film transistor using low-temperature atomic layer deposition. ACS Appl Mater Interfaces, 2016, 8, 33821 doi: 10.1021/acsami.6b11774
[31]	Nayak P K, Hedhili M N, Cha D, et al. High performance solution-deposited amorphous indium gallium zinc oxide thin film transistors by oxygen plasma treatment. Appl Phys Lett, 2012, 100, 202106 doi: 10.1063/1.4718022
[32]	Yan W C, Yue S L, Lu J G, et al. Thin-film transistors based on amorphous ZnNbSnO films with enhanced behaviors. IEEE Trans Electron Devices, 2016, 63, 2412 doi: 10.1109/TED.2016.2555848
[33]	Park H W, Chung K B, Park J S. A role of oxygen vacancy on annealed ZnO film in the hydrogen atmosphere. Curr Appl Phys, 2012, 12, S164 doi: 10.1016/j.cap.2012.02.052
[34]	Park J S, Kim K, Park Y G, et al. Novel ZrInZnO thin-film transistor with excellent stability. Adv Mater, 2009, 21, 329 doi: 10.1002/adma.200802246
[35]	Park S M, Lee D H, Lim Y S, et al. Effect of aluminum addition to solution-derived amorphous indium zinc oxide thin film for an oxide thin film transistors. Microelectron Eng, 2013, 109, 189 doi: 10.1016/j.mee.2013.03.121
[36]	Song A, Hong H M, Son K S, et al. Hydrogen behavior in top gate amorphous In–Ga–Zn–O device fabrication process during gate insulator deposition and gate insulator etching. IEEE Trans Electron Devices, 2021, 68, 2723 doi: 10.1109/TED.2021.3074120
[37]	Yang S, Cho D H, Ryu M K, et al. High-performance Al–Sn–Zn–In–O thin-film transistors: Impact of passivation layer on device stability. IEEE Electron Device Lett, 2010, 31, 144 doi: 10.1109/LED.2009.2036944
[38]	Michalas L K, Papaioannou G J, Kouvatsos D N, et al. The role of grain boundaries on the performance of poly-Si TFTs. ECS Trans, 2006, 3, 87 doi: 10.1149/1.2356339
[39]	Yang B S, Park S, Oh S, et al. Improvement of the photo-bias stability of the Zn–Sn–O field effect transistors by an ozone treatment. J Mater Chem, 2012, 22, 10994 doi: 10.1039/c2jm30242j
[40]	Zhang J, Lu J G, Jiang Q J, et al. Stability of amorphous InAlZnO thin-film transistors. J Vac Sci Technol B, 2014, 32, 010602 doi: 10.1116/1.4862150
[41]	Kim H, Maeng S, Lee S, et al. Improved performance and operational stability of solution-processed InGaSnO (IGTO) thin film transistors by the formation of Sn–O complexes. ACS Appl Electron Mater, 2021, 3, 1199 doi: 10.1021/acsaelm.0c01048
[42]	Kamiya T, Nomura K, Hosono H. Present status of amorphous In-Ga-Zn-O thin-film transistors. Sci Technol Adv Mater, 2010, 11, 044305 doi: 10.1088/1468-6996/11/4/044305
[43]	Yue S L, Lu J G, Lu R K, et al. Ultra-thin-film transistors based on ultra-thin amorphous ZnSnO films. Appl Phys A, 2018, 124, 848 doi: 10.1007/s00339-018-2280-3
[44]	Saha S K. Nanodielectrics with giant permittivity. Bull Mater Sci, 2008, 31, 473 doi: 10.1007/s12034-008-0074-5
[45]	Wang W H, Zhang T, Seliverstov A, et al. Layer-dependent optoelectronic properties of 2D van der waals SnS grown by pulsed laser deposition. Adv Electron Mater, 2020, 6, 1901020 doi: 10.1002/aelm.201901020
[46]	Sheng J Z, Hong T, Lee H M, et al. Amorphous IGZO TFT with high mobility of ~70 cm²/(V s) via vertical dimension control using PEALD. ACS Appl Mater Interfaces, 2019, 11, 40300 doi: 10.1021/acsami.9b14310

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Table 1. Key electrical parameters of TFT devices with distinct active layer.

Layer structure	I_off (A)	I_on/I_off	V_th (V)	μ_sat (cm²/(V·s))	SS (V/dec)
Homojunction	~1.5 × 10^-11	8.53 × 10⁷	–1.71	113.8	0.372
Uniform ZATO	~4.9 × 10^-10	6.59 × 10⁵	–2.91	22.9	0.896

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[1]	Yue S L, Lu J G, Lu R K, et al. Ultrathin amorphous ZnGe_xSnO films for high performance ultra-thin-film transistors. Appl Phys Lett, 2018, 113, 013504 doi: 10.1063/1.5031448
[2]	Jiang Q J, Feng L S, Wu C J, et al. Amorphous ZnAlSnO thin-film transistors by a combustion solution process for future displays. Appl Phys Lett, 2015, 106, 053503 doi: 10.1063/1.4906999
[3]	Fortunato E, Barquinha P, Martins R. Oxide semiconductor thin-film transistors: A review of recent advances. Adv Mater, 2012, 24, 2945 doi: 10.1002/adma.201103228
[4]	Cherenack K H, Kattamis A Z, Hekmatshoar B, et al. Amorphous-silicon thin-film transistors fabricated at 300 °C on a free-standing foil substrate of clear plastic. IEEE Electron Device Lett, 2007, 28, 1004 doi: 10.1109/LED.2007.907411
[5]	Park J S, Maeng W J, Kim H S, et al. Review of recent developments in amorphous oxide semiconductor thin-film transistor devices. Thin Solid Films, 2012, 520, 1679 doi: 10.1016/j.tsf.2011.07.018
[6]	Nomura K, Ohta H, Takagi A, et al. Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors. Nature, 2004, 432, 488 doi: 10.1038/nature03090
[7]	Kamiya T, Nomura K, Hosono H. Origins of high mobility and low operation voltage of amorphous oxide TFTs: Electronic structure, electron transport, defects and doping. J Disp Technol, 2009, 5, 273 doi: 10.1109/JDT.2009.2021582
[8]	Kim J I, Ji K H, Jung H Y, et al. Improvement in both mobility and bias stability of ZnSnO transistors by inserting ultra-thin InSnO layer at the gate insulator/channel interface. Appl Phys Lett, 2011, 99, 122102 doi: 10.1063/1.3643054
[9]	Park S Y, Song J H, Lee C K, et al. Improvement in photo-bias stability of high-mobility indium zinc oxide thin-film transistors by oxygen high-pressure annealing. IEEE Electron Device Lett, 2013, 34, 894 doi: 10.1109/LED.2013.2259574
[10]	Kim H S, Park J S, Jeong H K, et al. Density of states-based design of metal oxide thin-film transistors for high mobility and superior photostability. ACS Appl Mater Interfaces, 2012, 4, 5416 doi: 10.1021/am301342x
[11]	Song W, Kwon S Y, Myung S, et al. High-mobility ambipolar ZnO-graphene hybrid thin film transistors. Sci Rep, 2014, 4, 4064 doi: 10.1038/srep04064
[12]	Choi J H, Yang J H, Nam S, et al. InZnO/AlSnZnInO bilayer oxide thin-film transistors with high mobility and high uniformity. IEEE Electron Device Lett, 2016, 37, 1295 doi: 10.1109/LED.2016.2602284
[13]	Yang J H, Choi J H, Cho S H, et al. Highly stable AlInZnSnO and InZnO double-layer oxide thin-film transistors with mobility over 50 cm²/(V·s) for high-speed operation. IEEE Electron Device Lett, 2018, 39, 508 doi: 10.1109/LED.2018.2805705
[14]	Tari A, Wong W S. Effect of dual-dielectric hydrogen-diffusion barrier layers on the performance of low-temperature processed transparent InGaZnO thin-film transistors. Appl Phys Lett, 2018, 112, 073506 doi: 10.1063/1.5000362
[15]	Zheng Z W, Chen Y C. Improved performances in low-voltage-driven InGaZnO thin film transistors using a SiO₂ buffer layer insertion. Appl Phys A, 2014, 115, 937 doi: 10.1007/s00339-013-7900-3
[16]	Chiang H Q, Wager J F, Hoffman R L, et al. High mobility transparent thin-film transistors with amorphous zinc tin oxide channel layer. Appl Phys Lett, 2004, 86, 013503 doi: 10.1063/1.1843286
[17]	Feng L S, Yu G Y, Li X F, et al. Solution processed amorphous ZnSnO thin-film phototransistors. IEEE Trans Electron Devices, 2017, 64, 206 doi: 10.1109/TED.2016.2632742
[18]	Lu R K, Lu J G, Wei X S, et al. Two-step plasma treatment designed for high-performance flexible amorphous ZnAlSnO thin-film transistors replacing thermal annealing. Adv Electron Mater, 2020, 6, 2000233 doi: 10.1002/aelm.202000233
[19]	Hong D, Yerubandi G, Chiang H Q, et al. Electrical modeling of thin-film transistors. Crit Rev Solid State Mater Sci, 2008, 33, 101 doi: 10.1080/10408430701384808
[20]	Kim G H, Shin H S, Du Ahn B, et al. Formation mechanism of solution-processed nanocrystalline InGaZnO thin film as active channel layer in thin-film transistor. J Electrochem Soc, 2009, 156, H7 doi: 10.1149/1.2976027
[21]	Yeom H I, Ko J B, Mun G, et al. High mobility polycrystalline indium oxide thin-film transistors by means of plasma-enhanced atomic layer deposition. J Mater Chem C, 2016, 4, 6873 doi: 10.1039/C6TC00580B
[22]	Buchholz D B, Ma Q, Alducin D, et al. The structure and properties of amorphous indium oxide. Chem Mater, 2014, 26, 5401 doi: 10.1021/cm502689x
[23]	Kim Y S, Park C H. Rich variety of defects in ZnO via an attractive interaction between O vacancies and Zn interstitials: Origin of n-type doping. Phys Rev Lett, 2009, 102, 086403 doi: 10.1103/PhysRevLett.102.086403
[24]	Cho D H, Yang S, Byun C, et al. Transparent Al–Zn–Sn–O thin film transistors prepared at low temperature. Appl Phys Lett, 2008, 93, 142111 doi: 10.1063/1.2998612
[25]	Rim Y S, Kim D L, Jeong W H, et al. Effect of Zr addition on ZnSnO thin-film transistors using a solution process. Appl Phys Lett, 2010, 97, 233502 doi: 10.1063/1.3524514
[26]	Zhang X J, Zhao H, Song Z X, et al. Insight into the effect of oxygen species and Mn chemical valence over MnO_x on the catalytic oxidation of toluene. Appl Surf Sci, 2019, 493, 9 doi: 10.1016/j.apsusc.2019.06.255
[27]	Wang L B, Cheng B, Zhang L Y, et al. In situ irradiated XPS investigation on S-scheme TiO₂@ZnIn₂S₄ photocatalyst for efficient photocatalytic CO₂ reduction. Small, 2021, 17, 2103447 doi: 10.1002/smll.202103447
[28]	Jiang Q J, Lu J G, Cheng J P, et al. Combustion-process derived comparable performances of Zn-(In:Sn)-O thin-film transistors with a complete miscibility. Appl Phys Lett, 2014, 105, 132105 doi: 10.1063/1.4896990
[29]	Chong E, Jo K C, Lee S Y. High stability of amorphous hafnium-indium-zinc-oxide thin film transistor. Appl Phys Lett, 2010, 96, 152102 doi: 10.1063/1.3387819
[30]	Sheng J Z, Lee H J, Oh S, et al. Flexible and high-performance amorphous indium zinc oxide thin-film transistor using low-temperature atomic layer deposition. ACS Appl Mater Interfaces, 2016, 8, 33821 doi: 10.1021/acsami.6b11774
[31]	Nayak P K, Hedhili M N, Cha D, et al. High performance solution-deposited amorphous indium gallium zinc oxide thin film transistors by oxygen plasma treatment. Appl Phys Lett, 2012, 100, 202106 doi: 10.1063/1.4718022
[32]	Yan W C, Yue S L, Lu J G, et al. Thin-film transistors based on amorphous ZnNbSnO films with enhanced behaviors. IEEE Trans Electron Devices, 2016, 63, 2412 doi: 10.1109/TED.2016.2555848
[33]	Park H W, Chung K B, Park J S. A role of oxygen vacancy on annealed ZnO film in the hydrogen atmosphere. Curr Appl Phys, 2012, 12, S164 doi: 10.1016/j.cap.2012.02.052
[34]	Park J S, Kim K, Park Y G, et al. Novel ZrInZnO thin-film transistor with excellent stability. Adv Mater, 2009, 21, 329 doi: 10.1002/adma.200802246
[35]	Park S M, Lee D H, Lim Y S, et al. Effect of aluminum addition to solution-derived amorphous indium zinc oxide thin film for an oxide thin film transistors. Microelectron Eng, 2013, 109, 189 doi: 10.1016/j.mee.2013.03.121
[36]	Song A, Hong H M, Son K S, et al. Hydrogen behavior in top gate amorphous In–Ga–Zn–O device fabrication process during gate insulator deposition and gate insulator etching. IEEE Trans Electron Devices, 2021, 68, 2723 doi: 10.1109/TED.2021.3074120
[37]	Yang S, Cho D H, Ryu M K, et al. High-performance Al–Sn–Zn–In–O thin-film transistors: Impact of passivation layer on device stability. IEEE Electron Device Lett, 2010, 31, 144 doi: 10.1109/LED.2009.2036944
[38]	Michalas L K, Papaioannou G J, Kouvatsos D N, et al. The role of grain boundaries on the performance of poly-Si TFTs. ECS Trans, 2006, 3, 87 doi: 10.1149/1.2356339
[39]	Yang B S, Park S, Oh S, et al. Improvement of the photo-bias stability of the Zn–Sn–O field effect transistors by an ozone treatment. J Mater Chem, 2012, 22, 10994 doi: 10.1039/c2jm30242j
[40]	Zhang J, Lu J G, Jiang Q J, et al. Stability of amorphous InAlZnO thin-film transistors. J Vac Sci Technol B, 2014, 32, 010602 doi: 10.1116/1.4862150
[41]	Kim H, Maeng S, Lee S, et al. Improved performance and operational stability of solution-processed InGaSnO (IGTO) thin film transistors by the formation of Sn–O complexes. ACS Appl Electron Mater, 2021, 3, 1199 doi: 10.1021/acsaelm.0c01048
[42]	Kamiya T, Nomura K, Hosono H. Present status of amorphous In-Ga-Zn-O thin-film transistors. Sci Technol Adv Mater, 2010, 11, 044305 doi: 10.1088/1468-6996/11/4/044305
[43]	Yue S L, Lu J G, Lu R K, et al. Ultra-thin-film transistors based on ultra-thin amorphous ZnSnO films. Appl Phys A, 2018, 124, 848 doi: 10.1007/s00339-018-2280-3
[44]	Saha S K. Nanodielectrics with giant permittivity. Bull Mater Sci, 2008, 31, 473 doi: 10.1007/s12034-008-0074-5
[45]	Wang W H, Zhang T, Seliverstov A, et al. Layer-dependent optoelectronic properties of 2D van der waals SnS grown by pulsed laser deposition. Adv Electron Mater, 2020, 6, 1901020 doi: 10.1002/aelm.201901020
[46]	Sheng J Z, Hong T, Lee H M, et al. Amorphous IGZO TFT with high mobility of ~70 cm²/(V s) via vertical dimension control using PEALD. ACS Appl Mater Interfaces, 2019, 11, 40300 doi: 10.1021/acsami.9b14310

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R K Lu, S Q Li, J G Lu, B J Lu, R Q Yang, Y D Lu, W Y Shao, Y Zhao, L P Zhu, F Zhuge, Z Z Ye. Homojunction structure amorphous oxide thin film transistors with ultra-high mobility[J]. J. Semicond, 2023, 44(5): 052101. doi: 10.1088/1674-4926/44/5/052101

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Received: 29 September 2022 Revised: 24 November 2022 Online: Accepted Manuscript: 02 March 2023Uncorrected proof: 02 March 2023Published: 10 May 2023

Article Navigation > Journal of Semiconductors > 2023 > 44(5): 052101

Rongkai Lu, Siqin Li, Jianguo Lu, Bojing Lu, Ruqi Yang, Yangdan Lu, Wenyi Shao, Yi Zhao, Liping Zhu, Fei Zhuge, Zhizhen Ye. Homojunction structure amorphous oxide thin film transistors with ultra-high mobility[J]. Journal of Semiconductors, 2023, 44(5): 052101. doi: 10.1088/1674-4926/44/5/052101 ****R K Lu, S Q Li, J G Lu, B J Lu, R Q Yang, Y D Lu, W Y Shao, Y Zhao, L P Zhu, F Zhuge, Z Z Ye. Homojunction structure amorphous oxide thin film transistors with ultra-high mobility[J]. J. Semicond, 2023, 44(5): 052101. doi: 10.1088/1674-4926/44/5/052101

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Homojunction structure amorphous oxide thin film transistors with ultra-high mobility

DOI: 10.1088/1674-4926/44/5/052101

Rongkai Lu^{1, §},
Siqin Li^{1, §},
Jianguo Lu^{1, 2,},
Bojing Lu¹,
Ruqi Yang¹,
Yangdan Lu¹,
Wenyi Shao¹,
Yi Zhao^3,,
Liping Zhu^{1, 2},
Fei Zhuge⁴,
Zhizhen Ye^{1, 2,}

1.
State Key Laboratory of Silicon Materials, Key Laboratory for Biomedical Engineering of Ministry of Education, School of Materials Science and Engineering, Zhejiang University, Hangzhou 310027, China
2.
Wenzhou Key Laboratory of Novel Optoelectronic and Nano Materials, Institute of Wenzhou, Zhejiang University, Wenzhou 325006, China
3.
Department of Electronic Science and Technology, College of Information Science and Electronic Engineering, Zhejiang University, Hangzhou 310027, China
4.
Ningbo Institute of Materials Technology and Engineering, Chinese Academy of Sciences, Ningbo 315201, China

More Information

Rongkai Lu：received his bachelor’s degree and doctor’s degree at State Key Laboratory of Silicon Materials, School of Materials Science and Engineering, Zhejiang University, China. His current research focuses on amorphous oxide semiconductor, flexible thin film transistor and exploring the possibilities of applications for high-performance TFTs in multiple fields
Siqin Li：received his Master’s degree at State Key Laboratory of Silicon Materials, School of Materials Science and Engineering, Zhejiang University, China. His current research focuses on amorphous oxide semiconductor, memristor, thin film transistor and their applications for artificial synapses
Jianguo Lu：has been an associate professor at State Key Laboratory of Silicon Materials, School of Materials Science and Engineering, Zhejiang University, China. His current research focuses on Semiconductor films and transparent electronics, Nanoscale materials and new energies, Coating & biomimetic materials for marine applications. He is Distinguished Young Scholars of Zhejiang Province, China. He is the Member of IEEE. He is the Editorial Board Member of Chinese Chemical Letters and Tungsten. He was awarded 1 Second Prize of National Natural Science Award of China and 3 First Prizes of Science and Technology Award of Zhejiang Province. He was authorized over 50 national invention patents. He published 2 books in Chinese and 1 book chapter in English. He published over 200 SCI papers with citation times over 9000 and H-index of 48. He is the Highly Cited Chinese Researcher
Yi Zhao：received a bachelor’s degree from Nanjing University of Astronautics and Aeronautics, Nanjing, China, in 2000, a master's degree from Zhejiang University, Hangzhou, China, in 2003, and a Ph.D. from the University of Tokyo, Tokyo, Japan, in 2007, all in materials science and engineering. He currently works with Zhejiang University as a full professor. His recent research interests have mainly focused upon advanced-CMOS devices using new channel materials (strained Si/Ge, SiGe, Ge, and III-V materials) and new structures (SOI, FinFET, UTB, and nanowire)
Zhizhen Ye：has been an Academician of Chinese Academy of Sciences; Professor at State Key Laboratory of Silicon Materials, School of Materials Science and Engineering, Zhejiang University, China. His current research focuses on Compound semiconductor and optoelectronic materials, Transparent conductive materials, and Semiconductor sensing materials. He is Distinguished Young Scholars of Zhejiang Province, China. He was awarded 1 Second Prize of National Natural Science Award of China, 3 First Prizes of Science and Technology Award of Zhejiang Province, and 2 First Prizes of Science and Technology Award of Ministry of Education of China. He was authorized more than 100 national invention patents. He published 2 books in Chinese and 1 book in English. He published more than 500 papers, cited by over 13000 times with H-index of 63
Corresponding author: lujianguo@zju.edu.cn; yizhao@zju.edu.cn; yezz@zju.edu.cn
Received Date: 2022-09-29
Revised Date: 2022-11-24

Available Online: 2023-03-02

Abstract

Abstract

Amorphous oxide semiconductors (AOS) have unique advantages in transparent and flexible thin film transistors (TFTs) applications, compared to low-temperature polycrystalline-Si (LTPS). However, intrinsic AOS TFTs are difficult to obtain field-effect mobility (μ_FE) higher than LTPS (100 cm²/(V·s)). Here, we design ZnAlSnO (ZATO) homojunction structure TFTs to obtain μ_FE = 113.8 cm²/(V·s). The device demonstrates optimized comprehensive electrical properties with an off-current of about 1.5 × 10^–11 A, a threshold voltage of –1.71 V, and a subthreshold swing of 0.372 V/dec. There are two kinds of gradient coupled in the homojunction active layer, which are micro-crystallization and carrier suppressor concentration gradient distribution so that the device can reduce off-current and shift the threshold voltage positively while maintaining high field-effect mobility. Our research in the homojunction active layer points to a promising direction for obtaining excellent-performance AOS TFTs.
- thin film transistors,
- homojunction,
- carrier mobility,
- amorphous oxides

Supplementary materials to this article can be found online at https://doi.org/10.1088/1674-4926/44/052101.
^§Rongkai Lu and Siqin Li contributed equally to this work.

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