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A parallel dual-BJT enhanced SCR featuring high holding voltage and high-temperature stability for ESD protection of MEMS microphone readout ICs

Wei Liu1, 2, Yujie Liu1, 2, Zhixiang Cao1, 2, Yuxuan Yang1, 2, Haoxiang Li1, 2 and Xiangliang Jin1, 2,

+ Author Affiliations

 Corresponding author: Xiangliang Jin, jinxl@hunnu.edu.cn

DOI: 10.1088/1674-4926/26010029CSTR: 32376.14.1674-4926.26010029

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Abstract: Abstract—In the readout circuit of micro-electromechanical systems (MEMS) microphones, the high-voltage pins of charge pumps necessitate electrostatic discharge (ESD) protection designs featuring high holding voltage and high-temperature tolerance. Traditional ESD solutions cannot effectively meet the requirement. Accordingly, this paper proposes a parallel dual-BJT enhanced silicon-controlled rectifier (DBESCR) structure, which is verified in a 0.18 µm Bipolar-CMOS-DMOS (BCD) process. By incorporating a parallel dual-BJT shunt design based on the low-voltage-triggered silicon-controlled rectifier (LVTSCR), the holding voltage is effectively enhanced without a significant increase in chip area. Transmission line pulse (TLP) test results demonstrate that the DBESCR device achieves a trigger voltage of 11.8 V and a high holding voltage of 9.69 V. At an elevated temperature of 75 °C, the structure maintains a picoamperes-level leakage current, and the ESD performance of the device does not degrade noticeably. The proposed DBESCR fully meets the 9 V ESD protection design requirements for charge pumps in MEMS microphone readout circuits and exhibits ESD robustness exceeding 8 kV under the human body model (HBM).

Keywords: Index Terms—electrostatic discharge (ESD), silicon-controlled rectifier (SCR), temperature characteristic, holding voltage



[1]
Wang L, Zhong L J, Zhu Z M. A 132 dBSPL 67.34 dB-a SNR single-ended MEMS microphone using self-adaption loop with 1.5-V supply voltage. IEEE Trans Circuits Syst I Regul Pap, 2025, 72(9): 4560 doi: 10.1109/TCSI.2025.3528732
[2]
Liang H L, Bi X W, Gu X F, et al. Investigation on LDMOS-SCR with high holding current for high voltage ESD protection. Microelectron Reliab, 2016, 61: 120 doi: 10.1016/j.microrel.2016.01.016
[3]
Dai C T, Ker M D. ESD protection design with stacked high-holding-voltage SCR for high-voltage pins in a battery-monitoring IC. IEEE Trans Electron Devices, 2016, 63(5): 1996 doi: 10.1109/TED.2016.2544382
[4]
Wu Z X, Wang Y, Ji S X, et al. Weak snapback silicon controlled rectifier ESD device with double snapback characteristics. IEEE Trans Device Mater Relib, 2025, 25(3): 401 doi: 10.1109/TDMR.2025.3571056
[5]
Du F B, Song W Q, Hou F, et al. Augmented DTSCR with fast turn-on speed for nanoscale ESD protection applications. IEEE Trans Electron Devices, 2020, 67(3): 1353. doi: 10.1109/TED.2020.2965092
[6]
Bi X W, Liang H L, Gu X F, et al. Design of novel DDSCR with embedded PNP structure for ESD protection. J Semicond, 2015, 36(12): 124007 doi: 10.1088/1674-4926/36/12/124007
[7]
Wu J W, Yu Z G, Hong G S, et al. Design of GGNMOS ESD protection device for radiation-hardened 0.18 μm CMOS process. J Semicond, 2020, 41(12): 122403 doi: 10.1088/1674-4926/41/12/122403
[8]
Liu J Z, Liu Z W, Jia Z, et al. A novel DTSCR with a variation lateral base doping structure to improve turn-on speed for ESD protection. J Semicond, 2014, 35(6): 064010 doi: 10.1088/1674-4926/35/6/064010
[9]
Song W Q, Chen R B, Tong Z, et al. Robust silicon-controlled rectifier with high-holding voltage for on-chip electrostatic protection. IEEE Trans Electron Devices, 2022, 69(2): 696 doi: 10.1109/TED.2021.3131536
[10]
Chen R B, Liu H X, Yan C, et al. Gate-controlled LVTSCR for high-voltage ESD protections in advanced CMOS processes. IEEE Trans Electron Devices, 2023, 70(4): 1566 doi: 10.1109/TED.2023.3244765
[11]
Ker M D, Hsu K C. Overview of on-chip electrostatic discharge protection design with SCR-based devices in CMOS integrated circuits. IEEE Trans Device Mater Reliab, 2005, 5(2): 235 doi: 10.1109/TDMR.2005.846824
[12]
Song B, Koo Y. Low Ron and high robustness ESD protection design for low-voltage power clamp application. Electron Lett, 2016, 52(18): 1554 doi: 10.1049/el.2016.2391
[13]
Qi Z, Li J K, Chen H Q, et al. Novel high-holding-voltage shunt-triggered SCR for robust ESD protection. IEEE Electron Device Lett, 2025, 46(10): 1673 doi: 10.1109/LED.2025.3598828
[14]
Lim M C, Eom Y B, Choi J C, et al. Novel SCR device for ESD protection with high-holding voltage in 0.18um BCD process. in Proc. EDTM, 2023: 1
[15]
Hung C Y, Kao T C, Lee J H, et al. Simple scheme to increase hold voltage for silicon-controlled rectifier. Electron Lett, 2014, 50(3): 200 doi: 10.1049/el.2013.1853
[16]
Do K I, Koo Y S. A new SCR structure with high holding voltage and low ON-resistance for 5-V applications. IEEE Trans Electron Devices, 2020, 67(3): 1052 doi: 10.1109/TED.2020.2963994
[17]
Yang Z N, Qi C L, Fu D B, et al. Modified low-voltage triggered silicon-controlled rectifier for ESD protection. IEEE Electron Device Lett, 2024, 45(5): 746 doi: 10.1109/LED.2024.3370172
[18]
Wang Y, Zhang K, Liu Y J, et al. A dual-direction SCR featuring shallow snapback and high-temperature robustness for ESD protection of industrial communication buses. IEEE Trans Electron Devices, 2025, 72(11): 5838 doi: 10.1109/TED.2025.3608742
[19]
Wang Y, Zhong Z Y, Jin X L, et al. A high-voltage dual direction silicon-controlled rectifier based on flexible stacking strategy. IEEE Trans Electron Devices, 2025, 72(4): 2086 doi: 10.1109/TED.2025.3544975
[20]
Liang H L, Cao X Y, Liu J L, et al. A novel dual-direction SCR embedded with segmental and cross-bridge topology for high-voltage ESD protection. IEEE Trans Electron Devices, 2023, 70(8): 4036 doi: 10.1109/TED.2023.3284416
[21]
Dai C T, Ker M D. Comparison between high-holding-voltage SCR and stacked low-voltage devices for ESD protection in high-voltage applications. IEEE Trans Electron Devices, 2018, 65(2): 798 doi: 10.1109/TED.2017.2785121
[22]
Liu Y J, Wang Y, Zhang K, et al. A novel SCR topology of embedded bipolar transistor with high-holding voltage and high-temperature tolerance for ESD protection. IEEE Trans Electron Devices, 2025, 72(9): 4635 doi: 10.1109/TED.2025.3586260
Fig. 1.  (Color online) (a)The circuit schematic diagram of the MEMS microphone. (b)The ESD application circuit of MEMS microphone.

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Fig. 2.  (Color online) Cross-section and equivalent circuit of LVTSCR.

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Fig. 3.  (Color online) Cross-section and equivalent circuit of DBESCR.

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Fig. 4.  (Color online) TCAD simulation results of the LVTSCR, including (a) Impact Ionization, (b) Total Current density at 0.1 mA, (c) Total Current density at 0.1 A, (d) Electrostatic Potential at 0.1 A.

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Fig. 5.  (Color online) TCAD simulation results of the proposed DBESCR, including(a) Impact Ionization, (b) Total Current density at 0.1 mA, (c) Total Current density at 0.1 A, (d) Electrostatic Potential at 0.1 A.

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Fig. 6.  (Color online) Complete conduction current density along the X-axis tangent of LVTSCR and DBESCR.

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Fig. 7.  (Color online) Mix-mode simulation circuit for HBM 4 kV pulse and the simulated waveform for LVTSCR and DBESCR.

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Fig. 8.  (Color online) The layout designs and microscope images of SCRs.

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Fig. 9.  (Color online) The TLP testing equipment.

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Fig. 10.  (Color online) The TLP I-V curve of DBESCR.

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Fig. 11.  (Color online) Comparison of transient voltage curves of 0.5 A TLP pulse tests between LVTSCR and DBESCR.

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Fig. 12.  (Color online) Comparison of transient voltage curves of 0.5 A VF-TLP pulse tests between LVTSCR and DBESCR.

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Fig. 13.  (Color online) The conduction time of LVTSCR and DBESCR and the VF-TLP current curve.

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Fig. 14.  (Color online) TLP test curves of DBESCR at high temperatures (25°C−75°C).

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Fig. 15.  (Color online) HBM test results of DBESCR.

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Table 1.   Key performance of the experimental devices

Device
name		 Vt1(V) Vh(V) It2(A) FOM
(mA/μm2)
SDDSCR [19] 31.1 17.1 18.5 0.36
LRSCR [20] 9.8 5.9 5.7 1.09
DDSCR [21] 11.1 4.1 3.6 0.66
HVSCR [22] 50.5 21.7 8.1 0.38
LVTSCR 12.71 3.83 8.77 0.94
DBESCR 11.80 9.69 7.06 1.67
DownLoad: CSV
[1]
Wang L, Zhong L J, Zhu Z M. A 132 dBSPL 67.34 dB-a SNR single-ended MEMS microphone using self-adaption loop with 1.5-V supply voltage. IEEE Trans Circuits Syst I Regul Pap, 2025, 72(9): 4560 doi: 10.1109/TCSI.2025.3528732
[2]
Liang H L, Bi X W, Gu X F, et al. Investigation on LDMOS-SCR with high holding current for high voltage ESD protection. Microelectron Reliab, 2016, 61: 120 doi: 10.1016/j.microrel.2016.01.016
[3]
Dai C T, Ker M D. ESD protection design with stacked high-holding-voltage SCR for high-voltage pins in a battery-monitoring IC. IEEE Trans Electron Devices, 2016, 63(5): 1996 doi: 10.1109/TED.2016.2544382
[4]
Wu Z X, Wang Y, Ji S X, et al. Weak snapback silicon controlled rectifier ESD device with double snapback characteristics. IEEE Trans Device Mater Relib, 2025, 25(3): 401 doi: 10.1109/TDMR.2025.3571056
[5]
Du F B, Song W Q, Hou F, et al. Augmented DTSCR with fast turn-on speed for nanoscale ESD protection applications. IEEE Trans Electron Devices, 2020, 67(3): 1353. doi: 10.1109/TED.2020.2965092
[6]
Bi X W, Liang H L, Gu X F, et al. Design of novel DDSCR with embedded PNP structure for ESD protection. J Semicond, 2015, 36(12): 124007 doi: 10.1088/1674-4926/36/12/124007
[7]
Wu J W, Yu Z G, Hong G S, et al. Design of GGNMOS ESD protection device for radiation-hardened 0.18 μm CMOS process. J Semicond, 2020, 41(12): 122403 doi: 10.1088/1674-4926/41/12/122403
[8]
Liu J Z, Liu Z W, Jia Z, et al. A novel DTSCR with a variation lateral base doping structure to improve turn-on speed for ESD protection. J Semicond, 2014, 35(6): 064010 doi: 10.1088/1674-4926/35/6/064010
[9]
Song W Q, Chen R B, Tong Z, et al. Robust silicon-controlled rectifier with high-holding voltage for on-chip electrostatic protection. IEEE Trans Electron Devices, 2022, 69(2): 696 doi: 10.1109/TED.2021.3131536
[10]
Chen R B, Liu H X, Yan C, et al. Gate-controlled LVTSCR for high-voltage ESD protections in advanced CMOS processes. IEEE Trans Electron Devices, 2023, 70(4): 1566 doi: 10.1109/TED.2023.3244765
[11]
Ker M D, Hsu K C. Overview of on-chip electrostatic discharge protection design with SCR-based devices in CMOS integrated circuits. IEEE Trans Device Mater Reliab, 2005, 5(2): 235 doi: 10.1109/TDMR.2005.846824
[12]
Song B, Koo Y. Low Ron and high robustness ESD protection design for low-voltage power clamp application. Electron Lett, 2016, 52(18): 1554 doi: 10.1049/el.2016.2391
[13]
Qi Z, Li J K, Chen H Q, et al. Novel high-holding-voltage shunt-triggered SCR for robust ESD protection. IEEE Electron Device Lett, 2025, 46(10): 1673 doi: 10.1109/LED.2025.3598828
[14]
Lim M C, Eom Y B, Choi J C, et al. Novel SCR device for ESD protection with high-holding voltage in 0.18um BCD process. in Proc. EDTM, 2023: 1
[15]
Hung C Y, Kao T C, Lee J H, et al. Simple scheme to increase hold voltage for silicon-controlled rectifier. Electron Lett, 2014, 50(3): 200 doi: 10.1049/el.2013.1853
[16]
Do K I, Koo Y S. A new SCR structure with high holding voltage and low ON-resistance for 5-V applications. IEEE Trans Electron Devices, 2020, 67(3): 1052 doi: 10.1109/TED.2020.2963994
[17]
Yang Z N, Qi C L, Fu D B, et al. Modified low-voltage triggered silicon-controlled rectifier for ESD protection. IEEE Electron Device Lett, 2024, 45(5): 746 doi: 10.1109/LED.2024.3370172
[18]
Wang Y, Zhang K, Liu Y J, et al. A dual-direction SCR featuring shallow snapback and high-temperature robustness for ESD protection of industrial communication buses. IEEE Trans Electron Devices, 2025, 72(11): 5838 doi: 10.1109/TED.2025.3608742
[19]
Wang Y, Zhong Z Y, Jin X L, et al. A high-voltage dual direction silicon-controlled rectifier based on flexible stacking strategy. IEEE Trans Electron Devices, 2025, 72(4): 2086 doi: 10.1109/TED.2025.3544975
[20]
Liang H L, Cao X Y, Liu J L, et al. A novel dual-direction SCR embedded with segmental and cross-bridge topology for high-voltage ESD protection. IEEE Trans Electron Devices, 2023, 70(8): 4036 doi: 10.1109/TED.2023.3284416
[21]
Dai C T, Ker M D. Comparison between high-holding-voltage SCR and stacked low-voltage devices for ESD protection in high-voltage applications. IEEE Trans Electron Devices, 2018, 65(2): 798 doi: 10.1109/TED.2017.2785121
[22]
Liu Y J, Wang Y, Zhang K, et al. A novel SCR topology of embedded bipolar transistor with high-holding voltage and high-temperature tolerance for ESD protection. IEEE Trans Electron Devices, 2025, 72(9): 4635 doi: 10.1109/TED.2025.3586260

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    Received: 21 January 2025 Revised: 27 May 2026 Online: Accepted Manuscript: 07 August 2026

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      Article Navigation >  Journal of Semiconductors  > 2026  > Accepted Manuscript
      Wei Liu, Yujie Liu, Zhixiang Cao, Yuxuan Yang, Haoxiang Li, Xiangliang Jin. A parallel dual-BJT enhanced SCR featuring high holding voltage and high-temperature stability for ESD protection of MEMS microphone readout ICs[J]. Journal of Semiconductors, 2026, In Press. doi: 10.1088/1674-4926/26010029 ****W Liu, Y J Liu, Z X Cao, Y X Yang, H X Li, and X L Jin, A parallel dual-BJT enhanced SCR featuring high holding voltage and high-temperature stability for ESD protection of MEMS microphone readout ICs[J]. J. Semicond., 2026, accepted doi: 10.1088/1674-4926/26010029
      Citation:
      Wei Liu, Yujie Liu, Zhixiang Cao, Yuxuan Yang, Haoxiang Li, Xiangliang Jin. A parallel dual-BJT enhanced SCR featuring high holding voltage and high-temperature stability for ESD protection of MEMS microphone readout ICs[J]. Journal of Semiconductors, 2026, In Press. doi: 10.1088/1674-4926/26010029 ****
      W Liu, Y J Liu, Z X Cao, Y X Yang, H X Li, and X L Jin, A parallel dual-BJT enhanced SCR featuring high holding voltage and high-temperature stability for ESD protection of MEMS microphone readout ICs[J]. J. Semicond., 2026, accepted doi: 10.1088/1674-4926/26010029
      shu

      A parallel dual-BJT enhanced SCR featuring high holding voltage and high-temperature stability for ESD protection of MEMS microphone readout ICs

      DOI: 10.1088/1674-4926/26010029
      CSTR: 32376.14.1674-4926.26010029
      • 1.

        School of Physics and Electronics, Hunan Normal University, Changsha 410081, China

      • 2.

        Key Laboratory of Physics and Devices in Post-Moore Era, College of Hunan Province, Changsha 410081, China

      More Information
      • Wei Liu received the B.E. degree in Changsha University of Science & Technology. He is currently pursuing the M.S. degree at the School of Physics and Electronic Science, Hunan Normal University. His research interest focuses on on-chip electrostatic discharge protection design
      • Xiangliang Jin received the M.S. degree in microtechnology with emphasis in electric circuits from Hunan University, in 2000. He received the Ph.D. degree in micro-electron ics and solid-state circuits with emphasis in CMOS image sensor design from institute of microelectronics of Chinese academy of sciences, in March 2004. After graduation, he set up Superpix Micro technology Ltd., as one co-founder. From March 2010, he is a Full Professor in Xiangtan University. At present, he is a Full Professor of Xiaoxiang Scholarin Hunan Normal University. And also he is the Director of Key Laboratory of Physics and Devices in Post-Moore Era of Hunan Province. He mainly explores some new principles and new technologies of micro-nano devices and integration around the scientific issues in micro-nano devices and integration. He research interests include new Microelectronics, Optoelectronics, electrostatic protection, mem ristors and other devices and their integration key technologies to solve system integration problems such as information perception, processing, and transmission
      • Corresponding author: jinxl@hunnu.edu.cn
      • Received Date: 2025-01-21
      • Revised Date: 2026-05-27
        • Available Online: 2026-08-07

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