A transferable route to two-dimensional gate-all-around electronics

Jian Wang; Ruiqin Wu; Jianfeng Jiang

doi:10.1088/1674-4926/26020058

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A transferable route to two-dimensional gate-all-around electronics

Jian Wang^§, Ruiqin Wu^§ and Jianfeng Jiang

+ Author Affiliations

Corresponding author: Jianfeng Jiang, jianfengjiang@pku.edu.cn

DOI: 10.1088/1674-4926/26020058CSTR: 32376.14.1674-4926.26020058

References

[1]	Frank D J, Dennard R H, Nowak E, et al. Device scaling limits of Si MOSFETs and their application dependencies. Proc IEEE, 2001, 89(3): 259 doi: 10.1109/5.915374
[2]	Kim Y H, Lee D, Huh W, et al. Gate stack engineering of two-dimensional transistors. Nat Electron, 2025, 8(9): 770 doi: 10.1038/s41928-025-01448-5
[3]	Tang J C, Jiang J F, Gao X Y, et al. Low-power 2D gate-all-around logics via epitaxial monolithic 3D integration. Nat Mater, 2025, 24(4): 519 doi: 10.1038/s41563-025-02117-w
[4]	Zhang Q Z, Zhang Y K, Luo Y N, et al. New structure transistors for advanced technology node CMOS ICs. Natl Sci Rev, 2024, 11(3): nwae008 doi: 10.1093/nsr/nwae008
[5]	Zhang S G, Zhang T, Yu H, et al. Wafer-scale high-k HfO₂ dielectric films with sub-5-Å equivalent oxide thickness for 2D MoS₂ transistors. Nat Commun, 2026, 17: 1888 doi: 10.1038/s41467-026-68584-0
[6]	Guo Y M, Li J X, Zhan X P, et al. Van der Waals polarity-engineered 3D integration of 2D complementary logic. Nature, 2024, 630(8016): 346 doi: 10.1038/s41586-024-07438-5
[7]	Xue C Y, Tan C W, Gao X, et al. Wafer-scale uniform epitaxy of transferable 2D single crystals for gate-all-around nanosheet field effect transistors. Nat Commun, 2025, 16: 10587 doi: 10.1038/s41467-025-65641-y
[8]	Wu Q C, Li Z R, Han B C, et al. Wafer-scale ultrathin and uniform van der Waals ferroelectric oxide. Science, 2026, 391(6784): eadz1655 doi: 10.1126/science.adz1655
[9]	Tan C W, Yu M S, Tang J C, et al. 2D fin field-effect transistors integrated with epitaxial high-k gate oxide. Nature, 2023, 616(7955): 66 doi: 10.1038/s41586-023-05797-z
[10]	Jiang J F, Xu L, Du L J, et al. Yttrium-doping-induced metallization of molybdenum disulfide for ohmic contacts in two-dimensional transistors. Nat Electron, 2024, 7(7): 545 doi: 10.1038/s41928-024-01176-2
[11]	Chen S F, Wang S Y, Liu Z Z, et al. Channel and contact length scaling of two-dimensional transistors using composite metal electrodes. Nat Electron, 2025, 8(5): 394 doi: 10.1038/s41928-025-01382-6
[12]	Wang Y J, Zhang J W, Chen J C, et al. Polarity modulation in compositionally tunable Bi2O2Se thin films. Nat Commun, 2025, 16: 2873 doi: 10.1038/s41467-025-58198-3

Fig. 1. (Color online) (a) Buffer layer design for mono-oriented nucleation. (b) Cross-sectional scanning transmission electron microscopy (STEM) image of Bi₂O₂Se/α-Bi₂SeO₅ heterostructures and α-Bi₂SeO₅/Bi₂O₂Se/β-Bi₂SeO₅ 2D GAA heterostructures. (c) Photograph of a batch of 2-inch wafers of 2DGAAheterostructures and 3×3matrix of low-energy electron diffraction images across the 2D GAA wafer. (d) Schematic of transferring 2D GAA film onto flexible and silicon substrates, and STEM image of the fractured interface. (e) Photograph of a wafer-scale field-effect transistor array based on 2D GAA heterostructures, cross-sectional STEM images, and representative transfer characteristics. (f) Schematic diagram and cross-sectional STEM images of an epitaxially integrated 2D GAAFET, alongside a comparison of its transfer curves^[7].

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[1]	Frank D J, Dennard R H, Nowak E, et al. Device scaling limits of Si MOSFETs and their application dependencies. Proc IEEE, 2001, 89(3): 259 doi: 10.1109/5.915374
[2]	Kim Y H, Lee D, Huh W, et al. Gate stack engineering of two-dimensional transistors. Nat Electron, 2025, 8(9): 770 doi: 10.1038/s41928-025-01448-5
[3]	Tang J C, Jiang J F, Gao X Y, et al. Low-power 2D gate-all-around logics via epitaxial monolithic 3D integration. Nat Mater, 2025, 24(4): 519 doi: 10.1038/s41563-025-02117-w
[4]	Zhang Q Z, Zhang Y K, Luo Y N, et al. New structure transistors for advanced technology node CMOS ICs. Natl Sci Rev, 2024, 11(3): nwae008 doi: 10.1093/nsr/nwae008
[5]	Zhang S G, Zhang T, Yu H, et al. Wafer-scale high-k HfO₂ dielectric films with sub-5-Å equivalent oxide thickness for 2D MoS₂ transistors. Nat Commun, 2026, 17: 1888 doi: 10.1038/s41467-026-68584-0
[6]	Guo Y M, Li J X, Zhan X P, et al. Van der Waals polarity-engineered 3D integration of 2D complementary logic. Nature, 2024, 630(8016): 346 doi: 10.1038/s41586-024-07438-5
[7]	Xue C Y, Tan C W, Gao X, et al. Wafer-scale uniform epitaxy of transferable 2D single crystals for gate-all-around nanosheet field effect transistors. Nat Commun, 2025, 16: 10587 doi: 10.1038/s41467-025-65641-y
[8]	Wu Q C, Li Z R, Han B C, et al. Wafer-scale ultrathin and uniform van der Waals ferroelectric oxide. Science, 2026, 391(6784): eadz1655 doi: 10.1126/science.adz1655
[9]	Tan C W, Yu M S, Tang J C, et al. 2D fin field-effect transistors integrated with epitaxial high-k gate oxide. Nature, 2023, 616(7955): 66 doi: 10.1038/s41586-023-05797-z
[10]	Jiang J F, Xu L, Du L J, et al. Yttrium-doping-induced metallization of molybdenum disulfide for ohmic contacts in two-dimensional transistors. Nat Electron, 2024, 7(7): 545 doi: 10.1038/s41928-024-01176-2
[11]	Chen S F, Wang S Y, Liu Z Z, et al. Channel and contact length scaling of two-dimensional transistors using composite metal electrodes. Nat Electron, 2025, 8(5): 394 doi: 10.1038/s41928-025-01382-6
[12]	Wang Y J, Zhang J W, Chen J C, et al. Polarity modulation in compositionally tunable Bi2O2Se thin films. Nat Commun, 2025, 16: 2873 doi: 10.1038/s41467-025-58198-3