J. Semicond. > 2010, Volume 31 > Issue 2 > 024003
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SEMICONDUCTOR DEVICES

Trench gate IGBT structure with floating P region

Qian Mengliang, Li Zehong, Zhang Bo and Li Zhaoji

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DOI: 10.1088/1674-4926/31/2/024003

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Abstract: A new trench gate IGBT structure with a floating P region is proposed, which introduces a floating P region into the trench accumulation layer controlled IGBT (TAC-IGBT). The new structure maintains a low on-state voltage drop and large forward biased safe operating area (FBSOA) of the TAC-IGBT structure while reduces the leakage current and improves the breakdown voltage. In addition, it enlarges the short circuit safe operating area (SCSOA) of the TAC-IGBT, and is simple in fabrication and design. Simulation results indicate that, for IGBT structures with a breakdown voltage of 1200 V, the leakage current of the new trench gate IGBT structure is one order of magnitude lower than the TAC-IGBT structure and the breakdown voltage is 150 V higher than the TAC-IGBT.

Key words: TAC-IGBT

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    Received: 18 August 2015 Revised: 27 September 2009 Online: Published: 01 February 2010

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      Article Navigation >  Journal of Semiconductors  > 2010  >  31(2): 024003
      Qian Mengliang, Li Zehong, Zhang Bo, Li Zhaoji. Trench gate IGBT structure with floating P region[J]. Journal of Semiconductors, 2010, 31(2): 024003. doi: 10.1088/1674-4926/31/2/024003 ****Qian M L, Li Z H, Zhang B, Li Z J. Trench gate IGBT structure with floating P region[J]. J. Semicond., 2010, 31(2): 024003. doi: 10.1088/1674-4926/31/2/024003.
      Citation:
      Qian Mengliang, Li Zehong, Zhang Bo, Li Zhaoji. Trench gate IGBT structure with floating P region[J]. Journal of Semiconductors, 2010, 31(2): 024003. doi: 10.1088/1674-4926/31/2/024003 ****
      Qian M L, Li Z H, Zhang B, Li Z J. Trench gate IGBT structure with floating P region[J]. J. Semicond., 2010, 31(2): 024003. doi: 10.1088/1674-4926/31/2/024003.
      shu

      Trench gate IGBT structure with floating P region

      DOI: 10.1088/1674-4926/31/2/024003

      • State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China

      • State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China

      • Received Date: 2015-08-18
      • Accepted Date: 2009-08-02
      • Revised Date: 2009-09-27
      • Published Date: 2010-01-27

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